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* arm: Fixed "RegInInstruction" and "RegModifiedByInstruction" not handling the flags properly

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This commit is contained in:
J. Gareth "Curious Kit" Moreton 2023-11-24 05:11:31 +00:00 committed by FPK
parent 38d2f3d58c
commit 29916bc6f6
2 changed files with 36 additions and 1 deletions
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19
compiler/arm/aoptcpu.pas
View File

@ -2418,7 +2418,24 @@ Implementation
(getsupreg(taicpu(p1).oper[0]^.reg)+1=getsupreg(reg)) then (getsupreg(taicpu(p1).oper[0]^.reg)+1=getsupreg(reg)) then
Result:=true Result:=true
else else
Result:=inherited RegInInstruction(Reg, p1); begin
if SuperRegistersEqual(Reg, NR_DEFAULTFLAGS) then
begin
{ Conditional instruction reads CPSR register }
if (taicpu(p1).condition <> C_None) then
Exit(True);
{ Comparison instructions (and procedural jump) }
if (taicpu(p1).opcode in [A_BL, A_CMP, A_CMN, A_TST, A_TEQ]) then
Exit(True);
{ Instruction sets CPSR register due to S suffix (floating-point
instructios won't raise false positives) }
if (taicpu(p1).oppostfix = PF_S) then
Exit(True)
end;
Result:=inherited RegInInstruction(Reg, p1);
end;
end; end;
const const

18
compiler/arm/aoptcpub.pas
View File

@ -119,6 +119,24 @@ Implementation
i : Longint; i : Longint;
begin begin
result:=false; result:=false;
if (p1.typ <> ait_instruction) then
Exit;
if SuperRegistersEqual(Reg, NR_DEFAULTFLAGS) then
begin
{ Comparison instructions (and procedural jump) }
if (taicpu(p1).opcode in [A_BL, A_CMP, A_CMN, A_TST, A_TEQ]) then
Exit(True);
{ Instruction sets CPSR register due to S suffix (floating-point
instructios won't raise false positives) }
if (taicpu(p1).oppostfix = PF_S) then
Exit(True);
{ Everything else (conditional instructions only read CPSR) }
Exit;
end;
case taicpu(p1).opcode of case taicpu(p1).opcode of
A_LDR: A_LDR:
begin begin