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* fixing an LD operation without refernce in loading address parameters

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This commit is contained in:
mazen 2003-03-16 20:45:45 +00:00
parent 2581901c6e
commit 2a961db56e
1 changed files with 33 additions and 27 deletions
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54
compiler/sparc/cgcpu.pas
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@ -199,31 +199,27 @@ procedure TCgSparc.a_param_ref(list:TAasmOutput;sz:TCgSize;const r:TReference;co
end; end;
end; end;
procedure TCgSparc.a_paramaddr_ref(list:TAasmOutput;CONST r:TReference;CONST LocPara:TParaLocation); procedure TCgSparc.a_paramaddr_ref(list:TAasmOutput;CONST r:TReference;CONST LocPara:TParaLocation);
VAR var
tmpreg:TRegister; Ref:TReference;
BEGIN TmpReg:TRegister;
IF r.segment.enum<>R_NO begin
THEN case locpara.loc of
CGMessage(cg_e_cant_use_far_pointer_there); LOC_REGISTER,LOC_CREGISTER:
IF(r.base.enum=R_NO)AND(r.index.enum=R_NO) a_loadaddr_ref_reg(list,r,locpara.register);
THEN LOC_REFERENCE:
list.concat(Taicpu.Op_sym_ofs(A_LD,S_SW,r.symbol,r.offset)) begin
ELSE IF(r.base.enum=R_NO)AND(r.index.enum<>R_NO)AND reference_reset(ref);
(r.offset=0)AND(r.scalefactor=0)AND(r.symbol=nil) ref.base := locpara.reference.index;
THEN ref.offset := locpara.reference.offset;
list.concat(Taicpu.Op_reg(A_LD,r.index))
ELSE IF(r.base.enum<>R_NO)AND(r.index.enum=R_NO)AND
(r.offset=0)AND(r.symbol=nil)
THEN
list.concat(Taicpu.Op_reg(A_LD,r.base))
ELSE
BEGIN
tmpreg := get_scratch_reg_address(list); tmpreg := get_scratch_reg_address(list);
a_loadaddr_ref_reg(list,r,tmpreg); a_loadaddr_ref_reg(list,r,tmpreg);
list.concat(taicpu.op_reg(A_LD,tmpreg)); a_load_reg_ref(list,OS_ADDR,tmpreg,ref);
free_scratch_reg(list,tmpreg); free_scratch_reg(list,tmpreg);
END; end;
END; else
internalerror(2002080701);
end;
end;
procedure TCgSparc.a_call_name(list:TAasmOutput;CONST s:string); procedure TCgSparc.a_call_name(list:TAasmOutput;CONST s:string);
BEGIN BEGIN
WITH List,objectlibrary DO WITH List,objectlibrary DO
@ -238,8 +234,15 @@ procedure TCgSparc.a_call_ref(list:TAasmOutput;CONST ref:TReference);
list.concat(taicpu.op_none(A_NOP)); list.concat(taicpu.op_none(A_NOP));
end; end;
procedure TCgSparc.a_call_reg(list:TAasmOutput;Reg:TRegister); procedure TCgSparc.a_call_reg(list:TAasmOutput;Reg:TRegister);
var
RetAddrReg:TRegister;
begin begin
list.concat(taicpu.op_reg(A_JMPL,reg)); with RetAddrReg do
begin
enum:=R_INTREGISTER;
Number:=NR_O7;
end;
list.concat(taicpu.op_reg_reg(A_JMPL,reg,RetAddrReg));
if target_info.system=system_sparc_linux if target_info.system=system_sparc_linux
then then
list.concat(taicpu.op_none(A_NOP)); list.concat(taicpu.op_none(A_NOP));
@ -1425,7 +1428,10 @@ BEGIN
END. END.
{ {
$Log$ $Log$
Revision 1.41 2003-03-10 21:59:54 mazen Revision 1.42 2003-03-16 20:45:45 mazen
* fixing an LD operation without refernce in loading address parameters
Revision 1.41 2003/03/10 21:59:54 mazen
* fixing index overflow in handling new registers arrays. * fixing index overflow in handling new registers arrays.
Revision 1.40 2003/02/25 21:41:44 mazen Revision 1.40 2003/02/25 21:41:44 mazen