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Use proper relocation type for Thumb-2 BLX.

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Initialize MM register allocator properly for Thumb-2 cg.

git-svn-id: branches/laksen/armiw@29435 -
This commit is contained in:
Jeppe Johansen 2015-01-11 13:30:52 +00:00
parent 572076fc4d
commit 2ac11e4b82
2 changed files with 8 additions and 2 deletions
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2
compiler/arm/aasmcpu.pas
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@ -5043,7 +5043,7 @@ implementation
currsym:=objdata.symbolref(oper[0]^.ref^.symbol);
if (currsym.bind<>AB_LOCAL) and (currsym.objsection<>objdata.CurrObjSec) then
begin
objdata.writereloc(oper[0]^.ref^.offset,0,currsym,RELOC_RELATIVE_24);
objdata.writereloc(oper[0]^.ref^.offset,0,currsym,RELOC_RELATIVE_24_THUMB);
offset:=$FFFFFE
end
else

8
compiler/arm/cgcpu.pas
View File

@ -4332,7 +4332,13 @@ unit cgcpu;
rg[R_FPUREGISTER]:=trgcpu.create(R_FPUREGISTER,R_SUBNONE,
[RS_F0,RS_F1,RS_F2,RS_F3,RS_F4,RS_F5,RS_F6,RS_F7],first_fpu_imreg,[]);
if current_settings.fputype in [fpu_fpv4_s16,fpu_vfpv3_d16] then
if current_settings.fputype=fpu_vfpv3 then
rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBFD,
[RS_D0,RS_D1,RS_D2,RS_D3,RS_D4,RS_D5,RS_D6,RS_D7,
RS_D16,RS_D17,RS_D18,RS_D19,RS_D20,RS_D21,RS_D22,RS_D23,RS_D24,RS_D25,RS_D26,RS_D27,RS_D28,RS_D29,RS_D30,RS_D31,
RS_D8,RS_D9,RS_D10,RS_D11,RS_D12,RS_D13,RS_D14,RS_D15
],first_mm_imreg,[])
else if current_settings.fputype in [fpu_fpv4_s16,fpu_vfpv3_d16] then
rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBFD,
[RS_D0,RS_D1,RS_D2,RS_D3,RS_D4,RS_D5,RS_D6,RS_D7,
RS_D8,RS_D9,RS_D10,RS_D11,RS_D12,RS_D13,RS_D14,RS_D15