From 2ae3ce79bb1fb9eda270cf861dfc129cc2512c7e Mon Sep 17 00:00:00 2001
From: yury <jura@cp-lab.com>
Date: Thu, 4 May 2017 15:55:55 +0000
Subject: [PATCH] * ARM:   Never use the "BLX label" instruction. Use "BL
 label" instead.   The linker will always change BL to BLX if necessary, but
 not vice versa (linker version dependent).   "BLX label" ALWAYS changes the
 instruction set. It changes a processor in ARM state to Thumb state,   or a
 processor in Thumb state to ARM state.

git-svn-id: trunk@36086 -
---
 compiler/arm/cgcpu.pas     |  8 +------
 rtl/android/arm/dllprt0.as |  6 +++---
 rtl/android/arm/prt0.as    |  2 +-
 rtl/arm/arm.inc            | 44 +++++++++++---------------------------
 4 files changed, 17 insertions(+), 43 deletions(-)

diff --git a/compiler/arm/cgcpu.pas b/compiler/arm/cgcpu.pas
index c4a1c9e714..54932b1f94 100644
--- a/compiler/arm/cgcpu.pas
+++ b/compiler/arm/cgcpu.pas
@@ -645,15 +645,9 @@ unit cgcpu;
         r : treference;
         sym : TAsmSymbol;
       begin
-        { check not really correct: should only be used for non-Thumb cpus }
-        // if (CPUARM_HAS_BLX_LABEL in cpu_capabilities[current_settings.cputype]) and
-        //   { WinCE GNU AS (not sure if this applies in general) does not support BLX imm }
-        // (target_info.system<>system_arm_wince) then
-        //   branchopcode:=A_BLX
-        // else
         { use always BL as newer binutils do not translate blx apparently
           generating BL is also what clang and gcc do by default }
-          branchopcode:=A_BL;
+        branchopcode:=A_BL;
         if not(weak) then
           sym:=current_asmdata.RefAsmSymbol(s,AT_FUNCTION)
         else
diff --git a/rtl/android/arm/dllprt0.as b/rtl/android/arm/dllprt0.as
index 93e48609d3..c87fc293fe 100644
--- a/rtl/android/arm/dllprt0.as
+++ b/rtl/android/arm/dllprt0.as
@@ -47,9 +47,9 @@ FPC_SHARED_LIB_START:
         str r0,[ip]
 
         /* Call main */
-        blx FPC_LIB_MAIN_ANDROID
+        bl FPC_LIB_MAIN_ANDROID
         /* Call library init */
-        blx FPC_LIB_INIT_ANDROID
+        bl FPC_LIB_INIT_ANDROID
 
         ldmea fp, {fp, sp, pc}
 
@@ -72,7 +72,7 @@ _haltproc:
         .type   _haltproc_eabi,#function
 _haltproc_eabi:
         /* Simply call libc exit(). _haltproc has the same declaration as exit. */
-        blx exit
+        bl exit
 
 /* --------------------------------------------------------- */
 .data
diff --git a/rtl/android/arm/prt0.as b/rtl/android/arm/prt0.as
index 10ba7ab8c1..9cd82b2a64 100644
--- a/rtl/android/arm/prt0.as
+++ b/rtl/android/arm/prt0.as
@@ -91,7 +91,7 @@ _haltproc:
         .type   _haltproc_eabi,#function
 _haltproc_eabi:
         /* Simply call libc exit(). _haltproc has the same declaration as exit. */
-        blx exit
+        bl exit
 
 /* --------------------------------------------------------- */
 .data
diff --git a/rtl/arm/arm.inc b/rtl/arm/arm.inc
index 4bdf46dfa2..3ff4e744ec 100644
--- a/rtl/arm/arm.inc
+++ b/rtl/arm/arm.inc
@@ -15,6 +15,13 @@
 
  **********************************************************************}
 
+{ IMPORTANT!
+  Never use the "BLX label" instruction! Use "BL label" instead.
+  The linker will always change BL to BLX if necessary, but not vice versa (linker version dependent).
+  "BLX label" ALWAYS changes the instruction set. It changes a processor in ARM state to Thumb state,
+  or a processor in Thumb state to ARM state.
+}
+
 {$ifndef FPC_SYSTEM_HAS_MOVE}
 {$define FPC_SYSTEM_FPC_MOVE}
 {$endif FPC_SYSTEM_HAS_MOVE}
@@ -547,14 +554,7 @@ asm
 {$endif}
   stmfd   sp!, {r1, lr}
   sub     r0, r1, #8
-
-// We use always bl, as newer binutils apparently never translate blx into bl
-// {$if defined(CPUARM_HAS_BLX_LABEL) and not(defined(WINCE))}
-//   blx     InterLockedDecrement
-// {$else defined(CPUARM_HAS_BLX_LABEL) and not(defined(WINCE))}
   bl      InterLockedDecrement
-// {$endif defined(CPUARM_HAS_BLX_LABEL) and not(defined(WINCE))}
-
   // InterLockedDecrement is a nice guy and sets the z flag for us
   // if the reference count dropped to 0
   ldmnefd sp!, {r1, pc}
@@ -659,11 +659,7 @@ asm
 // lock
   {$ifdef FPC_PIC}
     push {r0,lr}
-    {$ifdef CPUARM_HAS_BLX}
-      blx get_fpc_system_lock_ptr
-    {$else}
-      bl get_fpc_system_lock_ptr
-    {$endif CPUARM_HAS_BLX}
+    bl get_fpc_system_lock_ptr
     mov r3,r0
     pop {r0,lr}
   {$else FPC_PIC}
@@ -744,11 +740,7 @@ asm
 // lock
   {$ifdef FPC_PIC}
     push {r0,lr}
-    {$ifdef CPUARM_HAS_BLX}
-      blx get_fpc_system_lock_ptr
-    {$else}
-      bl get_fpc_system_lock_ptr
-    {$endif CPUARM_HAS_BLX}
+    bl get_fpc_system_lock_ptr
     mov r3,r0
     pop {r0,lr}
   {$else FPC_PIC}
@@ -829,11 +821,7 @@ asm
 // lock
   {$ifdef FPC_PIC}
     push {r0,r1,lr}
-    {$ifdef CPUARM_HAS_BLX}
-      blx get_fpc_system_lock_ptr
-    {$else}
-      bl get_fpc_system_lock_ptr
-    {$endif CPUARM_HAS_BLX}
+    bl get_fpc_system_lock_ptr
     mov r3,r0
     pop {r0,r1,lr}
   {$else FPC_PIC}
@@ -919,11 +907,7 @@ asm
 // lock
   {$ifdef FPC_PIC}
     push {r0,r1,lr}
-    {$ifdef CPUARM_HAS_BLX}
-      blx get_fpc_system_lock_ptr
-    {$else}
-      bl get_fpc_system_lock_ptr
-    {$endif CPUARM_HAS_BLX}
+    bl get_fpc_system_lock_ptr
     mov r3,r0
     pop {r0,r1,lr}
   {$else FPC_PIC}
@@ -1012,11 +996,7 @@ asm
 // lock
   {$ifdef FPC_PIC}
     push {r0,r1,r2,lr}
-    {$ifdef CPUARM_HAS_BLX}
-      blx get_fpc_system_lock_ptr
-    {$else}
-      bl get_fpc_system_lock_ptr
-    {$endif CPUARM_HAS_BLX}
+    bl get_fpc_system_lock_ptr
     mov r12,r0
     pop {r0,r1,r2,lr}
   {$else FPC_PIC}