From 2aeea741ed2645b8a604157dc58402be6fdcaa76 Mon Sep 17 00:00:00 2001 From: florian Date: Tue, 16 Dec 2003 21:49:47 +0000 Subject: [PATCH] * fixed ppc compilation --- compiler/powerpc/aasmcpu.pas | 23 ++-- compiler/powerpc/cgcpu.pas | 11 +- compiler/powerpc/cpubase.pas | 7 +- compiler/powerpc/cpupara.pas | 9 +- compiler/powerpc/rppccon.inc | 220 +++++++++++++++++------------------ compiler/powerpc/rppcnum.inc | 220 +++++++++++++++++------------------ compiler/utils/mkppcreg.pp | 9 +- 7 files changed, 257 insertions(+), 242 deletions(-) diff --git a/compiler/powerpc/aasmcpu.pas b/compiler/powerpc/aasmcpu.pas index 316af05a8d..466cf08e00 100644 --- a/compiler/powerpc/aasmcpu.pas +++ b/compiler/powerpc/aasmcpu.pas @@ -81,7 +81,7 @@ uses function is_nop: boolean; override; - function is_move:boolean; override; + function is_reg_move:boolean; override; { register spilling code } function spilling_get_operation_type(opnr: longint): topertype;override; @@ -354,15 +354,15 @@ uses cutils,rgobj; end; - function taicpu.is_move:boolean; + function taicpu.is_reg_move:boolean; begin - is_move := (opcode = A_MR) or - (opcode = A_EXTSB) or - (opcode = A_EXTSH) or - ((opcode = A_RLWINM) and - (oper[2]^.val = 0) and - (oper[4]^.val = 31) and - (oper[3]^.val in [31-8+1,31-16+1])); + result:=(opcode = A_MR) or + (opcode = A_EXTSB) or + (opcode = A_EXTSH) or + ((opcode = A_RLWINM) and + (oper[2]^.val = 0) and + (oper[4]^.val = 31) and + (oper[3]^.val in [31-8+1,31-16+1])); end; @@ -406,7 +406,10 @@ uses cutils,rgobj; end. { $Log$ - Revision 1.20 2003-12-06 22:16:13 jonas + Revision 1.21 2003-12-16 21:49:47 florian + * fixed ppc compilation + + Revision 1.20 2003/12/06 22:16:13 jonas * completely overhauled and fixed generic spilling code. New method: spilling_get_operation_type(operand_number): returns the operation performed by the instruction on the operand: read/write/read+write. diff --git a/compiler/powerpc/cgcpu.pas b/compiler/powerpc/cgcpu.pas index 16939ef908..f07c6cb937 100644 --- a/compiler/powerpc/cgcpu.pas +++ b/compiler/powerpc/cgcpu.pas @@ -1331,7 +1331,7 @@ const begin offset:= offset - 8; reference_reset_base(href, NR_STACK_POINTER_REG, offset); - list.concat(taicpu.op_reg_ref(A_STFD, regcounter, href)); + list.concat(taicpu.op_reg_ref(A_STFD, tregister(regcounter), href)); end; (* Optimiztion in the future: a_call_name(list,'_savefXX'); *) @@ -1341,7 +1341,7 @@ const begin offset:= offset - 4 * (RS_R31 - firstreggpr + 1); reference_reset_base(href,NR_STACK_POINTER_REG,offset); - list.concat(taicpu.op_reg_ref(A_STMW,firstreggpr,href)); + list.concat(taicpu.op_reg_ref(A_STMW,tregister(firstreggpr),href)); {STMW stores multiple registers} end else @@ -1412,7 +1412,7 @@ const begin offset:= offset - 4 * (RS_R31 - firstreggpr + 1); reference_reset_base(href,NR_STACK_POINTER_REG,offset); //-220 - list.concat(taicpu.op_reg_ref(A_LMW,firstreggpr,href)); + list.concat(taicpu.op_reg_ref(A_LMW,tregister(firstreggpr),href)); {LMW loads multiple registers} end else @@ -2314,7 +2314,10 @@ begin end. { $Log$ - Revision 1.147 2003-12-15 21:37:09 jonas + Revision 1.148 2003-12-16 21:49:47 florian + * fixed ppc compilation + + Revision 1.147 2003/12/15 21:37:09 jonas * fixed compilation and simplified fixref, so it never has to reallocate already freed registers anymore diff --git a/compiler/powerpc/cpubase.pas b/compiler/powerpc/cpubase.pas index ec0d7a739e..30dfdd8e33 100644 --- a/compiler/powerpc/cpubase.pas +++ b/compiler/powerpc/cpubase.pas @@ -131,7 +131,7 @@ uses {$i rppcnum.inc} ); - regstabs_table : array[tregisterindex] of tregister = ( + regstabs_table : array[tregisterindex] of shortint = ( {$i rppcstab.inc} ); @@ -694,7 +694,10 @@ implementation end. { $Log$ - Revision 1.80 2003-12-09 20:39:43 jonas + Revision 1.81 2003-12-16 21:49:47 florian + * fixed ppc compilation + + Revision 1.80 2003/12/09 20:39:43 jonas * forgot call to cg.g_overflowcheck() in nppcadd * fixed overflow flag definition * fixed cg.g_overflowcheck() for signed numbers (jump over call to diff --git a/compiler/powerpc/cpupara.pas b/compiler/powerpc/cpupara.pas index 6d030acb8e..b198a67e3c 100644 --- a/compiler/powerpc/cpupara.pas +++ b/compiler/powerpc/cpupara.pas @@ -190,7 +190,7 @@ unit cpupara; procedure assignintreg; begin - if nextintreg<=NR_R10 then + if nextintreg<=ord(NR_R10) then begin paraloc.loc:=LOC_REGISTER; paraloc.register:=newreg(R_INTREGISTER,nextintreg,R_SUBNONE); @@ -360,7 +360,7 @@ unit cpupara; p.funcret_paraloc[side]:=paraloc; end; - + function tppcparamanager.create_varargs_paraloc_info(p : tabstractprocdef; varargspara:tlinkedlist):longint; {$warning fixme!!!! tppcparamanager.create_varargs_paraloc_info} var @@ -398,7 +398,10 @@ begin end. { $Log$ - Revision 1.52 2003-12-07 22:35:05 florian + Revision 1.53 2003-12-16 21:49:47 florian + * fixed ppc compilation + + Revision 1.52 2003/12/07 22:35:05 florian + dummy tppcparamanager.create_varargs_paraloc_info added Revision 1.51 2003/11/29 16:27:19 jonas diff --git a/compiler/powerpc/rppccon.inc b/compiler/powerpc/rppccon.inc index 6651b253b9..4ff6799228 100644 --- a/compiler/powerpc/rppccon.inc +++ b/compiler/powerpc/rppccon.inc @@ -1,111 +1,111 @@ { don't edit, this file is generated from ppcreg.dat } -NR_NO = $00000000; -NR_R0 = $01000000; -NR_R1 = $01000001; -NR_R2 = $01000002; -NR_R3 = $01000003; -NR_R4 = $01000004; -NR_R5 = $01000005; -NR_R6 = $01000006; -NR_R7 = $01000007; -NR_R8 = $01000008; -NR_R9 = $01000009; -NR_R10 = $0100000a; -NR_R11 = $0100000b; -NR_R12 = $0100000c; -NR_R13 = $0100000d; -NR_R14 = $0100000e; -NR_R15 = $0100000f; -NR_R16 = $01000010; -NR_R17 = $01000011; -NR_R18 = $01000012; -NR_R19 = $01000013; -NR_R20 = $01000014; -NR_R21 = $01000015; -NR_R22 = $01000016; -NR_R23 = $01000017; -NR_R24 = $01000018; -NR_R25 = $01000019; -NR_R26 = $0100001a; -NR_R27 = $0100001b; -NR_R28 = $0100001c; -NR_R29 = $0100001d; -NR_R30 = $0100001e; -NR_R31 = $0100001f; -NR_F0 = $02000000; -NR_F1 = $02000001; -NR_F2 = $02000002; -NR_F3 = $02000003; -NR_F4 = $02000004; -NR_F5 = $02000005; -NR_F6 = $02000006; -NR_F7 = $02000007; -NR_F8 = $02000008; -NR_F9 = $02000009; -NR_F10 = $0200000a; -NR_F11 = $0200000b; -NR_F12 = $0200000c; -NR_F13 = $0200000d; -NR_F14 = $0200000e; -NR_F15 = $0200000f; -NR_F16 = $02000010; -NR_F17 = $02000011; -NR_F18 = $02000012; -NR_F19 = $02000013; -NR_F20 = $02000014; -NR_F21 = $02000015; -NR_F22 = $02000016; -NR_F23 = $02000017; -NR_F24 = $02000018; -NR_F25 = $02000019; -NR_F26 = $0200001a; -NR_F27 = $0200001b; -NR_F28 = $0200001c; -NR_F29 = $0200001d; -NR_F30 = $0200001e; -NR_F31 = $0200001f; -NR_M0 = $03000000; -NR_M1 = $03000001; -NR_M2 = $03000002; -NR_M3 = $03000003; -NR_M4 = $03000004; -NR_M5 = $03000005; -NR_M6 = $03000006; -NR_M7 = $03000007; -NR_M8 = $03000008; -NR_M9 = $03000009; -NR_M10 = $0300000a; -NR_M11 = $0300000b; -NR_M12 = $0300000c; -NR_M13 = $0300000d; -NR_M14 = $0300000e; -NR_M15 = $0300000f; -NR_M16 = $03000010; -NR_M17 = $03000011; -NR_M18 = $03000012; -NR_M19 = $03000013; -NR_M20 = $03000014; -NR_M21 = $03000015; -NR_M22 = $03000016; -NR_M23 = $03000017; -NR_M24 = $03000018; -NR_M25 = $03000019; -NR_M26 = $0300001a; -NR_M27 = $0300001b; -NR_M28 = $0300001c; -NR_M29 = $0300001d; -NR_M30 = $0300001e; -NR_M31 = $0300001f; -NR_CR = $05000000; -NR_CR0 = $05000001; -NR_CR1 = $05000002; -NR_CR2 = $05000003; -NR_CR3 = $05000004; -NR_CR4 = $05000005; -NR_CR5 = $05000006; -NR_CR6 = $05000007; -NR_CR7 = $05000008; -NR_XER = $05000009; -NR_LR = $0500000a; -NR_CTR = $0500000b; -NR_FPSCR = $0500000c; +NR_NO = tregister($00000000); +NR_R0 = tregister($01000000); +NR_R1 = tregister($01000001); +NR_R2 = tregister($01000002); +NR_R3 = tregister($01000003); +NR_R4 = tregister($01000004); +NR_R5 = tregister($01000005); +NR_R6 = tregister($01000006); +NR_R7 = tregister($01000007); +NR_R8 = tregister($01000008); +NR_R9 = tregister($01000009); +NR_R10 = tregister($0100000a); +NR_R11 = tregister($0100000b); +NR_R12 = tregister($0100000c); +NR_R13 = tregister($0100000d); +NR_R14 = tregister($0100000e); +NR_R15 = tregister($0100000f); +NR_R16 = tregister($01000010); +NR_R17 = tregister($01000011); +NR_R18 = tregister($01000012); +NR_R19 = tregister($01000013); +NR_R20 = tregister($01000014); +NR_R21 = tregister($01000015); +NR_R22 = tregister($01000016); +NR_R23 = tregister($01000017); +NR_R24 = tregister($01000018); +NR_R25 = tregister($01000019); +NR_R26 = tregister($0100001a); +NR_R27 = tregister($0100001b); +NR_R28 = tregister($0100001c); +NR_R29 = tregister($0100001d); +NR_R30 = tregister($0100001e); +NR_R31 = tregister($0100001f); +NR_F0 = tregister($02000000); +NR_F1 = tregister($02000001); +NR_F2 = tregister($02000002); +NR_F3 = tregister($02000003); +NR_F4 = tregister($02000004); +NR_F5 = tregister($02000005); +NR_F6 = tregister($02000006); +NR_F7 = tregister($02000007); +NR_F8 = tregister($02000008); +NR_F9 = tregister($02000009); +NR_F10 = tregister($0200000a); +NR_F11 = tregister($0200000b); +NR_F12 = tregister($0200000c); +NR_F13 = tregister($0200000d); +NR_F14 = tregister($0200000e); +NR_F15 = tregister($0200000f); +NR_F16 = tregister($02000010); +NR_F17 = tregister($02000011); +NR_F18 = tregister($02000012); +NR_F19 = tregister($02000013); +NR_F20 = tregister($02000014); +NR_F21 = tregister($02000015); +NR_F22 = tregister($02000016); +NR_F23 = tregister($02000017); +NR_F24 = tregister($02000018); +NR_F25 = tregister($02000019); +NR_F26 = tregister($0200001a); +NR_F27 = tregister($0200001b); +NR_F28 = tregister($0200001c); +NR_F29 = tregister($0200001d); +NR_F30 = tregister($0200001e); +NR_F31 = tregister($0200001f); +NR_M0 = tregister($03000000); +NR_M1 = tregister($03000001); +NR_M2 = tregister($03000002); +NR_M3 = tregister($03000003); +NR_M4 = tregister($03000004); +NR_M5 = tregister($03000005); +NR_M6 = tregister($03000006); +NR_M7 = tregister($03000007); +NR_M8 = tregister($03000008); +NR_M9 = tregister($03000009); +NR_M10 = tregister($0300000a); +NR_M11 = tregister($0300000b); +NR_M12 = tregister($0300000c); +NR_M13 = tregister($0300000d); +NR_M14 = tregister($0300000e); +NR_M15 = tregister($0300000f); +NR_M16 = tregister($03000010); +NR_M17 = tregister($03000011); +NR_M18 = tregister($03000012); +NR_M19 = tregister($03000013); +NR_M20 = tregister($03000014); +NR_M21 = tregister($03000015); +NR_M22 = tregister($03000016); +NR_M23 = tregister($03000017); +NR_M24 = tregister($03000018); +NR_M25 = tregister($03000019); +NR_M26 = tregister($0300001a); +NR_M27 = tregister($0300001b); +NR_M28 = tregister($0300001c); +NR_M29 = tregister($0300001d); +NR_M30 = tregister($0300001e); +NR_M31 = tregister($0300001f); +NR_CR = tregister($05000000); +NR_CR0 = tregister($05000001); +NR_CR1 = tregister($05000002); +NR_CR2 = tregister($05000003); +NR_CR3 = tregister($05000004); +NR_CR4 = tregister($05000005); +NR_CR5 = tregister($05000006); +NR_CR6 = tregister($05000007); +NR_CR7 = tregister($05000008); +NR_XER = tregister($05000009); +NR_LR = tregister($0500000a); +NR_CTR = tregister($0500000b); +NR_FPSCR = tregister($0500000c); diff --git a/compiler/powerpc/rppcnum.inc b/compiler/powerpc/rppcnum.inc index 48409e45ef..d612e34d8a 100644 --- a/compiler/powerpc/rppcnum.inc +++ b/compiler/powerpc/rppcnum.inc @@ -1,111 +1,111 @@ { don't edit, this file is generated from ppcreg.dat } -NR_NO, -NR_R0, -NR_R1, -NR_R2, -NR_R3, -NR_R4, -NR_R5, -NR_R6, -NR_R7, -NR_R8, -NR_R9, -NR_R10, -NR_R11, -NR_R12, -NR_R13, -NR_R14, -NR_R15, -NR_R16, -NR_R17, -NR_R18, -NR_R19, -NR_R20, -NR_R21, -NR_R22, -NR_R23, -NR_R24, -NR_R25, -NR_R26, -NR_R27, -NR_R28, -NR_R29, -NR_R30, -NR_R31, -NR_F0, -NR_F1, -NR_F2, -NR_F3, -NR_F4, -NR_F5, -NR_F6, -NR_F7, -NR_F8, -NR_F9, -NR_F10, -NR_F11, -NR_F12, -NR_F13, -NR_F14, -NR_F15, -NR_F16, -NR_F17, -NR_F18, -NR_F19, -NR_F20, -NR_F21, -NR_F22, -NR_F23, -NR_F24, -NR_F25, -NR_F26, -NR_F27, -NR_F28, -NR_F29, -NR_F30, -NR_F31, -NR_M0, -NR_M1, -NR_M2, -NR_M3, -NR_M4, -NR_M5, -NR_M6, -NR_M7, -NR_M8, -NR_M9, -NR_M10, -NR_M11, -NR_M12, -NR_M13, -NR_M14, -NR_M15, -NR_M16, -NR_M17, -NR_M18, -NR_M19, -NR_M20, -NR_M21, -NR_M22, -NR_M23, -NR_M24, -NR_M25, -NR_M26, -NR_M27, -NR_M28, -NR_M29, -NR_M30, -NR_M31, -NR_CR, -NR_CR0, -NR_CR1, -NR_CR2, -NR_CR3, -NR_CR4, -NR_CR5, -NR_CR6, -NR_CR7, -NR_XER, -NR_LR, -NR_CTR, -NR_FPSCR +tregister($00000000), +tregister($01000000), +tregister($01000001), +tregister($01000002), +tregister($01000003), +tregister($01000004), +tregister($01000005), +tregister($01000006), +tregister($01000007), +tregister($01000008), +tregister($01000009), +tregister($0100000a), +tregister($0100000b), +tregister($0100000c), +tregister($0100000d), +tregister($0100000e), +tregister($0100000f), +tregister($01000010), +tregister($01000011), +tregister($01000012), +tregister($01000013), +tregister($01000014), +tregister($01000015), +tregister($01000016), +tregister($01000017), +tregister($01000018), +tregister($01000019), +tregister($0100001a), +tregister($0100001b), +tregister($0100001c), +tregister($0100001d), +tregister($0100001e), +tregister($0100001f), +tregister($02000000), +tregister($02000001), +tregister($02000002), +tregister($02000003), +tregister($02000004), +tregister($02000005), +tregister($02000006), +tregister($02000007), +tregister($02000008), +tregister($02000009), +tregister($0200000a), +tregister($0200000b), +tregister($0200000c), +tregister($0200000d), +tregister($0200000e), +tregister($0200000f), +tregister($02000010), +tregister($02000011), +tregister($02000012), +tregister($02000013), +tregister($02000014), +tregister($02000015), +tregister($02000016), +tregister($02000017), +tregister($02000018), +tregister($02000019), +tregister($0200001a), +tregister($0200001b), +tregister($0200001c), +tregister($0200001d), +tregister($0200001e), +tregister($0200001f), +tregister($03000000), +tregister($03000001), +tregister($03000002), +tregister($03000003), +tregister($03000004), +tregister($03000005), +tregister($03000006), +tregister($03000007), +tregister($03000008), +tregister($03000009), +tregister($0300000a), +tregister($0300000b), +tregister($0300000c), +tregister($0300000d), +tregister($0300000e), +tregister($0300000f), +tregister($03000010), +tregister($03000011), +tregister($03000012), +tregister($03000013), +tregister($03000014), +tregister($03000015), +tregister($03000016), +tregister($03000017), +tregister($03000018), +tregister($03000019), +tregister($0300001a), +tregister($0300001b), +tregister($0300001c), +tregister($0300001d), +tregister($0300001e), +tregister($0300001f), +tregister($05000000), +tregister($05000001), +tregister($05000002), +tregister($05000003), +tregister($05000004), +tregister($05000005), +tregister($05000006), +tregister($05000007), +tregister($05000008), +tregister($05000009), +tregister($0500000a), +tregister($0500000b), +tregister($0500000c) diff --git a/compiler/utils/mkppcreg.pp b/compiler/utils/mkppcreg.pp index f767f46a04..8fe01122fd 100644 --- a/compiler/utils/mkppcreg.pp +++ b/compiler/utils/mkppcreg.pp @@ -342,9 +342,9 @@ begin end else first:=false; - writeln(confile,'NR_',names[i],' = ',numbers[i],';'); writeln(supfile,'RS_',names[i],' = ',supregs[i],';'); - write(numfile,'NR_',names[i]); + writeln(confile,'NR_'+names[i],' = ','tregister(',numbers[i],')',';'); + write(numfile,'tregister(',numbers[i],')'); write(stdfile,'''',stdnames[i],''''); write(gasfile,'''',gasnames[i],''''); write(gssfile,'''',gssnames[i],''''); @@ -390,7 +390,10 @@ begin end. { $Log$ - Revision 1.6 2003-12-10 22:19:28 florian + Revision 1.7 2003-12-16 21:49:47 florian + * fixed ppc compilation + + Revision 1.6 2003/12/10 22:19:28 florian + short gas register names for smartlinking added Revision 1.5 2003/09/03 20:33:28 peter