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* simplified and fixed a_load_reg_reg()
git-svn-id: trunk@7121 -
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parent
4e44015b8e
commit
2b0c01b903
@ -539,81 +539,47 @@ implementation
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var
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instr : taicpu;
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begin
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if (tcgsize2size[tosize]<tcgsize2size[fromsize]) or
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(
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(tcgsize2size[tosize] = tcgsize2size[fromsize]) and
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(tosize <> fromsize) and
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not(fromsize in [OS_32,OS_S32])
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) then
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begin
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case tosize of
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OS_8 :
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a_op_const_reg_reg(list,OP_AND,tosize,$ff,reg1,reg2);
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OS_16 :
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a_op_const_reg_reg(list,OP_AND,tosize,$ffff,reg1,reg2);
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OS_32,
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OS_S32 :
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begin
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instr:=taicpu.op_reg_reg(A_MOV,reg1,reg2);
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list.Concat(instr);
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{ Notify the register allocator that we have written a move instruction so
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it can try to eliminate it. }
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add_move_instruction(instr);
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end;
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OS_S8 :
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begin
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list.concat(taicpu.op_reg_const_reg(A_SLL,reg1,24,reg2));
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list.concat(taicpu.op_reg_const_reg(A_SRA,reg2,24,reg2));
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end;
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OS_S16 :
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begin
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list.concat(taicpu.op_reg_const_reg(A_SLL,reg1,16,reg2));
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list.concat(taicpu.op_reg_const_reg(A_SRA,reg2,16,reg2));
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end;
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else
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internalerror(2002090901);
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end;
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end
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else
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begin
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if reg1<>reg2 then
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begin
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if tcgsize2size[tosize] > tcgsize2size[fromsize] then
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begin
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case fromsize of
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OS_8:
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begin
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list.concat(taicpu.op_reg_const_reg(A_SLL,reg1,24,reg2));
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list.concat(taicpu.op_reg_const_reg(A_SRL,reg2,24,reg2));
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end;
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OS_16 :
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begin
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list.concat(taicpu.op_reg_const_reg(A_SLL,reg1,16,reg2));
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list.concat(taicpu.op_reg_const_reg(A_SRL,reg2,16,reg2));
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end;
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OS_S8:
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begin
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list.concat(taicpu.op_reg_const_reg(A_SLL,reg1,24,reg2));
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list.concat(taicpu.op_reg_const_reg(A_SRA,reg2,24,reg2));
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end;
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OS_S16 :
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begin
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list.concat(taicpu.op_reg_const_reg(A_SLL,reg1,16,reg2));
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list.concat(taicpu.op_reg_const_reg(A_SRA,reg2,16,reg2));
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end;
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end;
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end
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else
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begin
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{ same size, only a register mov required }
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instr:=taicpu.op_reg_reg(A_MOV,reg1,reg2);
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list.Concat(instr);
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{ Notify the register allocator that we have written a move instruction so
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it can try to eliminate it. }
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add_move_instruction(instr);
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end;
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end;
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end;
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if (tcgsize2size[fromsize] > tcgsize2size[tosize]) or
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((tcgsize2size[fromsize] = tcgsize2size[tosize]) and
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(fromsize <> tosize)) or
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{ needs to mask out the sign in the top 16 bits }
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((fromsize = OS_S8) and
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(tosize = OS_16)) then
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case tosize of
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OS_8 :
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a_op_const_reg_reg(list,OP_AND,tosize,$ff,reg1,reg2);
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OS_16 :
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a_op_const_reg_reg(list,OP_AND,tosize,$ffff,reg1,reg2);
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OS_32,
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OS_S32 :
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begin
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instr:=taicpu.op_reg_reg(A_MOV,reg1,reg2);
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list.Concat(instr);
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{ Notify the register allocator that we have written a move instruction so
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it can try to eliminate it. }
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add_move_instruction(instr);
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end;
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OS_S8 :
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begin
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list.concat(taicpu.op_reg_const_reg(A_SLL,reg1,24,reg2));
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list.concat(taicpu.op_reg_const_reg(A_SRA,reg2,24,reg2));
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end;
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OS_S16 :
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begin
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list.concat(taicpu.op_reg_const_reg(A_SLL,reg1,16,reg2));
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list.concat(taicpu.op_reg_const_reg(A_SRA,reg2,16,reg2));
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end;
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else
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internalerror(2002090901);
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end
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else
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begin
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instr:=taicpu.op_reg_reg(A_MOV,reg1,reg2);
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list.Concat(instr);
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{ Notify the register allocator that we have written a move instruction so
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it can try to eliminate it. }
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add_move_instruction(instr);
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end;
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end;
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