From 2d0c27e80d38c55ca90e45d2f6374ca56fd2610a Mon Sep 17 00:00:00 2001 From: florian Date: Fri, 16 Mar 2007 20:04:39 +0000 Subject: [PATCH] * sparc uses softfloat routines so softfloat exception masking needs to be set properly git-svn-id: trunk@6888 - --- rtl/sparc/mathu.inc | 3 ++- rtl/sparc/sparc.inc | 15 ++++++++++++--- 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/rtl/sparc/mathu.inc b/rtl/sparc/mathu.inc index 1e763fba2a..276aac62ef 100644 --- a/rtl/sparc/mathu.inc +++ b/rtl/sparc/mathu.inc @@ -21,7 +21,6 @@ function GetRoundMode: TFPURoundingMode; result:=TFPURoundingMode(get_fsr shr 30); end; - function SetRoundMode(const RoundMode: TFPURoundingMode): TFPURoundingMode; begin set_fsr((get_fsr and $3fffffff) or (dword(RoundMode) shl 30)); @@ -108,6 +107,8 @@ function SetExceptionMask(const Mask: TFPUExceptionMask): TFPUExceptionMask; { update control register contents } set_fsr(fsr); + + softfloat_exception_mask:=dword(Mask); end; diff --git a/rtl/sparc/sparc.inc b/rtl/sparc/sparc.inc index bb898461f4..b93cb17067 100644 --- a/rtl/sparc/sparc.inc +++ b/rtl/sparc/sparc.inc @@ -45,11 +45,20 @@ function get_got : pointer;assembler;nostackframe;[public, alias: 'FPC_GETGOT']; end; +{$define FPC_SYSTEM_HAS_SYSRESETFPU} +Procedure SysResetFPU;{$ifdef SYSTEMINLINE}inline;{$endif} + begin + softfloat_exception_flags:=0; + softfloat_exception_mask:=float_flag_underflow or float_flag_inexact or float_flag_denormal; + { enable div by 0 and invalid operation fpu exceptions + round towards zero; ieee compliant arithmetics } + set_fsr((get_fsr and $3fbfffff) or $09000000); + end; + + procedure fpc_cpuinit; begin - { enable div by 0 and invalid operation fpu exceptions } - { round towards zero; ieee compliant arithmetics } - set_fsr((get_fsr and $3fbfffff) or $09000000); + SysResetFPU; end;