mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-08-17 02:59:13 +02:00
* patch by Michael Ring: adds license headers to th FreeRTOS files and some renames to make the interrupts cmsis compatible.
git-svn-id: trunk@44973 -
This commit is contained in:
florian
parent
c3954a0cee
commit
2d3cd25fd8
@ -1,4 +1,30 @@
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unit stm32f103xe;
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unit stm32f103xe;
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(**
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******************************************************************************
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* @file stm32f103xe.h
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* @author MCD Application Team
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* @brief CMSIS Cortex-M3 Device Peripheral Access Layer Header File.
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* This file contains all the peripheral register's definitions, bits
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* definitions and memory mapping for STM32F1xx devices.
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*
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* This file contains:
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* - Data structures and the address mapping for all peripherals
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* - Peripheral's registers declarations and bits definition
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* - Macros to access peripheral<92>s registers hardware
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*)
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interface
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interface
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{$PACKRECORDS C}
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{$PACKRECORDS C}
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{$GOTO ON}
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{$GOTO ON}
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@ -624,75 +650,75 @@ var
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implementation
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implementation
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procedure NonMaskableInt_interrupt; external name 'NonMaskableInt_interrupt';
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procedure NonMaskableInt_Handler; external name 'NonMaskableInt_Handler';
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procedure HardFault_interrupt; external name 'HardFault_interrupt';
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procedure HardFault_Handler; external name 'HardFault_Handler';
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procedure MemoryManagement_interrupt; external name 'MemoryManagement_interrupt';
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procedure MemoryManagement_Handler; external name 'MemoryManagement_Handler';
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procedure BusFault_interrupt; external name 'BusFault_interrupt';
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procedure BusFault_Handler; external name 'BusFault_Handler';
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procedure UsageFault_interrupt; external name 'UsageFault_interrupt';
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procedure UsageFault_Handler; external name 'UsageFault_Handler';
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procedure SVCall_interrupt; external name 'SVCall_interrupt';
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procedure SVCall_Handler; external name 'SVCall_Handler';
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procedure DebugMonitor_interrupt; external name 'DebugMonitor_interrupt';
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procedure DebugMonitor_Handler; external name 'DebugMonitor_Handler';
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procedure PendSV_interrupt; external name 'PendSV_interrupt';
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procedure PendSV_Handler; external name 'PendSV_Handler';
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procedure SysTick_interrupt; external name 'SysTick_interrupt';
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procedure SysTick_Handler; external name 'SysTick_Handler';
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procedure WWDG_interrupt; external name 'WWDG_interrupt';
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procedure WWDG_Handler; external name 'WWDG_Handler';
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procedure PVD_interrupt; external name 'PVD_interrupt';
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procedure PVD_Handler; external name 'PVD_Handler';
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procedure TAMPER_interrupt; external name 'TAMPER_interrupt';
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procedure TAMPER_Handler; external name 'TAMPER_Handler';
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procedure RTC_interrupt; external name 'RTC_interrupt';
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procedure RTC_Handler; external name 'RTC_Handler';
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procedure FLASH_interrupt; external name 'FLASH_interrupt';
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procedure FLASH_Handler; external name 'FLASH_Handler';
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procedure RCC_interrupt; external name 'RCC_interrupt';
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procedure RCC_Handler; external name 'RCC_Handler';
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procedure EXTI0_interrupt; external name 'EXTI0_interrupt';
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procedure EXTI0_Handler; external name 'EXTI0_Handler';
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procedure EXTI1_interrupt; external name 'EXTI1_interrupt';
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procedure EXTI1_Handler; external name 'EXTI1_Handler';
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procedure EXTI2_interrupt; external name 'EXTI2_interrupt';
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procedure EXTI2_Handler; external name 'EXTI2_Handler';
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procedure EXTI3_interrupt; external name 'EXTI3_interrupt';
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procedure EXTI3_Handler; external name 'EXTI3_Handler';
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procedure EXTI4_interrupt; external name 'EXTI4_interrupt';
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procedure EXTI4_Handler; external name 'EXTI4_Handler';
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procedure DMA1_Channel1_interrupt; external name 'DMA1_Channel1_interrupt';
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procedure DMA1_Channel1_Handler; external name 'DMA1_Channel1_Handler';
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procedure DMA1_Channel2_interrupt; external name 'DMA1_Channel2_interrupt';
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procedure DMA1_Channel2_Handler; external name 'DMA1_Channel2_Handler';
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procedure DMA1_Channel3_interrupt; external name 'DMA1_Channel3_interrupt';
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procedure DMA1_Channel3_Handler; external name 'DMA1_Channel3_Handler';
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procedure DMA1_Channel4_interrupt; external name 'DMA1_Channel4_interrupt';
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procedure DMA1_Channel4_Handler; external name 'DMA1_Channel4_Handler';
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procedure DMA1_Channel5_interrupt; external name 'DMA1_Channel5_interrupt';
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procedure DMA1_Channel5_Handler; external name 'DMA1_Channel5_Handler';
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procedure DMA1_Channel6_interrupt; external name 'DMA1_Channel6_interrupt';
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procedure DMA1_Channel6_Handler; external name 'DMA1_Channel6_Handler';
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procedure DMA1_Channel7_interrupt; external name 'DMA1_Channel7_interrupt';
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procedure DMA1_Channel7_Handler; external name 'DMA1_Channel7_Handler';
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procedure ADC1_2_interrupt; external name 'ADC1_2_interrupt';
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procedure ADC1_2_Handler; external name 'ADC1_2_Handler';
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procedure USB_HP_CAN1_TX_interrupt; external name 'USB_HP_CAN1_TX_interrupt';
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procedure USB_HP_CAN1_TX_Handler; external name 'USB_HP_CAN1_TX_Handler';
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procedure USB_LP_CAN1_RX0_interrupt; external name 'USB_LP_CAN1_RX0_interrupt';
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procedure USB_LP_CAN1_RX0_Handler; external name 'USB_LP_CAN1_RX0_Handler';
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procedure CAN1_RX1_interrupt; external name 'CAN1_RX1_interrupt';
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procedure CAN1_RX1_Handler; external name 'CAN1_RX1_Handler';
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procedure CAN1_SCE_interrupt; external name 'CAN1_SCE_interrupt';
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procedure CAN1_SCE_Handler; external name 'CAN1_SCE_Handler';
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procedure EXTI9_5_interrupt; external name 'EXTI9_5_interrupt';
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procedure EXTI9_5_Handler; external name 'EXTI9_5_Handler';
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procedure TIM1_BRK_interrupt; external name 'TIM1_BRK_interrupt';
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procedure TIM1_BRK_Handler; external name 'TIM1_BRK_Handler';
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procedure TIM1_UP_interrupt; external name 'TIM1_UP_interrupt';
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procedure TIM1_UP_Handler; external name 'TIM1_UP_Handler';
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procedure TIM1_TRG_COM_interrupt; external name 'TIM1_TRG_COM_interrupt';
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procedure TIM1_TRG_COM_Handler; external name 'TIM1_TRG_COM_Handler';
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procedure TIM1_CC_interrupt; external name 'TIM1_CC_interrupt';
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procedure TIM1_CC_Handler; external name 'TIM1_CC_Handler';
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procedure TIM2_interrupt; external name 'TIM2_interrupt';
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procedure TIM2_Handler; external name 'TIM2_Handler';
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procedure TIM3_interrupt; external name 'TIM3_interrupt';
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procedure TIM3_Handler; external name 'TIM3_Handler';
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procedure TIM4_interrupt; external name 'TIM4_interrupt';
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procedure TIM4_Handler; external name 'TIM4_Handler';
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procedure I2C1_EV_interrupt; external name 'I2C1_EV_interrupt';
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procedure I2C1_EV_Handler; external name 'I2C1_EV_Handler';
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procedure I2C1_ER_interrupt; external name 'I2C1_ER_interrupt';
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procedure I2C1_ER_Handler; external name 'I2C1_ER_Handler';
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procedure I2C2_EV_interrupt; external name 'I2C2_EV_interrupt';
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procedure I2C2_EV_Handler; external name 'I2C2_EV_Handler';
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procedure I2C2_ER_interrupt; external name 'I2C2_ER_interrupt';
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procedure I2C2_ER_Handler; external name 'I2C2_ER_Handler';
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procedure SPI1_interrupt; external name 'SPI1_interrupt';
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procedure SPI1_Handler; external name 'SPI1_Handler';
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procedure SPI2_interrupt; external name 'SPI2_interrupt';
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procedure SPI2_Handler; external name 'SPI2_Handler';
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procedure USART1_interrupt; external name 'USART1_interrupt';
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procedure USART1_Handler; external name 'USART1_Handler';
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procedure USART2_interrupt; external name 'USART2_interrupt';
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procedure USART2_Handler; external name 'USART2_Handler';
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procedure USART3_interrupt; external name 'USART3_interrupt';
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procedure USART3_Handler; external name 'USART3_Handler';
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procedure EXTI15_10_interrupt; external name 'EXTI15_10_interrupt';
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procedure EXTI15_10_Handler; external name 'EXTI15_10_Handler';
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procedure RTC_Alarm_interrupt; external name 'RTC_Alarm_interrupt';
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procedure RTC_Alarm_Handler; external name 'RTC_Alarm_Handler';
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procedure USBWakeUp_interrupt; external name 'USBWakeUp_interrupt';
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procedure USBWakeUp_Handler; external name 'USBWakeUp_Handler';
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procedure TIM8_BRK_interrupt; external name 'TIM8_BRK_interrupt';
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procedure TIM8_BRK_Handler; external name 'TIM8_BRK_Handler';
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procedure TIM8_UP_interrupt; external name 'TIM8_UP_interrupt';
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procedure TIM8_UP_Handler; external name 'TIM8_UP_Handler';
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procedure TIM8_TRG_COM_interrupt; external name 'TIM8_TRG_COM_interrupt';
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procedure TIM8_TRG_COM_Handler; external name 'TIM8_TRG_COM_Handler';
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procedure TIM8_CC_interrupt; external name 'TIM8_CC_interrupt';
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procedure TIM8_CC_Handler; external name 'TIM8_CC_Handler';
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procedure ADC3_interrupt; external name 'ADC3_interrupt';
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procedure ADC3_Handler; external name 'ADC3_Handler';
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procedure FSMC_interrupt; external name 'FSMC_interrupt';
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procedure FSMC_Handler; external name 'FSMC_Handler';
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procedure SDIO_interrupt; external name 'SDIO_interrupt';
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procedure SDIO_Handler; external name 'SDIO_Handler';
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procedure TIM5_interrupt; external name 'TIM5_interrupt';
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procedure TIM5_Handler; external name 'TIM5_Handler';
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procedure SPI3_interrupt; external name 'SPI3_interrupt';
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procedure SPI3_Handler; external name 'SPI3_Handler';
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procedure UART4_interrupt; external name 'UART4_interrupt';
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procedure UART4_Handler; external name 'UART4_Handler';
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procedure UART5_interrupt; external name 'UART5_interrupt';
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procedure UART5_Handler; external name 'UART5_Handler';
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procedure TIM6_interrupt; external name 'TIM6_interrupt';
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procedure TIM6_Handler; external name 'TIM6_Handler';
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procedure TIM7_interrupt; external name 'TIM7_interrupt';
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procedure TIM7_Handler; external name 'TIM7_Handler';
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procedure DMA2_Channel1_interrupt; external name 'DMA2_Channel1_interrupt';
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procedure DMA2_Channel1_Handler; external name 'DMA2_Channel1_Handler';
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procedure DMA2_Channel2_interrupt; external name 'DMA2_Channel2_interrupt';
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procedure DMA2_Channel2_Handler; external name 'DMA2_Channel2_Handler';
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procedure DMA2_Channel3_interrupt; external name 'DMA2_Channel3_interrupt';
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procedure DMA2_Channel3_Handler; external name 'DMA2_Channel3_Handler';
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procedure DMA2_Channel4_5_interrupt; external name 'DMA2_Channel4_5_interrupt';
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procedure DMA2_Channel4_5_Handler; external name 'DMA2_Channel4_5_Handler';
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{$i cortexm3_start.inc}
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{$i cortexm3_start.inc}
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@ -704,220 +730,220 @@ asm
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interrupt_vectors:
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interrupt_vectors:
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.long _stack_top
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.long _stack_top
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.long Startup
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.long Startup
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.long NonMaskableInt_interrupt
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.long NonMaskableInt_Handler
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.long HardFault_interrupt
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.long HardFault_Handler
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.long MemoryManagement_interrupt
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.long MemoryManagement_Handler
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.long BusFault_interrupt
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.long BusFault_Handler
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.long UsageFault_interrupt
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.long UsageFault_Handler
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.long 0
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.long 0
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.long 0
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.long 0
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.long 0
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.long 0
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.long 0
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.long 0
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.long SVCall_interrupt
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.long SVCall_Handler
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.long DebugMonitor_interrupt
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.long DebugMonitor_Handler
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.long 0
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.long 0
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.long PendSV_interrupt
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.long PendSV_Handler
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.long SysTick_interrupt
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.long SysTick_Handler
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.long WWDG_interrupt
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.long WWDG_Handler
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.long PVD_interrupt
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.long PVD_Handler
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.long TAMPER_interrupt
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.long TAMPER_Handler
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.long RTC_interrupt
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.long RTC_Handler
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.long FLASH_interrupt
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.long FLASH_Handler
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.long RCC_interrupt
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.long RCC_Handler
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.long EXTI0_interrupt
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.long EXTI0_Handler
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.long EXTI1_interrupt
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.long EXTI1_Handler
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.long EXTI2_interrupt
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.long EXTI2_Handler
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.long EXTI3_interrupt
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.long EXTI3_Handler
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.long EXTI4_interrupt
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.long EXTI4_Handler
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.long DMA1_Channel1_interrupt
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.long DMA1_Channel1_Handler
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.long DMA1_Channel2_interrupt
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.long DMA1_Channel2_Handler
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.long DMA1_Channel3_interrupt
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.long DMA1_Channel3_Handler
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.long DMA1_Channel4_interrupt
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.long DMA1_Channel4_Handler
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.long DMA1_Channel5_interrupt
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.long DMA1_Channel5_Handler
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.long DMA1_Channel6_interrupt
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.long DMA1_Channel6_Handler
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.long DMA1_Channel7_interrupt
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.long DMA1_Channel7_Handler
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.long ADC1_2_interrupt
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.long ADC1_2_Handler
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.long USB_HP_CAN1_TX_interrupt
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.long USB_HP_CAN1_TX_Handler
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.long USB_LP_CAN1_RX0_interrupt
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.long USB_LP_CAN1_RX0_Handler
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.long CAN1_RX1_interrupt
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.long CAN1_RX1_Handler
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.long CAN1_SCE_interrupt
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.long CAN1_SCE_Handler
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.long EXTI9_5_interrupt
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.long EXTI9_5_Handler
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.long TIM1_BRK_interrupt
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.long TIM1_BRK_Handler
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.long TIM1_UP_interrupt
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.long TIM1_UP_Handler
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.long TIM1_TRG_COM_interrupt
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.long TIM1_TRG_COM_Handler
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.long TIM1_CC_interrupt
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.long TIM1_CC_Handler
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.long TIM2_interrupt
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.long TIM2_Handler
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.long TIM3_interrupt
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.long TIM3_Handler
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.long TIM4_interrupt
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.long TIM4_Handler
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.long I2C1_EV_interrupt
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.long I2C1_EV_Handler
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.long I2C1_ER_interrupt
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.long I2C1_ER_Handler
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.long I2C2_EV_interrupt
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.long I2C2_EV_Handler
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.long I2C2_ER_interrupt
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.long I2C2_ER_Handler
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.long SPI1_interrupt
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.long SPI1_Handler
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.long SPI2_interrupt
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.long SPI2_Handler
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.long USART1_interrupt
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.long USART1_Handler
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.long USART2_interrupt
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.long USART2_Handler
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.long USART3_interrupt
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.long USART3_Handler
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.long EXTI15_10_interrupt
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.long EXTI15_10_Handler
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.long RTC_Alarm_interrupt
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.long RTC_Alarm_Handler
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.long USBWakeUp_interrupt
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.long USBWakeUp_Handler
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.long TIM8_BRK_interrupt
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.long TIM8_BRK_Handler
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.long TIM8_UP_interrupt
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.long TIM8_UP_Handler
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.long TIM8_TRG_COM_interrupt
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.long TIM8_TRG_COM_Handler
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.long TIM8_CC_interrupt
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.long TIM8_CC_Handler
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.long ADC3_interrupt
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.long ADC3_Handler
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.long FSMC_interrupt
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.long FSMC_Handler
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.long SDIO_interrupt
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.long SDIO_Handler
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.long TIM5_interrupt
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.long TIM5_Handler
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.long SPI3_interrupt
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.long SPI3_Handler
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.long UART4_interrupt
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.long UART4_Handler
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.long UART5_interrupt
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.long UART5_Handler
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.long TIM6_interrupt
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.long TIM6_Handler
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.long TIM7_interrupt
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.long TIM7_Handler
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.long DMA2_Channel1_interrupt
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.long DMA2_Channel1_Handler
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.long DMA2_Channel2_interrupt
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.long DMA2_Channel2_Handler
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.long DMA2_Channel3_interrupt
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.long DMA2_Channel3_Handler
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.long DMA2_Channel4_5_interrupt
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.long DMA2_Channel4_5_Handler
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.weak NonMaskableInt_interrupt
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.weak NonMaskableInt_Handler
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.weak HardFault_interrupt
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.weak HardFault_Handler
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.weak MemoryManagement_interrupt
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.weak MemoryManagement_Handler
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.weak BusFault_interrupt
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.weak BusFault_Handler
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.weak UsageFault_interrupt
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.weak UsageFault_Handler
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.weak SVCall_interrupt
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.weak SVCall_Handler
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.weak DebugMonitor_interrupt
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.weak DebugMonitor_Handler
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.weak PendSV_interrupt
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.weak PendSV_Handler
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.weak SysTick_interrupt
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.weak SysTick_Handler
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.weak WWDG_interrupt
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.weak WWDG_Handler
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.weak PVD_interrupt
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.weak PVD_Handler
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.weak TAMPER_interrupt
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.weak TAMPER_Handler
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.weak RTC_interrupt
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.weak RTC_Handler
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.weak FLASH_interrupt
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.weak FLASH_Handler
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.weak RCC_interrupt
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.weak RCC_Handler
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.weak EXTI0_interrupt
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.weak EXTI0_Handler
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.weak EXTI1_interrupt
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.weak EXTI1_Handler
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.weak EXTI2_interrupt
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.weak EXTI2_Handler
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.weak EXTI3_interrupt
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.weak EXTI3_Handler
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.weak EXTI4_interrupt
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.weak EXTI4_Handler
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.weak DMA1_Channel1_interrupt
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.weak DMA1_Channel1_Handler
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.weak DMA1_Channel2_interrupt
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.weak DMA1_Channel2_Handler
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.weak DMA1_Channel3_interrupt
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.weak DMA1_Channel3_Handler
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.weak DMA1_Channel4_interrupt
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.weak DMA1_Channel4_Handler
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.weak DMA1_Channel5_interrupt
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.weak DMA1_Channel5_Handler
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.weak DMA1_Channel6_interrupt
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.weak DMA1_Channel6_Handler
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.weak DMA1_Channel7_interrupt
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.weak DMA1_Channel7_Handler
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.weak ADC1_2_interrupt
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.weak ADC1_2_Handler
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.weak USB_HP_CAN1_TX_interrupt
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.weak USB_HP_CAN1_TX_Handler
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.weak USB_LP_CAN1_RX0_interrupt
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.weak USB_LP_CAN1_RX0_Handler
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.weak CAN1_RX1_interrupt
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.weak CAN1_RX1_Handler
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.weak CAN1_SCE_interrupt
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.weak CAN1_SCE_Handler
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.weak EXTI9_5_interrupt
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.weak EXTI9_5_Handler
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.weak TIM1_BRK_interrupt
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.weak TIM1_BRK_Handler
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.weak TIM1_UP_interrupt
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.weak TIM1_UP_Handler
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.weak TIM1_TRG_COM_interrupt
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.weak TIM1_TRG_COM_Handler
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.weak TIM1_CC_interrupt
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.weak TIM1_CC_Handler
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.weak TIM2_interrupt
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.weak TIM2_Handler
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.weak TIM3_interrupt
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.weak TIM3_Handler
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.weak TIM4_interrupt
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.weak TIM4_Handler
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.weak I2C1_EV_interrupt
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.weak I2C1_EV_Handler
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.weak I2C1_ER_interrupt
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.weak I2C1_ER_Handler
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.weak I2C2_EV_interrupt
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.weak I2C2_EV_Handler
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.weak I2C2_ER_interrupt
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.weak I2C2_ER_Handler
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.weak SPI1_interrupt
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.weak SPI1_Handler
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.weak SPI2_interrupt
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.weak SPI2_Handler
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.weak USART1_interrupt
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.weak USART1_Handler
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.weak USART2_interrupt
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.weak USART2_Handler
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.weak USART3_interrupt
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.weak USART3_Handler
|
||||||
.weak EXTI15_10_interrupt
|
.weak EXTI15_10_Handler
|
||||||
.weak RTC_Alarm_interrupt
|
.weak RTC_Alarm_Handler
|
||||||
.weak USBWakeUp_interrupt
|
.weak USBWakeUp_Handler
|
||||||
.weak TIM8_BRK_interrupt
|
.weak TIM8_BRK_Handler
|
||||||
.weak TIM8_UP_interrupt
|
.weak TIM8_UP_Handler
|
||||||
.weak TIM8_TRG_COM_interrupt
|
.weak TIM8_TRG_COM_Handler
|
||||||
.weak TIM8_CC_interrupt
|
.weak TIM8_CC_Handler
|
||||||
.weak ADC3_interrupt
|
.weak ADC3_Handler
|
||||||
.weak FSMC_interrupt
|
.weak FSMC_Handler
|
||||||
.weak SDIO_interrupt
|
.weak SDIO_Handler
|
||||||
.weak TIM5_interrupt
|
.weak TIM5_Handler
|
||||||
.weak SPI3_interrupt
|
.weak SPI3_Handler
|
||||||
.weak UART4_interrupt
|
.weak UART4_Handler
|
||||||
.weak UART5_interrupt
|
.weak UART5_Handler
|
||||||
.weak TIM6_interrupt
|
.weak TIM6_Handler
|
||||||
.weak TIM7_interrupt
|
.weak TIM7_Handler
|
||||||
.weak DMA2_Channel1_interrupt
|
.weak DMA2_Channel1_Handler
|
||||||
.weak DMA2_Channel2_interrupt
|
.weak DMA2_Channel2_Handler
|
||||||
.weak DMA2_Channel3_interrupt
|
.weak DMA2_Channel3_Handler
|
||||||
.weak DMA2_Channel4_5_interrupt
|
.weak DMA2_Channel4_5_Handler
|
||||||
|
|
||||||
.set NonMaskableInt_interrupt, Haltproc
|
.set NonMaskableInt_Handler, Haltproc
|
||||||
.set HardFault_interrupt, Haltproc
|
.set HardFault_Handler, Haltproc
|
||||||
.set MemoryManagement_interrupt, Haltproc
|
.set MemoryManagement_Handler, Haltproc
|
||||||
.set BusFault_interrupt, Haltproc
|
.set BusFault_Handler, Haltproc
|
||||||
.set UsageFault_interrupt, Haltproc
|
.set UsageFault_Handler, Haltproc
|
||||||
.set SVCall_interrupt, Haltproc
|
.set SVCall_Handler, Haltproc
|
||||||
.set DebugMonitor_interrupt, Haltproc
|
.set DebugMonitor_Handler, Haltproc
|
||||||
.set PendSV_interrupt, Haltproc
|
.set PendSV_Handler, Haltproc
|
||||||
.set SysTick_interrupt, Haltproc
|
.set SysTick_Handler, Haltproc
|
||||||
.set WWDG_interrupt, Haltproc
|
.set WWDG_Handler, Haltproc
|
||||||
.set PVD_interrupt, Haltproc
|
.set PVD_Handler, Haltproc
|
||||||
.set TAMPER_interrupt, Haltproc
|
.set TAMPER_Handler, Haltproc
|
||||||
.set RTC_interrupt, Haltproc
|
.set RTC_Handler, Haltproc
|
||||||
.set FLASH_interrupt, Haltproc
|
.set FLASH_Handler, Haltproc
|
||||||
.set RCC_interrupt, Haltproc
|
.set RCC_Handler, Haltproc
|
||||||
.set EXTI0_interrupt, Haltproc
|
.set EXTI0_Handler, Haltproc
|
||||||
.set EXTI1_interrupt, Haltproc
|
.set EXTI1_Handler, Haltproc
|
||||||
.set EXTI2_interrupt, Haltproc
|
.set EXTI2_Handler, Haltproc
|
||||||
.set EXTI3_interrupt, Haltproc
|
.set EXTI3_Handler, Haltproc
|
||||||
.set EXTI4_interrupt, Haltproc
|
.set EXTI4_Handler, Haltproc
|
||||||
.set DMA1_Channel1_interrupt, Haltproc
|
.set DMA1_Channel1_Handler, Haltproc
|
||||||
.set DMA1_Channel2_interrupt, Haltproc
|
.set DMA1_Channel2_Handler, Haltproc
|
||||||
.set DMA1_Channel3_interrupt, Haltproc
|
.set DMA1_Channel3_Handler, Haltproc
|
||||||
.set DMA1_Channel4_interrupt, Haltproc
|
.set DMA1_Channel4_Handler, Haltproc
|
||||||
.set DMA1_Channel5_interrupt, Haltproc
|
.set DMA1_Channel5_Handler, Haltproc
|
||||||
.set DMA1_Channel6_interrupt, Haltproc
|
.set DMA1_Channel6_Handler, Haltproc
|
||||||
.set DMA1_Channel7_interrupt, Haltproc
|
.set DMA1_Channel7_Handler, Haltproc
|
||||||
.set ADC1_2_interrupt, Haltproc
|
.set ADC1_2_Handler, Haltproc
|
||||||
.set USB_HP_CAN1_TX_interrupt, Haltproc
|
.set USB_HP_CAN1_TX_Handler, Haltproc
|
||||||
.set USB_LP_CAN1_RX0_interrupt, Haltproc
|
.set USB_LP_CAN1_RX0_Handler, Haltproc
|
||||||
.set CAN1_RX1_interrupt, Haltproc
|
.set CAN1_RX1_Handler, Haltproc
|
||||||
.set CAN1_SCE_interrupt, Haltproc
|
.set CAN1_SCE_Handler, Haltproc
|
||||||
.set EXTI9_5_interrupt, Haltproc
|
.set EXTI9_5_Handler, Haltproc
|
||||||
.set TIM1_BRK_interrupt, Haltproc
|
.set TIM1_BRK_Handler, Haltproc
|
||||||
.set TIM1_UP_interrupt, Haltproc
|
.set TIM1_UP_Handler, Haltproc
|
||||||
.set TIM1_TRG_COM_interrupt, Haltproc
|
.set TIM1_TRG_COM_Handler, Haltproc
|
||||||
.set TIM1_CC_interrupt, Haltproc
|
.set TIM1_CC_Handler, Haltproc
|
||||||
.set TIM2_interrupt, Haltproc
|
.set TIM2_Handler, Haltproc
|
||||||
.set TIM3_interrupt, Haltproc
|
.set TIM3_Handler, Haltproc
|
||||||
.set TIM4_interrupt, Haltproc
|
.set TIM4_Handler, Haltproc
|
||||||
.set I2C1_EV_interrupt, Haltproc
|
.set I2C1_EV_Handler, Haltproc
|
||||||
.set I2C1_ER_interrupt, Haltproc
|
.set I2C1_ER_Handler, Haltproc
|
||||||
.set I2C2_EV_interrupt, Haltproc
|
.set I2C2_EV_Handler, Haltproc
|
||||||
.set I2C2_ER_interrupt, Haltproc
|
.set I2C2_ER_Handler, Haltproc
|
||||||
.set SPI1_interrupt, Haltproc
|
.set SPI1_Handler, Haltproc
|
||||||
.set SPI2_interrupt, Haltproc
|
.set SPI2_Handler, Haltproc
|
||||||
.set USART1_interrupt, Haltproc
|
.set USART1_Handler, Haltproc
|
||||||
.set USART2_interrupt, Haltproc
|
.set USART2_Handler, Haltproc
|
||||||
.set USART3_interrupt, Haltproc
|
.set USART3_Handler, Haltproc
|
||||||
.set EXTI15_10_interrupt, Haltproc
|
.set EXTI15_10_Handler, Haltproc
|
||||||
.set RTC_Alarm_interrupt, Haltproc
|
.set RTC_Alarm_Handler, Haltproc
|
||||||
.set USBWakeUp_interrupt, Haltproc
|
.set USBWakeUp_Handler, Haltproc
|
||||||
.set TIM8_BRK_interrupt, Haltproc
|
.set TIM8_BRK_Handler, Haltproc
|
||||||
.set TIM8_UP_interrupt, Haltproc
|
.set TIM8_UP_Handler, Haltproc
|
||||||
.set TIM8_TRG_COM_interrupt, Haltproc
|
.set TIM8_TRG_COM_Handler, Haltproc
|
||||||
.set TIM8_CC_interrupt, Haltproc
|
.set TIM8_CC_Handler, Haltproc
|
||||||
.set ADC3_interrupt, Haltproc
|
.set ADC3_Handler, Haltproc
|
||||||
.set FSMC_interrupt, Haltproc
|
.set FSMC_Handler, Haltproc
|
||||||
.set SDIO_interrupt, Haltproc
|
.set SDIO_Handler, Haltproc
|
||||||
.set TIM5_interrupt, Haltproc
|
.set TIM5_Handler, Haltproc
|
||||||
.set SPI3_interrupt, Haltproc
|
.set SPI3_Handler, Haltproc
|
||||||
.set UART4_interrupt, Haltproc
|
.set UART4_Handler, Haltproc
|
||||||
.set UART5_interrupt, Haltproc
|
.set UART5_Handler, Haltproc
|
||||||
.set TIM6_interrupt, Haltproc
|
.set TIM6_Handler, Haltproc
|
||||||
.set TIM7_interrupt, Haltproc
|
.set TIM7_Handler, Haltproc
|
||||||
.set DMA2_Channel1_interrupt, Haltproc
|
.set DMA2_Channel1_Handler, Haltproc
|
||||||
.set DMA2_Channel2_interrupt, Haltproc
|
.set DMA2_Channel2_Handler, Haltproc
|
||||||
.set DMA2_Channel3_interrupt, Haltproc
|
.set DMA2_Channel3_Handler, Haltproc
|
||||||
.set DMA2_Channel4_5_interrupt, Haltproc
|
.set DMA2_Channel4_5_Handler, Haltproc
|
||||||
|
|
||||||
.text
|
.text
|
||||||
end;
|
end;
|
||||||
|
|||||||
@ -1,4 +1,28 @@
|
|||||||
unit stm32f401xe;
|
unit stm32f401xe;
|
||||||
|
(**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f401xe.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief CMSIS STM32F401xE Device Peripheral Access Layer Header File.
|
||||||
|
*
|
||||||
|
* This file contains:
|
||||||
|
* - Data structures and the address mapping for all peripherals
|
||||||
|
* - peripherals registers declarations and bits definition
|
||||||
|
* - Macros to access peripheral’s registers hardware
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*)
|
||||||
interface
|
interface
|
||||||
{$PACKRECORDS C}
|
{$PACKRECORDS C}
|
||||||
{$GOTO ON}
|
{$GOTO ON}
|
||||||
@ -581,70 +605,70 @@ var
|
|||||||
|
|
||||||
implementation
|
implementation
|
||||||
|
|
||||||
procedure NonMaskableInt_interrupt; external name 'NonMaskableInt_interrupt';
|
procedure NonMaskableInt_Handler; external name 'NonMaskableInt_Handler';
|
||||||
procedure MemoryManagement_interrupt; external name 'MemoryManagement_interrupt';
|
procedure MemoryManagement_Handler; external name 'MemoryManagement_Handler';
|
||||||
procedure BusFault_interrupt; external name 'BusFault_interrupt';
|
procedure BusFault_Handler; external name 'BusFault_Handler';
|
||||||
procedure UsageFault_interrupt; external name 'UsageFault_interrupt';
|
procedure UsageFault_Handler; external name 'UsageFault_Handler';
|
||||||
procedure SVCall_interrupt; external name 'SVCall_interrupt';
|
procedure SVCall_Handler; external name 'SVCall_Handler';
|
||||||
procedure DebugMonitor_interrupt; external name 'DebugMonitor_interrupt';
|
procedure DebugMonitor_Handler; external name 'DebugMonitor_Handler';
|
||||||
procedure PendSV_interrupt; external name 'PendSV_interrupt';
|
procedure PendSV_Handler; external name 'PendSV_Handler';
|
||||||
procedure SysTick_interrupt; external name 'SysTick_interrupt';
|
procedure SysTick_Handler; external name 'SysTick_Handler';
|
||||||
procedure WWDG_interrupt; external name 'WWDG_interrupt';
|
procedure WWDG_Handler; external name 'WWDG_Handler';
|
||||||
procedure PVD_interrupt; external name 'PVD_interrupt';
|
procedure PVD_Handler; external name 'PVD_Handler';
|
||||||
procedure TAMP_STAMP_interrupt; external name 'TAMP_STAMP_interrupt';
|
procedure TAMP_STAMP_Handler; external name 'TAMP_STAMP_Handler';
|
||||||
procedure RTC_WKUP_interrupt; external name 'RTC_WKUP_interrupt';
|
procedure RTC_WKUP_Handler; external name 'RTC_WKUP_Handler';
|
||||||
procedure FLASH_interrupt; external name 'FLASH_interrupt';
|
procedure FLASH_Handler; external name 'FLASH_Handler';
|
||||||
procedure RCC_interrupt; external name 'RCC_interrupt';
|
procedure RCC_Handler; external name 'RCC_Handler';
|
||||||
procedure EXTI0_interrupt; external name 'EXTI0_interrupt';
|
procedure EXTI0_Handler; external name 'EXTI0_Handler';
|
||||||
procedure EXTI1_interrupt; external name 'EXTI1_interrupt';
|
procedure EXTI1_Handler; external name 'EXTI1_Handler';
|
||||||
procedure EXTI2_interrupt; external name 'EXTI2_interrupt';
|
procedure EXTI2_Handler; external name 'EXTI2_Handler';
|
||||||
procedure EXTI3_interrupt; external name 'EXTI3_interrupt';
|
procedure EXTI3_Handler; external name 'EXTI3_Handler';
|
||||||
procedure EXTI4_interrupt; external name 'EXTI4_interrupt';
|
procedure EXTI4_Handler; external name 'EXTI4_Handler';
|
||||||
procedure DMA1_Stream0_interrupt; external name 'DMA1_Stream0_interrupt';
|
procedure DMA1_Stream0_Handler; external name 'DMA1_Stream0_Handler';
|
||||||
procedure DMA1_Stream1_interrupt; external name 'DMA1_Stream1_interrupt';
|
procedure DMA1_Stream1_Handler; external name 'DMA1_Stream1_Handler';
|
||||||
procedure DMA1_Stream2_interrupt; external name 'DMA1_Stream2_interrupt';
|
procedure DMA1_Stream2_Handler; external name 'DMA1_Stream2_Handler';
|
||||||
procedure DMA1_Stream3_interrupt; external name 'DMA1_Stream3_interrupt';
|
procedure DMA1_Stream3_Handler; external name 'DMA1_Stream3_Handler';
|
||||||
procedure DMA1_Stream4_interrupt; external name 'DMA1_Stream4_interrupt';
|
procedure DMA1_Stream4_Handler; external name 'DMA1_Stream4_Handler';
|
||||||
procedure DMA1_Stream5_interrupt; external name 'DMA1_Stream5_interrupt';
|
procedure DMA1_Stream5_Handler; external name 'DMA1_Stream5_Handler';
|
||||||
procedure DMA1_Stream6_interrupt; external name 'DMA1_Stream6_interrupt';
|
procedure DMA1_Stream6_Handler; external name 'DMA1_Stream6_Handler';
|
||||||
procedure ADC_interrupt; external name 'ADC_interrupt';
|
procedure ADC_Handler; external name 'ADC_Handler';
|
||||||
procedure EXTI9_5_interrupt; external name 'EXTI9_5_interrupt';
|
procedure EXTI9_5_Handler; external name 'EXTI9_5_Handler';
|
||||||
procedure TIM1_BRK_TIM9_interrupt; external name 'TIM1_BRK_TIM9_interrupt';
|
procedure TIM1_BRK_TIM9_Handler; external name 'TIM1_BRK_TIM9_Handler';
|
||||||
procedure TIM1_UP_TIM10_interrupt; external name 'TIM1_UP_TIM10_interrupt';
|
procedure TIM1_UP_TIM10_Handler; external name 'TIM1_UP_TIM10_Handler';
|
||||||
procedure TIM1_TRG_COM_TIM11_interrupt; external name 'TIM1_TRG_COM_TIM11_interrupt';
|
procedure TIM1_TRG_COM_TIM11_Handler; external name 'TIM1_TRG_COM_TIM11_Handler';
|
||||||
procedure TIM1_CC_interrupt; external name 'TIM1_CC_interrupt';
|
procedure TIM1_CC_Handler; external name 'TIM1_CC_Handler';
|
||||||
procedure TIM2_interrupt; external name 'TIM2_interrupt';
|
procedure TIM2_Handler; external name 'TIM2_Handler';
|
||||||
procedure TIM3_interrupt; external name 'TIM3_interrupt';
|
procedure TIM3_Handler; external name 'TIM3_Handler';
|
||||||
procedure TIM4_interrupt; external name 'TIM4_interrupt';
|
procedure TIM4_Handler; external name 'TIM4_Handler';
|
||||||
procedure I2C1_EV_interrupt; external name 'I2C1_EV_interrupt';
|
procedure I2C1_EV_Handler; external name 'I2C1_EV_Handler';
|
||||||
procedure I2C1_ER_interrupt; external name 'I2C1_ER_interrupt';
|
procedure I2C1_ER_Handler; external name 'I2C1_ER_Handler';
|
||||||
procedure I2C2_EV_interrupt; external name 'I2C2_EV_interrupt';
|
procedure I2C2_EV_Handler; external name 'I2C2_EV_Handler';
|
||||||
procedure I2C2_ER_interrupt; external name 'I2C2_ER_interrupt';
|
procedure I2C2_ER_Handler; external name 'I2C2_ER_Handler';
|
||||||
procedure SPI1_interrupt; external name 'SPI1_interrupt';
|
procedure SPI1_Handler; external name 'SPI1_Handler';
|
||||||
procedure SPI2_interrupt; external name 'SPI2_interrupt';
|
procedure SPI2_Handler; external name 'SPI2_Handler';
|
||||||
procedure USART1_interrupt; external name 'USART1_interrupt';
|
procedure USART1_Handler; external name 'USART1_Handler';
|
||||||
procedure USART2_interrupt; external name 'USART2_interrupt';
|
procedure USART2_Handler; external name 'USART2_Handler';
|
||||||
procedure EXTI15_10_interrupt; external name 'EXTI15_10_interrupt';
|
procedure EXTI15_10_Handler; external name 'EXTI15_10_Handler';
|
||||||
procedure RTC_Alarm_interrupt; external name 'RTC_Alarm_interrupt';
|
procedure RTC_Alarm_Handler; external name 'RTC_Alarm_Handler';
|
||||||
procedure OTG_FS_WKUP_interrupt; external name 'OTG_FS_WKUP_interrupt';
|
procedure OTG_FS_WKUP_Handler; external name 'OTG_FS_WKUP_Handler';
|
||||||
procedure DMA1_Stream7_interrupt; external name 'DMA1_Stream7_interrupt';
|
procedure DMA1_Stream7_Handler; external name 'DMA1_Stream7_Handler';
|
||||||
procedure SDIO_interrupt; external name 'SDIO_interrupt';
|
procedure SDIO_Handler; external name 'SDIO_Handler';
|
||||||
procedure TIM5_interrupt; external name 'TIM5_interrupt';
|
procedure TIM5_Handler; external name 'TIM5_Handler';
|
||||||
procedure SPI3_interrupt; external name 'SPI3_interrupt';
|
procedure SPI3_Handler; external name 'SPI3_Handler';
|
||||||
procedure DMA2_Stream0_interrupt; external name 'DMA2_Stream0_interrupt';
|
procedure DMA2_Stream0_Handler; external name 'DMA2_Stream0_Handler';
|
||||||
procedure DMA2_Stream1_interrupt; external name 'DMA2_Stream1_interrupt';
|
procedure DMA2_Stream1_Handler; external name 'DMA2_Stream1_Handler';
|
||||||
procedure DMA2_Stream2_interrupt; external name 'DMA2_Stream2_interrupt';
|
procedure DMA2_Stream2_Handler; external name 'DMA2_Stream2_Handler';
|
||||||
procedure DMA2_Stream3_interrupt; external name 'DMA2_Stream3_interrupt';
|
procedure DMA2_Stream3_Handler; external name 'DMA2_Stream3_Handler';
|
||||||
procedure DMA2_Stream4_interrupt; external name 'DMA2_Stream4_interrupt';
|
procedure DMA2_Stream4_Handler; external name 'DMA2_Stream4_Handler';
|
||||||
procedure OTG_FS_interrupt; external name 'OTG_FS_interrupt';
|
procedure OTG_FS_Handler; external name 'OTG_FS_Handler';
|
||||||
procedure DMA2_Stream5_interrupt; external name 'DMA2_Stream5_interrupt';
|
procedure DMA2_Stream5_Handler; external name 'DMA2_Stream5_Handler';
|
||||||
procedure DMA2_Stream6_interrupt; external name 'DMA2_Stream6_interrupt';
|
procedure DMA2_Stream6_Handler; external name 'DMA2_Stream6_Handler';
|
||||||
procedure DMA2_Stream7_interrupt; external name 'DMA2_Stream7_interrupt';
|
procedure DMA2_Stream7_Handler; external name 'DMA2_Stream7_Handler';
|
||||||
procedure USART6_interrupt; external name 'USART6_interrupt';
|
procedure USART6_Handler; external name 'USART6_Handler';
|
||||||
procedure I2C3_EV_interrupt; external name 'I2C3_EV_interrupt';
|
procedure I2C3_EV_Handler; external name 'I2C3_EV_Handler';
|
||||||
procedure I2C3_ER_interrupt; external name 'I2C3_ER_interrupt';
|
procedure I2C3_ER_Handler; external name 'I2C3_ER_Handler';
|
||||||
procedure FPU_interrupt; external name 'FPU_interrupt';
|
procedure FPU_Handler; external name 'FPU_Handler';
|
||||||
procedure SPI4_interrupt; external name 'SPI4_interrupt';
|
procedure SPI4_Handler; external name 'SPI4_Handler';
|
||||||
|
|
||||||
|
|
||||||
{$i cortexm4f_start.inc}
|
{$i cortexm4f_start.inc}
|
||||||
@ -656,94 +680,94 @@ asm
|
|||||||
interrupt_vectors:
|
interrupt_vectors:
|
||||||
.long _stack_top
|
.long _stack_top
|
||||||
.long Startup
|
.long Startup
|
||||||
.long NonMaskableInt_interrupt
|
.long NonMaskableInt_Handler
|
||||||
.long 0
|
.long 0
|
||||||
.long MemoryManagement_interrupt
|
.long MemoryManagement_Handler
|
||||||
.long BusFault_interrupt
|
.long BusFault_Handler
|
||||||
.long UsageFault_interrupt
|
.long UsageFault_Handler
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long SVCall_interrupt
|
.long SVCall_Handler
|
||||||
.long DebugMonitor_interrupt
|
.long DebugMonitor_Handler
|
||||||
.long 0
|
.long 0
|
||||||
.long PendSV_interrupt
|
.long PendSV_Handler
|
||||||
.long SysTick_interrupt
|
.long SysTick_Handler
|
||||||
.long WWDG_interrupt
|
.long WWDG_Handler
|
||||||
.long PVD_interrupt
|
.long PVD_Handler
|
||||||
.long TAMP_STAMP_interrupt
|
.long TAMP_STAMP_Handler
|
||||||
.long RTC_WKUP_interrupt
|
.long RTC_WKUP_Handler
|
||||||
.long FLASH_interrupt
|
.long FLASH_Handler
|
||||||
.long RCC_interrupt
|
.long RCC_Handler
|
||||||
.long EXTI0_interrupt
|
.long EXTI0_Handler
|
||||||
.long EXTI1_interrupt
|
.long EXTI1_Handler
|
||||||
.long EXTI2_interrupt
|
.long EXTI2_Handler
|
||||||
.long EXTI3_interrupt
|
.long EXTI3_Handler
|
||||||
.long EXTI4_interrupt
|
.long EXTI4_Handler
|
||||||
.long DMA1_Stream0_interrupt
|
.long DMA1_Stream0_Handler
|
||||||
.long DMA1_Stream1_interrupt
|
.long DMA1_Stream1_Handler
|
||||||
.long DMA1_Stream2_interrupt
|
.long DMA1_Stream2_Handler
|
||||||
.long DMA1_Stream3_interrupt
|
.long DMA1_Stream3_Handler
|
||||||
.long DMA1_Stream4_interrupt
|
.long DMA1_Stream4_Handler
|
||||||
.long DMA1_Stream5_interrupt
|
.long DMA1_Stream5_Handler
|
||||||
.long DMA1_Stream6_interrupt
|
.long DMA1_Stream6_Handler
|
||||||
.long ADC_interrupt
|
.long ADC_Handler
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long EXTI9_5_interrupt
|
.long EXTI9_5_Handler
|
||||||
.long TIM1_BRK_TIM9_interrupt
|
.long TIM1_BRK_TIM9_Handler
|
||||||
.long TIM1_UP_TIM10_interrupt
|
.long TIM1_UP_TIM10_Handler
|
||||||
.long TIM1_TRG_COM_TIM11_interrupt
|
.long TIM1_TRG_COM_TIM11_Handler
|
||||||
.long TIM1_CC_interrupt
|
.long TIM1_CC_Handler
|
||||||
.long TIM2_interrupt
|
.long TIM2_Handler
|
||||||
.long TIM3_interrupt
|
.long TIM3_Handler
|
||||||
.long TIM4_interrupt
|
.long TIM4_Handler
|
||||||
.long I2C1_EV_interrupt
|
.long I2C1_EV_Handler
|
||||||
.long I2C1_ER_interrupt
|
.long I2C1_ER_Handler
|
||||||
.long I2C2_EV_interrupt
|
.long I2C2_EV_Handler
|
||||||
.long I2C2_ER_interrupt
|
.long I2C2_ER_Handler
|
||||||
.long SPI1_interrupt
|
.long SPI1_Handler
|
||||||
.long SPI2_interrupt
|
.long SPI2_Handler
|
||||||
.long USART1_interrupt
|
.long USART1_Handler
|
||||||
.long USART2_interrupt
|
.long USART2_Handler
|
||||||
.long 0
|
.long 0
|
||||||
.long EXTI15_10_interrupt
|
.long EXTI15_10_Handler
|
||||||
.long RTC_Alarm_interrupt
|
.long RTC_Alarm_Handler
|
||||||
.long OTG_FS_WKUP_interrupt
|
.long OTG_FS_WKUP_Handler
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long DMA1_Stream7_interrupt
|
.long DMA1_Stream7_Handler
|
||||||
.long 0
|
.long 0
|
||||||
.long SDIO_interrupt
|
.long SDIO_Handler
|
||||||
.long TIM5_interrupt
|
.long TIM5_Handler
|
||||||
.long SPI3_interrupt
|
.long SPI3_Handler
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long DMA2_Stream0_interrupt
|
.long DMA2_Stream0_Handler
|
||||||
.long DMA2_Stream1_interrupt
|
.long DMA2_Stream1_Handler
|
||||||
.long DMA2_Stream2_interrupt
|
.long DMA2_Stream2_Handler
|
||||||
.long DMA2_Stream3_interrupt
|
.long DMA2_Stream3_Handler
|
||||||
.long DMA2_Stream4_interrupt
|
.long DMA2_Stream4_Handler
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long OTG_FS_interrupt
|
.long OTG_FS_Handler
|
||||||
.long DMA2_Stream5_interrupt
|
.long DMA2_Stream5_Handler
|
||||||
.long DMA2_Stream6_interrupt
|
.long DMA2_Stream6_Handler
|
||||||
.long DMA2_Stream7_interrupt
|
.long DMA2_Stream7_Handler
|
||||||
.long USART6_interrupt
|
.long USART6_Handler
|
||||||
.long I2C3_EV_interrupt
|
.long I2C3_EV_Handler
|
||||||
.long I2C3_ER_interrupt
|
.long I2C3_ER_Handler
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
@ -751,140 +775,140 @@ asm
|
|||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long FPU_interrupt
|
.long FPU_Handler
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long SPI4_interrupt
|
.long SPI4_Handler
|
||||||
|
|
||||||
.weak NonMaskableInt_interrupt
|
.weak NonMaskableInt_Handler
|
||||||
.weak MemoryManagement_interrupt
|
.weak MemoryManagement_Handler
|
||||||
.weak BusFault_interrupt
|
.weak BusFault_Handler
|
||||||
.weak UsageFault_interrupt
|
.weak UsageFault_Handler
|
||||||
.weak SVCall_interrupt
|
.weak SVCall_Handler
|
||||||
.weak DebugMonitor_interrupt
|
.weak DebugMonitor_Handler
|
||||||
.weak PendSV_interrupt
|
.weak PendSV_Handler
|
||||||
.weak SysTick_interrupt
|
.weak SysTick_Handler
|
||||||
.weak WWDG_interrupt
|
.weak WWDG_Handler
|
||||||
.weak PVD_interrupt
|
.weak PVD_Handler
|
||||||
.weak TAMP_STAMP_interrupt
|
.weak TAMP_STAMP_Handler
|
||||||
.weak RTC_WKUP_interrupt
|
.weak RTC_WKUP_Handler
|
||||||
.weak FLASH_interrupt
|
.weak FLASH_Handler
|
||||||
.weak RCC_interrupt
|
.weak RCC_Handler
|
||||||
.weak EXTI0_interrupt
|
.weak EXTI0_Handler
|
||||||
.weak EXTI1_interrupt
|
.weak EXTI1_Handler
|
||||||
.weak EXTI2_interrupt
|
.weak EXTI2_Handler
|
||||||
.weak EXTI3_interrupt
|
.weak EXTI3_Handler
|
||||||
.weak EXTI4_interrupt
|
.weak EXTI4_Handler
|
||||||
.weak DMA1_Stream0_interrupt
|
.weak DMA1_Stream0_Handler
|
||||||
.weak DMA1_Stream1_interrupt
|
.weak DMA1_Stream1_Handler
|
||||||
.weak DMA1_Stream2_interrupt
|
.weak DMA1_Stream2_Handler
|
||||||
.weak DMA1_Stream3_interrupt
|
.weak DMA1_Stream3_Handler
|
||||||
.weak DMA1_Stream4_interrupt
|
.weak DMA1_Stream4_Handler
|
||||||
.weak DMA1_Stream5_interrupt
|
.weak DMA1_Stream5_Handler
|
||||||
.weak DMA1_Stream6_interrupt
|
.weak DMA1_Stream6_Handler
|
||||||
.weak ADC_interrupt
|
.weak ADC_Handler
|
||||||
.weak EXTI9_5_interrupt
|
.weak EXTI9_5_Handler
|
||||||
.weak TIM1_BRK_TIM9_interrupt
|
.weak TIM1_BRK_TIM9_Handler
|
||||||
.weak TIM1_UP_TIM10_interrupt
|
.weak TIM1_UP_TIM10_Handler
|
||||||
.weak TIM1_TRG_COM_TIM11_interrupt
|
.weak TIM1_TRG_COM_TIM11_Handler
|
||||||
.weak TIM1_CC_interrupt
|
.weak TIM1_CC_Handler
|
||||||
.weak TIM2_interrupt
|
.weak TIM2_Handler
|
||||||
.weak TIM3_interrupt
|
.weak TIM3_Handler
|
||||||
.weak TIM4_interrupt
|
.weak TIM4_Handler
|
||||||
.weak I2C1_EV_interrupt
|
.weak I2C1_EV_Handler
|
||||||
.weak I2C1_ER_interrupt
|
.weak I2C1_ER_Handler
|
||||||
.weak I2C2_EV_interrupt
|
.weak I2C2_EV_Handler
|
||||||
.weak I2C2_ER_interrupt
|
.weak I2C2_ER_Handler
|
||||||
.weak SPI1_interrupt
|
.weak SPI1_Handler
|
||||||
.weak SPI2_interrupt
|
.weak SPI2_Handler
|
||||||
.weak USART1_interrupt
|
.weak USART1_Handler
|
||||||
.weak USART2_interrupt
|
.weak USART2_Handler
|
||||||
.weak EXTI15_10_interrupt
|
.weak EXTI15_10_Handler
|
||||||
.weak RTC_Alarm_interrupt
|
.weak RTC_Alarm_Handler
|
||||||
.weak OTG_FS_WKUP_interrupt
|
.weak OTG_FS_WKUP_Handler
|
||||||
.weak DMA1_Stream7_interrupt
|
.weak DMA1_Stream7_Handler
|
||||||
.weak SDIO_interrupt
|
.weak SDIO_Handler
|
||||||
.weak TIM5_interrupt
|
.weak TIM5_Handler
|
||||||
.weak SPI3_interrupt
|
.weak SPI3_Handler
|
||||||
.weak DMA2_Stream0_interrupt
|
.weak DMA2_Stream0_Handler
|
||||||
.weak DMA2_Stream1_interrupt
|
.weak DMA2_Stream1_Handler
|
||||||
.weak DMA2_Stream2_interrupt
|
.weak DMA2_Stream2_Handler
|
||||||
.weak DMA2_Stream3_interrupt
|
.weak DMA2_Stream3_Handler
|
||||||
.weak DMA2_Stream4_interrupt
|
.weak DMA2_Stream4_Handler
|
||||||
.weak OTG_FS_interrupt
|
.weak OTG_FS_Handler
|
||||||
.weak DMA2_Stream5_interrupt
|
.weak DMA2_Stream5_Handler
|
||||||
.weak DMA2_Stream6_interrupt
|
.weak DMA2_Stream6_Handler
|
||||||
.weak DMA2_Stream7_interrupt
|
.weak DMA2_Stream7_Handler
|
||||||
.weak USART6_interrupt
|
.weak USART6_Handler
|
||||||
.weak I2C3_EV_interrupt
|
.weak I2C3_EV_Handler
|
||||||
.weak I2C3_ER_interrupt
|
.weak I2C3_ER_Handler
|
||||||
.weak FPU_interrupt
|
.weak FPU_Handler
|
||||||
.weak SPI4_interrupt
|
.weak SPI4_Handler
|
||||||
|
|
||||||
.set NonMaskableInt_interrupt, Haltproc
|
.set NonMaskableInt_Handler, Haltproc
|
||||||
.set MemoryManagement_interrupt, Haltproc
|
.set MemoryManagement_Handler, Haltproc
|
||||||
.set BusFault_interrupt, Haltproc
|
.set BusFault_Handler, Haltproc
|
||||||
.set UsageFault_interrupt, Haltproc
|
.set UsageFault_Handler, Haltproc
|
||||||
.set SVCall_interrupt, Haltproc
|
.set SVCall_Handler, Haltproc
|
||||||
.set DebugMonitor_interrupt, Haltproc
|
.set DebugMonitor_Handler, Haltproc
|
||||||
.set PendSV_interrupt, Haltproc
|
.set PendSV_Handler, Haltproc
|
||||||
.set SysTick_interrupt, Haltproc
|
.set SysTick_Handler, Haltproc
|
||||||
.set WWDG_interrupt, Haltproc
|
.set WWDG_Handler, Haltproc
|
||||||
.set PVD_interrupt, Haltproc
|
.set PVD_Handler, Haltproc
|
||||||
.set TAMP_STAMP_interrupt, Haltproc
|
.set TAMP_STAMP_Handler, Haltproc
|
||||||
.set RTC_WKUP_interrupt, Haltproc
|
.set RTC_WKUP_Handler, Haltproc
|
||||||
.set FLASH_interrupt, Haltproc
|
.set FLASH_Handler, Haltproc
|
||||||
.set RCC_interrupt, Haltproc
|
.set RCC_Handler, Haltproc
|
||||||
.set EXTI0_interrupt, Haltproc
|
.set EXTI0_Handler, Haltproc
|
||||||
.set EXTI1_interrupt, Haltproc
|
.set EXTI1_Handler, Haltproc
|
||||||
.set EXTI2_interrupt, Haltproc
|
.set EXTI2_Handler, Haltproc
|
||||||
.set EXTI3_interrupt, Haltproc
|
.set EXTI3_Handler, Haltproc
|
||||||
.set EXTI4_interrupt, Haltproc
|
.set EXTI4_Handler, Haltproc
|
||||||
.set DMA1_Stream0_interrupt, Haltproc
|
.set DMA1_Stream0_Handler, Haltproc
|
||||||
.set DMA1_Stream1_interrupt, Haltproc
|
.set DMA1_Stream1_Handler, Haltproc
|
||||||
.set DMA1_Stream2_interrupt, Haltproc
|
.set DMA1_Stream2_Handler, Haltproc
|
||||||
.set DMA1_Stream3_interrupt, Haltproc
|
.set DMA1_Stream3_Handler, Haltproc
|
||||||
.set DMA1_Stream4_interrupt, Haltproc
|
.set DMA1_Stream4_Handler, Haltproc
|
||||||
.set DMA1_Stream5_interrupt, Haltproc
|
.set DMA1_Stream5_Handler, Haltproc
|
||||||
.set DMA1_Stream6_interrupt, Haltproc
|
.set DMA1_Stream6_Handler, Haltproc
|
||||||
.set ADC_interrupt, Haltproc
|
.set ADC_Handler, Haltproc
|
||||||
.set EXTI9_5_interrupt, Haltproc
|
.set EXTI9_5_Handler, Haltproc
|
||||||
.set TIM1_BRK_TIM9_interrupt, Haltproc
|
.set TIM1_BRK_TIM9_Handler, Haltproc
|
||||||
.set TIM1_UP_TIM10_interrupt, Haltproc
|
.set TIM1_UP_TIM10_Handler, Haltproc
|
||||||
.set TIM1_TRG_COM_TIM11_interrupt, Haltproc
|
.set TIM1_TRG_COM_TIM11_Handler, Haltproc
|
||||||
.set TIM1_CC_interrupt, Haltproc
|
.set TIM1_CC_Handler, Haltproc
|
||||||
.set TIM2_interrupt, Haltproc
|
.set TIM2_Handler, Haltproc
|
||||||
.set TIM3_interrupt, Haltproc
|
.set TIM3_Handler, Haltproc
|
||||||
.set TIM4_interrupt, Haltproc
|
.set TIM4_Handler, Haltproc
|
||||||
.set I2C1_EV_interrupt, Haltproc
|
.set I2C1_EV_Handler, Haltproc
|
||||||
.set I2C1_ER_interrupt, Haltproc
|
.set I2C1_ER_Handler, Haltproc
|
||||||
.set I2C2_EV_interrupt, Haltproc
|
.set I2C2_EV_Handler, Haltproc
|
||||||
.set I2C2_ER_interrupt, Haltproc
|
.set I2C2_ER_Handler, Haltproc
|
||||||
.set SPI1_interrupt, Haltproc
|
.set SPI1_Handler, Haltproc
|
||||||
.set SPI2_interrupt, Haltproc
|
.set SPI2_Handler, Haltproc
|
||||||
.set USART1_interrupt, Haltproc
|
.set USART1_Handler, Haltproc
|
||||||
.set USART2_interrupt, Haltproc
|
.set USART2_Handler, Haltproc
|
||||||
.set EXTI15_10_interrupt, Haltproc
|
.set EXTI15_10_Handler, Haltproc
|
||||||
.set RTC_Alarm_interrupt, Haltproc
|
.set RTC_Alarm_Handler, Haltproc
|
||||||
.set OTG_FS_WKUP_interrupt, Haltproc
|
.set OTG_FS_WKUP_Handler, Haltproc
|
||||||
.set DMA1_Stream7_interrupt, Haltproc
|
.set DMA1_Stream7_Handler, Haltproc
|
||||||
.set SDIO_interrupt, Haltproc
|
.set SDIO_Handler, Haltproc
|
||||||
.set TIM5_interrupt, Haltproc
|
.set TIM5_Handler, Haltproc
|
||||||
.set SPI3_interrupt, Haltproc
|
.set SPI3_Handler, Haltproc
|
||||||
.set DMA2_Stream0_interrupt, Haltproc
|
.set DMA2_Stream0_Handler, Haltproc
|
||||||
.set DMA2_Stream1_interrupt, Haltproc
|
.set DMA2_Stream1_Handler, Haltproc
|
||||||
.set DMA2_Stream2_interrupt, Haltproc
|
.set DMA2_Stream2_Handler, Haltproc
|
||||||
.set DMA2_Stream3_interrupt, Haltproc
|
.set DMA2_Stream3_Handler, Haltproc
|
||||||
.set DMA2_Stream4_interrupt, Haltproc
|
.set DMA2_Stream4_Handler, Haltproc
|
||||||
.set OTG_FS_interrupt, Haltproc
|
.set OTG_FS_Handler, Haltproc
|
||||||
.set DMA2_Stream5_interrupt, Haltproc
|
.set DMA2_Stream5_Handler, Haltproc
|
||||||
.set DMA2_Stream6_interrupt, Haltproc
|
.set DMA2_Stream6_Handler, Haltproc
|
||||||
.set DMA2_Stream7_interrupt, Haltproc
|
.set DMA2_Stream7_Handler, Haltproc
|
||||||
.set USART6_interrupt, Haltproc
|
.set USART6_Handler, Haltproc
|
||||||
.set I2C3_EV_interrupt, Haltproc
|
.set I2C3_EV_Handler, Haltproc
|
||||||
.set I2C3_ER_interrupt, Haltproc
|
.set I2C3_ER_Handler, Haltproc
|
||||||
.set FPU_interrupt, Haltproc
|
.set FPU_Handler, Haltproc
|
||||||
.set SPI4_interrupt, Haltproc
|
.set SPI4_Handler, Haltproc
|
||||||
|
|
||||||
.text
|
.text
|
||||||
end;
|
end;
|
||||||
|
|||||||
@ -1,4 +1,30 @@
|
|||||||
unit stm32g071xx;
|
unit stm32g071xx;
|
||||||
|
(**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32g071xx.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer Header File.
|
||||||
|
* This file contains all the peripheral register's definitions, bits
|
||||||
|
* definitions and memory mapping for stm32g071xx devices.
|
||||||
|
*
|
||||||
|
* This file contains:
|
||||||
|
* - Data structures and the address mapping for all peripherals
|
||||||
|
* - Peripheral's registers declarations and bits definition
|
||||||
|
* - Macros to access peripheral's registers hardware
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© Copyright (c) 2018 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*)
|
||||||
interface
|
interface
|
||||||
{$PACKRECORDS C}
|
{$PACKRECORDS C}
|
||||||
{$GOTO ON}
|
{$GOTO ON}
|
||||||
@ -588,42 +614,42 @@ var
|
|||||||
|
|
||||||
implementation
|
implementation
|
||||||
|
|
||||||
procedure NonMaskableInt_interrupt; external name 'NonMaskableInt_interrupt';
|
procedure NonMaskableInt_Handler; external name 'NonMaskableInt_Handler';
|
||||||
procedure HardFault_interrupt; external name 'HardFault_interrupt';
|
procedure HardFault_Handler; external name 'HardFault_Handler';
|
||||||
procedure SVC_interrupt; external name 'SVC_interrupt';
|
procedure SVC_Handler; external name 'SVC_Handler';
|
||||||
procedure PendSV_interrupt; external name 'PendSV_interrupt';
|
procedure PendSV_Handler; external name 'PendSV_Handler';
|
||||||
procedure SysTick_interrupt; external name 'SysTick_interrupt';
|
procedure SysTick_Handler; external name 'SysTick_Handler';
|
||||||
procedure WWDG_interrupt; external name 'WWDG_interrupt';
|
procedure WWDG_Handler; external name 'WWDG_Handler';
|
||||||
procedure PVD_interrupt; external name 'PVD_interrupt';
|
procedure PVD_Handler; external name 'PVD_Handler';
|
||||||
procedure RTC_TAMP_interrupt; external name 'RTC_TAMP_interrupt';
|
procedure RTC_TAMP_Handler; external name 'RTC_TAMP_Handler';
|
||||||
procedure FLASH_interrupt; external name 'FLASH_interrupt';
|
procedure FLASH_Handler; external name 'FLASH_Handler';
|
||||||
procedure RCC_interrupt; external name 'RCC_interrupt';
|
procedure RCC_Handler; external name 'RCC_Handler';
|
||||||
procedure EXTI0_1_interrupt; external name 'EXTI0_1_interrupt';
|
procedure EXTI0_1_Handler; external name 'EXTI0_1_Handler';
|
||||||
procedure EXTI2_3_interrupt; external name 'EXTI2_3_interrupt';
|
procedure EXTI2_3_Handler; external name 'EXTI2_3_Handler';
|
||||||
procedure EXTI4_15_interrupt; external name 'EXTI4_15_interrupt';
|
procedure EXTI4_15_Handler; external name 'EXTI4_15_Handler';
|
||||||
procedure UCPD1_2_interrupt; external name 'UCPD1_2_interrupt';
|
procedure UCPD1_2_Handler; external name 'UCPD1_2_Handler';
|
||||||
procedure DMA1_Channel1_interrupt; external name 'DMA1_Channel1_interrupt';
|
procedure DMA1_Channel1_Handler; external name 'DMA1_Channel1_Handler';
|
||||||
procedure DMA1_Channel2_3_interrupt; external name 'DMA1_Channel2_3_interrupt';
|
procedure DMA1_Channel2_3_Handler; external name 'DMA1_Channel2_3_Handler';
|
||||||
procedure DMA1_Ch4_7_DMAMUX1_OVR_interrupt; external name 'DMA1_Ch4_7_DMAMUX1_OVR_interrupt';
|
procedure DMA1_Ch4_7_DMAMUX1_OVR_Handler; external name 'DMA1_Ch4_7_DMAMUX1_OVR_Handler';
|
||||||
procedure ADC1_COMP_interrupt; external name 'ADC1_COMP_interrupt';
|
procedure ADC1_COMP_Handler; external name 'ADC1_COMP_Handler';
|
||||||
procedure TIM1_BRK_UP_TRG_COM_interrupt; external name 'TIM1_BRK_UP_TRG_COM_interrupt';
|
procedure TIM1_BRK_UP_TRG_COM_Handler; external name 'TIM1_BRK_UP_TRG_COM_Handler';
|
||||||
procedure TIM1_CC_interrupt; external name 'TIM1_CC_interrupt';
|
procedure TIM1_CC_Handler; external name 'TIM1_CC_Handler';
|
||||||
procedure TIM2_interrupt; external name 'TIM2_interrupt';
|
procedure TIM2_Handler; external name 'TIM2_Handler';
|
||||||
procedure TIM3_interrupt; external name 'TIM3_interrupt';
|
procedure TIM3_Handler; external name 'TIM3_Handler';
|
||||||
procedure TIM6_DAC_LPTIM1_interrupt; external name 'TIM6_DAC_LPTIM1_interrupt';
|
procedure TIM6_DAC_LPTIM1_Handler; external name 'TIM6_DAC_LPTIM1_Handler';
|
||||||
procedure TIM7_LPTIM2_interrupt; external name 'TIM7_LPTIM2_interrupt';
|
procedure TIM7_LPTIM2_Handler; external name 'TIM7_LPTIM2_Handler';
|
||||||
procedure TIM14_interrupt; external name 'TIM14_interrupt';
|
procedure TIM14_Handler; external name 'TIM14_Handler';
|
||||||
procedure TIM15_interrupt; external name 'TIM15_interrupt';
|
procedure TIM15_Handler; external name 'TIM15_Handler';
|
||||||
procedure TIM16_interrupt; external name 'TIM16_interrupt';
|
procedure TIM16_Handler; external name 'TIM16_Handler';
|
||||||
procedure TIM17_interrupt; external name 'TIM17_interrupt';
|
procedure TIM17_Handler; external name 'TIM17_Handler';
|
||||||
procedure I2C1_interrupt; external name 'I2C1_interrupt';
|
procedure I2C1_Handler; external name 'I2C1_Handler';
|
||||||
procedure I2C2_interrupt; external name 'I2C2_interrupt';
|
procedure I2C2_Handler; external name 'I2C2_Handler';
|
||||||
procedure SPI1_interrupt; external name 'SPI1_interrupt';
|
procedure SPI1_Handler; external name 'SPI1_Handler';
|
||||||
procedure SPI2_interrupt; external name 'SPI2_interrupt';
|
procedure SPI2_Handler; external name 'SPI2_Handler';
|
||||||
procedure USART1_interrupt; external name 'USART1_interrupt';
|
procedure USART1_Handler; external name 'USART1_Handler';
|
||||||
procedure USART2_interrupt; external name 'USART2_interrupt';
|
procedure USART2_Handler; external name 'USART2_Handler';
|
||||||
procedure USART3_4_LPUART1_interrupt; external name 'USART3_4_LPUART1_interrupt';
|
procedure USART3_4_LPUART1_Handler; external name 'USART3_4_LPUART1_Handler';
|
||||||
procedure CEC_interrupt; external name 'CEC_interrupt';
|
procedure CEC_Handler; external name 'CEC_Handler';
|
||||||
|
|
||||||
|
|
||||||
{$i cortexm0_start.inc}
|
{$i cortexm0_start.inc}
|
||||||
@ -635,8 +661,8 @@ asm
|
|||||||
interrupt_vectors:
|
interrupt_vectors:
|
||||||
.long _stack_top
|
.long _stack_top
|
||||||
.long Startup
|
.long Startup
|
||||||
.long NonMaskableInt_interrupt
|
.long NonMaskableInt_Handler
|
||||||
.long HardFault_interrupt
|
.long HardFault_Handler
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
@ -644,116 +670,116 @@ asm
|
|||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long SVC_interrupt
|
.long SVC_Handler
|
||||||
.long 0
|
.long 0
|
||||||
.long 0
|
.long 0
|
||||||
.long PendSV_interrupt
|
.long PendSV_Handler
|
||||||
.long SysTick_interrupt
|
.long SysTick_Handler
|
||||||
.long WWDG_interrupt
|
.long WWDG_Handler
|
||||||
.long PVD_interrupt
|
.long PVD_Handler
|
||||||
.long RTC_TAMP_interrupt
|
.long RTC_TAMP_Handler
|
||||||
.long FLASH_interrupt
|
.long FLASH_Handler
|
||||||
.long RCC_interrupt
|
.long RCC_Handler
|
||||||
.long EXTI0_1_interrupt
|
.long EXTI0_1_Handler
|
||||||
.long EXTI2_3_interrupt
|
.long EXTI2_3_Handler
|
||||||
.long EXTI4_15_interrupt
|
.long EXTI4_15_Handler
|
||||||
.long UCPD1_2_interrupt
|
.long UCPD1_2_Handler
|
||||||
.long DMA1_Channel1_interrupt
|
.long DMA1_Channel1_Handler
|
||||||
.long DMA1_Channel2_3_interrupt
|
.long DMA1_Channel2_3_Handler
|
||||||
.long DMA1_Ch4_7_DMAMUX1_OVR_interrupt
|
.long DMA1_Ch4_7_DMAMUX1_OVR_Handler
|
||||||
.long ADC1_COMP_interrupt
|
.long ADC1_COMP_Handler
|
||||||
.long TIM1_BRK_UP_TRG_COM_interrupt
|
.long TIM1_BRK_UP_TRG_COM_Handler
|
||||||
.long TIM1_CC_interrupt
|
.long TIM1_CC_Handler
|
||||||
.long TIM2_interrupt
|
.long TIM2_Handler
|
||||||
.long TIM3_interrupt
|
.long TIM3_Handler
|
||||||
.long TIM6_DAC_LPTIM1_interrupt
|
.long TIM6_DAC_LPTIM1_Handler
|
||||||
.long TIM7_LPTIM2_interrupt
|
.long TIM7_LPTIM2_Handler
|
||||||
.long TIM14_interrupt
|
.long TIM14_Handler
|
||||||
.long TIM15_interrupt
|
.long TIM15_Handler
|
||||||
.long TIM16_interrupt
|
.long TIM16_Handler
|
||||||
.long TIM17_interrupt
|
.long TIM17_Handler
|
||||||
.long I2C1_interrupt
|
.long I2C1_Handler
|
||||||
.long I2C2_interrupt
|
.long I2C2_Handler
|
||||||
.long SPI1_interrupt
|
.long SPI1_Handler
|
||||||
.long SPI2_interrupt
|
.long SPI2_Handler
|
||||||
.long USART1_interrupt
|
.long USART1_Handler
|
||||||
.long USART2_interrupt
|
.long USART2_Handler
|
||||||
.long USART3_4_LPUART1_interrupt
|
.long USART3_4_LPUART1_Handler
|
||||||
.long CEC_interrupt
|
.long CEC_Handler
|
||||||
|
|
||||||
.weak NonMaskableInt_interrupt
|
.weak NonMaskableInt_Handler
|
||||||
.weak HardFault_interrupt
|
.weak HardFault_Handler
|
||||||
.weak SVC_interrupt
|
.weak SVC_Handler
|
||||||
.weak PendSV_interrupt
|
.weak PendSV_Handler
|
||||||
.weak SysTick_interrupt
|
.weak SysTick_Handler
|
||||||
.weak WWDG_interrupt
|
.weak WWDG_Handler
|
||||||
.weak PVD_interrupt
|
.weak PVD_Handler
|
||||||
.weak RTC_TAMP_interrupt
|
.weak RTC_TAMP_Handler
|
||||||
.weak FLASH_interrupt
|
.weak FLASH_Handler
|
||||||
.weak RCC_interrupt
|
.weak RCC_Handler
|
||||||
.weak EXTI0_1_interrupt
|
.weak EXTI0_1_Handler
|
||||||
.weak EXTI2_3_interrupt
|
.weak EXTI2_3_Handler
|
||||||
.weak EXTI4_15_interrupt
|
.weak EXTI4_15_Handler
|
||||||
.weak UCPD1_2_interrupt
|
.weak UCPD1_2_Handler
|
||||||
.weak DMA1_Channel1_interrupt
|
.weak DMA1_Channel1_Handler
|
||||||
.weak DMA1_Channel2_3_interrupt
|
.weak DMA1_Channel2_3_Handler
|
||||||
.weak DMA1_Ch4_7_DMAMUX1_OVR_interrupt
|
.weak DMA1_Ch4_7_DMAMUX1_OVR_Handler
|
||||||
.weak ADC1_COMP_interrupt
|
.weak ADC1_COMP_Handler
|
||||||
.weak TIM1_BRK_UP_TRG_COM_interrupt
|
.weak TIM1_BRK_UP_TRG_COM_Handler
|
||||||
.weak TIM1_CC_interrupt
|
.weak TIM1_CC_Handler
|
||||||
.weak TIM2_interrupt
|
.weak TIM2_Handler
|
||||||
.weak TIM3_interrupt
|
.weak TIM3_Handler
|
||||||
.weak TIM6_DAC_LPTIM1_interrupt
|
.weak TIM6_DAC_LPTIM1_Handler
|
||||||
.weak TIM7_LPTIM2_interrupt
|
.weak TIM7_LPTIM2_Handler
|
||||||
.weak TIM14_interrupt
|
.weak TIM14_Handler
|
||||||
.weak TIM15_interrupt
|
.weak TIM15_Handler
|
||||||
.weak TIM16_interrupt
|
.weak TIM16_Handler
|
||||||
.weak TIM17_interrupt
|
.weak TIM17_Handler
|
||||||
.weak I2C1_interrupt
|
.weak I2C1_Handler
|
||||||
.weak I2C2_interrupt
|
.weak I2C2_Handler
|
||||||
.weak SPI1_interrupt
|
.weak SPI1_Handler
|
||||||
.weak SPI2_interrupt
|
.weak SPI2_Handler
|
||||||
.weak USART1_interrupt
|
.weak USART1_Handler
|
||||||
.weak USART2_interrupt
|
.weak USART2_Handler
|
||||||
.weak USART3_4_LPUART1_interrupt
|
.weak USART3_4_LPUART1_Handler
|
||||||
.weak CEC_interrupt
|
.weak CEC_Handler
|
||||||
|
|
||||||
.set NonMaskableInt_interrupt, Haltproc
|
.set NonMaskableInt_Handler, Haltproc
|
||||||
.set HardFault_interrupt, Haltproc
|
.set HardFault_Handler, Haltproc
|
||||||
.set SVC_interrupt, Haltproc
|
.set SVC_Handler, Haltproc
|
||||||
.set PendSV_interrupt, Haltproc
|
.set PendSV_Handler, Haltproc
|
||||||
.set SysTick_interrupt, Haltproc
|
.set SysTick_Handler, Haltproc
|
||||||
.set WWDG_interrupt, Haltproc
|
.set WWDG_Handler, Haltproc
|
||||||
.set PVD_interrupt, Haltproc
|
.set PVD_Handler, Haltproc
|
||||||
.set RTC_TAMP_interrupt, Haltproc
|
.set RTC_TAMP_Handler, Haltproc
|
||||||
.set FLASH_interrupt, Haltproc
|
.set FLASH_Handler, Haltproc
|
||||||
.set RCC_interrupt, Haltproc
|
.set RCC_Handler, Haltproc
|
||||||
.set EXTI0_1_interrupt, Haltproc
|
.set EXTI0_1_Handler, Haltproc
|
||||||
.set EXTI2_3_interrupt, Haltproc
|
.set EXTI2_3_Handler, Haltproc
|
||||||
.set EXTI4_15_interrupt, Haltproc
|
.set EXTI4_15_Handler, Haltproc
|
||||||
.set UCPD1_2_interrupt, Haltproc
|
.set UCPD1_2_Handler, Haltproc
|
||||||
.set DMA1_Channel1_interrupt, Haltproc
|
.set DMA1_Channel1_Handler, Haltproc
|
||||||
.set DMA1_Channel2_3_interrupt, Haltproc
|
.set DMA1_Channel2_3_Handler, Haltproc
|
||||||
.set DMA1_Ch4_7_DMAMUX1_OVR_interrupt, Haltproc
|
.set DMA1_Ch4_7_DMAMUX1_OVR_Handler, Haltproc
|
||||||
.set ADC1_COMP_interrupt, Haltproc
|
.set ADC1_COMP_Handler, Haltproc
|
||||||
.set TIM1_BRK_UP_TRG_COM_interrupt, Haltproc
|
.set TIM1_BRK_UP_TRG_COM_Handler, Haltproc
|
||||||
.set TIM1_CC_interrupt, Haltproc
|
.set TIM1_CC_Handler, Haltproc
|
||||||
.set TIM2_interrupt, Haltproc
|
.set TIM2_Handler, Haltproc
|
||||||
.set TIM3_interrupt, Haltproc
|
.set TIM3_Handler, Haltproc
|
||||||
.set TIM6_DAC_LPTIM1_interrupt, Haltproc
|
.set TIM6_DAC_LPTIM1_Handler, Haltproc
|
||||||
.set TIM7_LPTIM2_interrupt, Haltproc
|
.set TIM7_LPTIM2_Handler, Haltproc
|
||||||
.set TIM14_interrupt, Haltproc
|
.set TIM14_Handler, Haltproc
|
||||||
.set TIM15_interrupt, Haltproc
|
.set TIM15_Handler, Haltproc
|
||||||
.set TIM16_interrupt, Haltproc
|
.set TIM16_Handler, Haltproc
|
||||||
.set TIM17_interrupt, Haltproc
|
.set TIM17_Handler, Haltproc
|
||||||
.set I2C1_interrupt, Haltproc
|
.set I2C1_Handler, Haltproc
|
||||||
.set I2C2_interrupt, Haltproc
|
.set I2C2_Handler, Haltproc
|
||||||
.set SPI1_interrupt, Haltproc
|
.set SPI1_Handler, Haltproc
|
||||||
.set SPI2_interrupt, Haltproc
|
.set SPI2_Handler, Haltproc
|
||||||
.set USART1_interrupt, Haltproc
|
.set USART1_Handler, Haltproc
|
||||||
.set USART2_interrupt, Haltproc
|
.set USART2_Handler, Haltproc
|
||||||
.set USART3_4_LPUART1_interrupt, Haltproc
|
.set USART3_4_LPUART1_Handler, Haltproc
|
||||||
.set CEC_interrupt, Haltproc
|
.set CEC_Handler, Haltproc
|
||||||
|
|
||||||
.text
|
.text
|
||||||
end;
|
end;
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user