From 2dd75e707ecf47cc4c443ad7c1ff8ca9dc6f4e84 Mon Sep 17 00:00:00 2001 From: Jonas Maebe Date: Sat, 1 Jun 2013 18:28:15 +0000 Subject: [PATCH] * renamed thlcgobj.tcgsize2orddef to defutil.cgsize_orddef git-svn-id: trunk@24743 - --- compiler/defutil.pas | 27 +++++++++++++++++++++ compiler/hlcg2ll.pas | 4 ++-- compiler/hlcgobj.pas | 46 ++++++++---------------------------- compiler/m68k/n68kadd.pas | 4 ++-- compiler/ncginl.pas | 2 +- compiler/ncgutil.pas | 4 ++-- compiler/ppcgen/ngppcadd.pas | 4 ++-- compiler/x86/nx86add.pas | 6 ++--- compiler/x86/nx86inl.pas | 2 +- compiler/x86/nx86set.pas | 2 +- compiler/x86_64/nx64mat.pas | 2 +- 11 files changed, 52 insertions(+), 51 deletions(-) diff --git a/compiler/defutil.pas b/compiler/defutil.pas index 42e9a315b7..8ae6747fce 100644 --- a/compiler/defutil.pas +++ b/compiler/defutil.pas @@ -293,6 +293,9 @@ interface to note that the value returned can be @var(OS_NO) } function def_cgsize(def: tdef): tcgsize; + { #Return an orddef (integer) correspondig to a tcgsize } + function cgsize_orddef(size: tcgsize): torddef; + {# returns true, if the type passed is can be used with windows automation } function is_automatable(p : tdef) : boolean; @@ -1244,6 +1247,30 @@ implementation end; end; + function cgsize_orddef(size: tcgsize): torddef; + begin + case size of + OS_8: + result:=torddef(u8inttype); + OS_S8: + result:=torddef(s8inttype); + OS_16: + result:=torddef(u16inttype); + OS_S16: + result:=torddef(s16inttype); + OS_32: + result:=torddef(u32inttype); + OS_S32: + result:=torddef(s32inttype); + OS_64: + result:=torddef(u64inttype); + OS_S64: + result:=torddef(s64inttype); + else + internalerror(2012050401); + end; + end; + { In Windows 95 era, ordinals were restricted to [u8bit,s32bit,s16bit,bool16bit] As of today, both signed and unsigned types from 8 to 64 bits are supported. } function is_automatable(p : tdef) : boolean; diff --git a/compiler/hlcg2ll.pas b/compiler/hlcg2ll.pas index ae8038b737..23dbcaf678 100644 --- a/compiler/hlcg2ll.pas +++ b/compiler/hlcg2ll.pas @@ -1342,12 +1342,12 @@ implementation force integer (memory) values in an mmregister } if (l.size in [OS_32,OS_S32]) then begin - size:=tcgsize2orddef(l.size); + size:=cgsize_orddef(l.size); newsize:=s32floattype; end else if (l.size in [OS_64,OS_S64]) then begin - size:=tcgsize2orddef(l.size); + size:=cgsize_orddef(l.size); newsize:=s64floattype; end else diff --git a/compiler/hlcgobj.pas b/compiler/hlcgobj.pas index 3d22782475..a377bf9e51 100644 --- a/compiler/hlcgobj.pas +++ b/compiler/hlcgobj.pas @@ -96,8 +96,6 @@ unit hlcgobj; by the compiler for any purpose other than parameter passing/function result loading, this is the register type used } function def2regtyp(def: tdef): tregistertype; virtual; - { # Returns orddef corresponding to size } - class function tcgsize2orddef(size: tcgsize): torddef; static; {# Emit a label to the instruction stream. } procedure a_label(list : TAsmList;l : tasmlabel); inline; @@ -718,30 +716,6 @@ implementation end; end; - class function thlcgobj.tcgsize2orddef(size: tcgsize): torddef; - begin - case size of - OS_8: - result:=torddef(u8inttype); - OS_S8: - result:=torddef(s8inttype); - OS_16: - result:=torddef(u16inttype); - OS_S16: - result:=torddef(s16inttype); - OS_32: - result:=torddef(u32inttype); - OS_S32: - result:=torddef(s32inttype); - OS_64: - result:=torddef(u64inttype); - OS_S64: - result:=torddef(s64inttype); - else - internalerror(2012050401); - end; - end; - procedure thlcgobj.a_label(list: TAsmList; l: tasmlabel); inline; begin cg.a_label(list,l); @@ -1052,7 +1026,7 @@ implementation subsetsizereg: tregister; stopbit: byte; begin - subsetregdef:=tcgsize2orddef(sreg.subsetregsize); + subsetregdef:=cgsize_orddef(sreg.subsetregsize); tmpreg:=getintregister(list,subsetregdef); if is_signed(subsetsize) then begin @@ -1093,8 +1067,8 @@ implementation begin if (fromsreg.bitlen>=tosreg.bitlen) then begin - fromsubsetregdef:=tcgsize2orddef(fromsreg.subsetregsize); - tosubsetregdef:=tcgsize2orddef(tosreg.subsetregsize); + fromsubsetregdef:=cgsize_orddef(fromsreg.subsetregsize); + tosubsetregdef:=cgsize_orddef(tosreg.subsetregsize); if (fromsreg.startbit<=tosreg.startbit) then begin { tosreg may be larger -> use its size to perform the shift } @@ -1153,7 +1127,7 @@ implementation bitmask: aword; stopbit: byte; begin - subsetregdef:=tcgsize2orddef(sreg.subsetregsize); + subsetregdef:=cgsize_orddef(sreg.subsetregsize); stopbit:=sreg.startbit+sreg.bitlen; // on x86(64), 1 shl 32(64) = 1 instead of 0 if (stopbit<>AIntBits) then @@ -1653,7 +1627,7 @@ implementation if (intloadsize>sizeof(aint)) then intloadsize:=sizeof(aint); - loadsize:=tcgsize2orddef(int_cgsize(intloadsize)); + loadsize:=cgsize_orddef(int_cgsize(intloadsize)); if (sref.bitlen>sizeof(aint)*8) then internalerror(2006081312); @@ -1752,7 +1726,7 @@ implementation a_op_reg_reg(list,OP_NEG,osuinttype,tmpreg,tmpreg); { load next "loadbitsize" bits of the array } - a_load_ref_reg(list,tcgsize2orddef(int_cgsize(loadbitsize div 8)),osuinttype,tmpref,extra_value_reg); + a_load_ref_reg(list,cgsize_orddef(int_cgsize(loadbitsize div 8)),osuinttype,tmpref,extra_value_reg); a_op_reg_reg(list,OP_SHR,osuinttype,tmpreg,extra_value_reg); { if there are no bits in extra_value_reg, then sref.bitindex was } @@ -1776,7 +1750,7 @@ implementation a_op_reg_reg(list,OP_NEG,osuinttype,tmpreg,tmpreg); { load next "loadbitsize" bits of the array } - a_load_ref_reg(list,tcgsize2orddef(int_cgsize(loadbitsize div 8)),osuinttype,tmpref,extra_value_reg); + a_load_ref_reg(list,cgsize_orddef(int_cgsize(loadbitsize div 8)),osuinttype,tmpref,extra_value_reg); { tmpreg is in the range 1..-1 -> always ok } a_op_reg_reg(list,OP_SHL,osuinttype,tmpreg,extra_value_reg); @@ -2121,7 +2095,7 @@ implementation subsetregdef: torddef; stopbit: byte; begin - subsetregdef:=tcgsize2orddef(sreg.subsetregsize); + subsetregdef:=cgsize_orddef(sreg.subsetregsize); stopbit:=sreg.startbit+sreg.bitlen; // on x86(64), 1 shl 32(64) = 1 instead of 0 if (stopbit<>AIntBits) then @@ -3668,12 +3642,12 @@ implementation force integer (memory) values in an mmregister } if (l.size in [OS_32,OS_S32]) then begin - size:=tcgsize2orddef(l.size); + size:=cgsize_orddef(l.size); newsize:=s32floattype; end else if (l.size in [OS_64,OS_S64]) then begin - size:=tcgsize2orddef(l.size); + size:=cgsize_orddef(l.size); newsize:=s64floattype; end else diff --git a/compiler/m68k/n68kadd.pas b/compiler/m68k/n68kadd.pas index 6dcce50eb5..6802b9bb8d 100644 --- a/compiler/m68k/n68kadd.pas +++ b/compiler/m68k/n68kadd.pas @@ -672,7 +672,7 @@ implementation secondpass(left); if left.location.loc in [LOC_FLAGS,LOC_JUMP] then begin // writeln('ajjaj'); - hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,hlcg.tcgsize2orddef(cgsize),false); + hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,cgsize_orddef(cgsize),false); // writeln('reccs?'); end; if isjump then @@ -691,7 +691,7 @@ implementation end; secondpass(right); if right.location.loc in [LOC_FLAGS,LOC_JUMP] then - hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,hlcg.tcgsize2orddef(cgsize),false); + hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,cgsize_orddef(cgsize),false); if isjump then begin current_procinfo.CurrTrueLabel:=otl; diff --git a/compiler/ncginl.pas b/compiler/ncginl.pas index 13f93a6b2a..59168888f3 100644 --- a/compiler/ncginl.pas +++ b/compiler/ncginl.pas @@ -733,7 +733,7 @@ implementation if (left.location.loc <> LOC_REGISTER) or (left.location.size <> opsize) then - hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,hlcg.tcgsize2orddef(opsize),true); + hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,cgsize_orddef(opsize),true); location_reset(location,LOC_REGISTER,opsize); location.register := cg.getintregister(current_asmdata.CurrAsmList,opsize); diff --git a/compiler/ncgutil.pas b/compiler/ncgutil.pas index f4e96485cb..c8f00552ea 100644 --- a/compiler/ncgutil.pas +++ b/compiler/ncgutil.pas @@ -312,7 +312,7 @@ implementation {$ifdef cpu64bitalu} if opsize in [OS_128,OS_S128] then begin - hlcg.location_force_reg(list,p.location,p.resultdef,hlcg.tcgsize2orddef(opsize),true); + hlcg.location_force_reg(list,p.location,p.resultdef,cgsize_orddef(opsize),true); tmpreg:=cg.getintregister(list,OS_64); cg.a_op_reg_reg_reg(list,OP_OR,OS_64,p.location.register128.reglo,p.location.register128.reghi,tmpreg); location_reset(p.location,LOC_REGISTER,OS_64); @@ -322,7 +322,7 @@ implementation {$else cpu64bitalu} if opsize in [OS_64,OS_S64] then begin - hlcg.location_force_reg(list,p.location,p.resultdef,hlcg.tcgsize2orddef(opsize),true); + hlcg.location_force_reg(list,p.location,p.resultdef,cgsize_orddef(opsize),true); tmpreg:=cg.getintregister(list,OS_32); cg.a_op_reg_reg_reg(list,OP_OR,OS_32,p.location.register64.reglo,p.location.register64.reghi,tmpreg); location_reset(p.location,LOC_REGISTER,OS_32); diff --git a/compiler/ppcgen/ngppcadd.pas b/compiler/ppcgen/ngppcadd.pas index b544812258..18c5300a09 100644 --- a/compiler/ppcgen/ngppcadd.pas +++ b/compiler/ppcgen/ngppcadd.pas @@ -205,7 +205,7 @@ implementation end; secondpass(left); if left.location.loc in [LOC_FLAGS,LOC_JUMP] then - hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,hlcg.tcgsize2orddef(cgsize),false); + hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,cgsize_orddef(cgsize),false); if isjump then begin current_procinfo.CurrTrueLabel:=otl; @@ -224,7 +224,7 @@ implementation end; secondpass(right); if right.location.loc in [LOC_FLAGS,LOC_JUMP] then - hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,hlcg.tcgsize2orddef(cgsize),false); + hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,cgsize_orddef(cgsize),false); if isjump then begin current_procinfo.CurrTrueLabel:=otl; diff --git a/compiler/x86/nx86add.pas b/compiler/x86/nx86add.pas index 6adcd58ae9..e69dd96cce 100644 --- a/compiler/x86/nx86add.pas +++ b/compiler/x86/nx86add.pas @@ -114,7 +114,7 @@ unit nx86add; if extra_not then cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NOT,opsize,left.location.register,left.location.register); r:=cg.getintregister(current_asmdata.CurrAsmList,opsize); - hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,hlcg.tcgsize2orddef(opsize),right.location,r); + hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,cgsize_orddef(opsize),right.location,r); emit_reg_reg(op,TCGSize2Opsize[opsize],left.location.register,r); cg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,opsize,r,left.location.register); end @@ -157,7 +157,7 @@ unit nx86add; if extra_not then begin r:=cg.getintregister(current_asmdata.CurrAsmList,opsize); - hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,hlcg.tcgsize2orddef(opsize),right.location,r); + hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,cgsize_orddef(opsize),right.location,r); emit_reg(A_NOT,TCGSize2Opsize[opsize],r); emit_reg_reg(A_AND,TCGSize2Opsize[opsize],r,left.location.register); end @@ -450,7 +450,7 @@ unit nx86add; { fix the changed opsize we did above because of the missing btsb } if opsize<>int_cgsize(resultdef.size) then - hlcg.location_force_reg(current_asmdata.CurrAsmList,location,opdef,hlcg.tcgsize2orddef(int_cgsize(resultdef.size)),false); + hlcg.location_force_reg(current_asmdata.CurrAsmList,location,opdef,cgsize_orddef(int_cgsize(resultdef.size)),false); end; {$endif not i8086} diff --git a/compiler/x86/nx86inl.pas b/compiler/x86/nx86inl.pas index 23de7eea8f..d20c6504e6 100644 --- a/compiler/x86/nx86inl.pas +++ b/compiler/x86/nx86inl.pas @@ -616,7 +616,7 @@ implementation if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) or (left.location.size<>opsize) then - hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,hlcg.tcgsize2orddef(opsize),true); + hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,cgsize_orddef(opsize),true); location_reset(location,LOC_REGISTER,opsize); location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize); diff --git a/compiler/x86/nx86set.pas b/compiler/x86/nx86set.pas index 5646e5c294..3ae1559846 100644 --- a/compiler/x86/nx86set.pas +++ b/compiler/x86/nx86set.pas @@ -408,7 +408,7 @@ implementation {$endif i8086} if is_signed(left.resultdef) then opsize := tcgsize(ord(opsize)+(ord(OS_S8)-ord(OS_8))); - opdef:=hlcg.tcgsize2orddef(opsize); + opdef:=cgsize_orddef(opsize); if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE,LOC_CONSTANT]) then hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true); diff --git a/compiler/x86_64/nx64mat.pas b/compiler/x86_64/nx64mat.pas index a5b55c8690..aba1962ed9 100644 --- a/compiler/x86_64/nx64mat.pas +++ b/compiler/x86_64/nx64mat.pas @@ -187,7 +187,7 @@ implementation { load left operators in a register } location_copy(location,left.location); - hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,hlcg.tcgsize2orddef(opsize),false); + hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,cgsize_orddef(opsize),false); { shifting by a constant directly coded: } if (right.nodetype=ordconstn) then