mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-04-20 18:09:27 +02:00
+ classes for llvm instructions (ait_llvmins), procedure definitions
(ait_llvmprocdef), global variable definitions (ait_llvmvarsym)
and alias definitions (ait_llvmalias)
git-svn-id: branches/hlcgllvm@26036 -
This commit is contained in:
Jonas Maebe
parent
44b1996158
commit
3296984bd9
1
.gitattributes
vendored
1
.gitattributes
vendored
@ -314,6 +314,7 @@ compiler/jvm/rjvmsup.inc svneol=native#text/plain
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compiler/jvm/tgcpu.pas svneol=native#text/plain
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compiler/ldscript.pas svneol=native#text/plain
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compiler/link.pas svneol=native#text/plain
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compiler/llvm/aasmllvm.pas svneol=native#text/plain
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compiler/llvm/itllvm.pas svneol=native#text/plain
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compiler/llvm/llvmbase.pas svneol=native#text/plain
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compiler/llvm/llvminfo.pas svneol=native#text/plain
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@ -35,6 +35,10 @@ interface
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cutils,cclasses,
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globtype,systems,
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cpuinfo,cpubase,
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{$ifdef llvm}
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{ overrides max_operands }
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llvmbase,
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{$endif llvm}
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cgbase,cgutils,
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symtype,
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aasmbase,aasmdata,ogbase
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@ -98,6 +102,12 @@ interface
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ait_jvar, { debug information for a local variable }
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ait_jcatch, { exception catch clause }
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{$endif JVM}
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{$ifdef llvm}
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ait_llvmins, { llvm instruction }
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ait_llvmprocdef, { start of an llvm procedure }
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ait_llvmvarsym, { global variable }
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ait_llvmalias, { alias for a symbol }
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{$endif}
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{ SEH directives used in ARM,MIPS and x86_64 COFF targets }
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ait_seh_directive
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);
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@ -209,6 +219,12 @@ interface
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'jvar',
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'jcatch',
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{$endif JVM}
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{$ifdef llvm}
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'llvmins', { llvm instruction }
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'llvmprocdef',
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'llvmvarsym',
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'llvmalias',
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{$endif}
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'seh_directive'
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);
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@ -236,6 +252,16 @@ interface
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,top_string
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,top_wstring
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{$endif jvm}
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{$ifdef llvm}
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{ llvm only }
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,top_double
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{$ifdef cpuextended}
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,top_extended80
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{$endif cpuextended}
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,top_def
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,top_fpcond
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,top_cond
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{$endif llvm}
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);
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{ kinds of operations that an instruction can perform on an operand }
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@ -281,6 +307,15 @@ interface
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top_string : (pcvallen: aint; pcval: pchar);
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top_wstring : (pwstrval: pcompilerwidestring);
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{$endif jvm}
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{$ifdef llvm}
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top_double : (dval:double);
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{$ifdef cpuextended}
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top_extended80 : (eval:extended);
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{$endif cpuextended}
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top_def : (def: tdef);
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top_cond : (cond: topcmp);
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top_fpcond : (fpcond: tllvmfpcmp);
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{$endif llvm}
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end;
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poper=^toper;
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507
compiler/llvm/aasmllvm.pas
Normal file
507
compiler/llvm/aasmllvm.pas
Normal file
@ -0,0 +1,507 @@
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{
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Copyright (c) 2010, 2013 by Jonas Maebe
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Contains the assembler object for the LLVM target
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit aasmllvm;
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{$i fpcdefs.inc}
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interface
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uses
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globtype,verbose,
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aasmbase,aasmtai,aasmdata,aasmsym,
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cpubase,cgbase,cgutils,
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symtype,symdef,symsym,
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llvmbase;
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type
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{ taillvm }
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taillvm = class(tai_cpu_abstract_sym)
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llvmopcode: tllvmop;
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constructor create_llvm(op: tllvmop);
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{ e.g. ret void }
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constructor op_size(op : tllvmop; size: tdef);
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{ e.g. dst = alloca size }
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constructor op_reg_size(op:tllvmop;dst:tregister;size:tdef);
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{ e.g. dst = alloca size }
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constructor op_ref_size(op:tllvmop;const dst:treference;size:tdef);
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{ e.g. dst = add size src1, src2 }
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constructor op_reg_size_reg_reg(op:tllvmop;dst:tregister;size:tdef;src1,src2:tregister);
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{ e.g. dst = shl size src1, 1 ( = src1 shl 1) }
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constructor op_reg_size_reg_const(op:tllvmop;dst:tregister;size:tdef;src1:tregister;src2:int64);
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{ e.g. dst = sub size 0, src2 ( = 0 - src2) }
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constructor op_reg_size_const_reg(op:tllvmop;dst:tregister;size:tdef;src1:int64;src2:tregister);
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{ e.g. dst = bitcast size1 src to tosize }
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constructor op_reg_size_reg_size(op:tllvmop;dst:tregister;fromsize:tdef;src:tregister;tosize:tdef);
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{ e.g. dst = bitcast fromsize 255 to tosize }
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constructor op_reg_size_const_size(op:tllvmop;dst:tregister;fromsize:tdef;src:int64;tosize:tdef);
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{ e.g. dst = bitcast fromsize double to tosize }
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constructor op_reg_size_fpconst_size(op:tllvmop;dst:tregister;fromsize:tdef;src:double;tosize:tdef);
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{$ifdef cpuextended}
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{ e.g. dst = bitcast fromsize extended to tosize }
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constructor op_reg_size_fpconst80_size(op:tllvmop;dst:tregister;fromsize:tdef;src:extended;tosize:tdef);
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{$endif cpuextended}
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{ e.g. dst = bitcast fromsize @globalvar to tosize }
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constructor op_reg_size_sym_size(op:tllvmop;dst:tregister;fromsize:tdef;src:TAsmSymbol;tosize:tdef);
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{ e.g. dst = bitcast fromsize src to tosize }
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constructor op_reg_size_ref_size(op:tllvmop;dst:tregister;fromsize:tdef;const src:treference;tosize:tdef);
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{ e.g. store fromsize src, ptrsize toref}
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constructor op_size_reg_size_ref(op:tllvmop;fromsize:tdef;src:tregister;ptrsize:tdef;const toref:treference);
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{ e.g. store fromsize const, ptrsize toref}
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constructor op_size_const_size_ref(op:tllvmop;fromsize:tdef;src:int64;ptrsize:tdef;const toref:treference);
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{ e.g. dst = load fromsize fromref }
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constructor op_reg_size_ref(op:tllvmop;dst:tregister;fromsize:tdef;const fromref:treference);
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{ e.g. dst = icmp cmpcond size reg1, reg2 }
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constructor op_reg_cond_size_reg_reg(op:tllvmop;dst:tregister;cmpcond:topcmp;size:tdef;reg1,reg2:tregister);
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{ e.g. dst = icmp cmpcond size reg1, constant }
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constructor op_reg_cond_size_reg_const(op:tllvmop;dst:tregister;cmpcond:topcmp;size:tdef;reg1:tregister;cnst:int64);
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{ e.g. dst = fcmp cmpcond size reg1, reg2 }
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constructor op_reg_fpcond_size_reg_reg(op:tllvmop;dst:tregister;cmpcond:tllvmfpcmp;size:tdef;reg1,reg2:tregister);
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{ e.g. br label lab }
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constructor op_lab(op:tllvmop;lab:tasmlabel);
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{ e.g. br i1 condreg, label iftrue, label iffalse }
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constructor op_size_reg_lab_lab(op:tllvmop;fromsize:tdef;condreg:tregister;labtrue,labfalse: tasmlabel);
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{ e.g. la_ret retdef retval }
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constructor op_size_reg(op:tllvmop;def: tdef;reg: tregister);
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{ e.g. dst = getelementptr ptrsize ref, i32 0 (implicit), index1type index1 }
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constructor getelementptr_reg_size_ref_size_reg(dst:tregister;ptrsize:tdef;const ref:treference;indextype: tdef;index1:tregister);
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constructor getelementptr_reg_size_ref_size_const(dst:tregister;ptrsize:tdef;const ref:treference;indextype: tdef;index1:ptrint);
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procedure loaddef(opidx: longint; _def: tdef);
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procedure loaddouble(opidx: longint; _dval: double);
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{$ifdef cpuextended}
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procedure loadextended(opidx: longint; _eval: extended);
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{$endif cpuextended}
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procedure loadcond(opidx: longint; _cond: topcmp);
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procedure loadfpcond(opidx: longint; _fpcond: tllvmfpcmp);
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end;
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tllvmvisibility = (llv_default, llv_hidden, llv_protected);
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tllvmlinkage = (
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{ llvm 2.5 }
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lll_default { = externally visible/global },
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lll_private, lll_internal, lll_linkonce, lll_common,
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lll_weak, lll_appending, lll_extern_weak,
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lll_dllimport, lll_dllexport,
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{ llvm 2.6+ }
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lll_linker_private, lll_private_weak, lll_private_weak_def_auto,
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lll_available_externally,lll_linkonce_odr, lll_weak_odr
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);
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taillvmalias = class(tailineinfo)
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vis: tllvmvisibility;
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linkage: tllvmlinkage;
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oldsym, newsym: TAsmSymbol;
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def: tdef;
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constructor Create(const oldname, newname: TSymStr; _def: tdef; _vis: tllvmvisibility; _linkage: tllvmlinkage);
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end;
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{ start of a procedure }
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taillvmprocdef = class(tailineinfo)
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procdef: tprocdef;
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constructor create(_procdef: tprocdef);
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end;
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{ global variable definition }
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taillvmvarsym = class(tailineinfo)
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varsym: tstaticvarsym;
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constructor create(_varsym: tstaticvarsym);
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end;
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implementation
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uses
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cutils, cclasses, strings, aasmcpu;
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{ taillvmvarsym }
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constructor taillvmvarsym.create(_varsym: tstaticvarsym);
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begin
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inherited create;
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typ:=ait_llvmvarsym;
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varsym:=_varsym;
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end;
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{ taillvmalias }
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constructor taillvmalias.Create(const oldname, newname: TSymStr; _def: tdef; _vis: tllvmvisibility; _linkage: tllvmlinkage);
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begin
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inherited Create;
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oldsym:=current_asmdata.RefAsmSymbol(oldname,AT_FUNCTION);
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newsym:=current_asmdata.DefineAsmSymbol(newname,AB_GLOBAL,AT_FUNCTION);
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def:=_def;
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vis:=_vis;
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linkage:=_linkage;
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end;
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{ taillvmprocdef }
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constructor taillvmprocdef.create(_procdef: tprocdef);
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begin
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inherited create;
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typ:=ait_llvmprocdef;
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procdef:=_procdef;
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end;
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{*****************************************************************************
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taicpu Constructors
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*****************************************************************************}
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constructor taillvm.create_llvm(op: tllvmop);
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begin
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create(a_none);
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llvmopcode:=op;
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typ:=ait_llvmins;
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end;
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procedure taillvm.loaddef(opidx:longint;_def: tdef);
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begin
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allocate_oper(opidx+1);
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with oper[opidx]^ do
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begin
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if typ<>top_def then
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clearop(opidx);
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def:=_def;
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typ:=top_def;
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end;
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end;
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procedure taillvm.loaddouble(opidx: longint; _dval: double);
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begin
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allocate_oper(opidx+1);
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with oper[opidx]^ do
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begin
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if typ<>top_double then
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clearop(opidx);
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dval:=_dval;
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typ:=top_double;
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end;
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end;
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{$ifdef cpuextended}
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procedure taillvm.loadextended(opidx: longint; _eval: extended);
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begin
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allocate_oper(opidx+1);
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with oper[opidx]^ do
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begin
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if typ<>top_extended80 then
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clearop(opidx);
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eval:=_eval;
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typ:=top_extended80;
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end;
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end;
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{$endif cpuextended}
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procedure taillvm.loadcond(opidx: longint; _cond: topcmp);
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begin
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allocate_oper(opidx+1);
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with oper[opidx]^ do
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begin
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if typ<>top_cond then
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clearop(opidx);
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cond:=_cond;
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typ:=top_cond;
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end;
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end;
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procedure taillvm.loadfpcond(opidx: longint; _fpcond: tllvmfpcmp);
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begin
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allocate_oper(opidx+1);
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with oper[opidx]^ do
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begin
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if typ<>top_fpcond then
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clearop(opidx);
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fpcond:=_fpcond;
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typ:=top_fpcond;
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end;
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end;
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constructor taillvm.op_size(op : tllvmop; size: tdef);
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begin
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create_llvm(op);
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ops:=1;
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loaddef(0,size);
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end;
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constructor taillvm.op_reg_size(op: tllvmop; dst: tregister; size: tdef);
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begin
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create_llvm(op);
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ops:=2;
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loadreg(0,dst);
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loaddef(1,size);
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end;
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constructor taillvm.op_ref_size(op: tllvmop; const dst: treference; size: tdef);
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begin
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create_llvm(op);
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ops:=2;
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loadref(0,dst);
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loaddef(1,size);
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end;
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{ %dst = add i32 %src1, %src2 }
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constructor taillvm.op_reg_size_reg_reg(op: tllvmop; dst: tregister;size: tdef; src1, src2: tregister);
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begin
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create_llvm(op);
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ops:=4;
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loadreg(0,dst);
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loaddef(1,size);
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loadreg(2,src1);
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loadreg(3,src2);
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end;
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{ %dst = shl i32 %reg, 1 (= %reg shl 1) }
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constructor taillvm.op_reg_size_reg_const(op: tllvmop; dst: tregister; size: tdef; src1: tregister; src2: int64);
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begin
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create_llvm(op);
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ops:=4;
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loadreg(0,dst);
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loaddef(1,size);
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loadreg(2,src1);
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loadconst(3,src2);
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end;
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{ %dst = sub i32 1, %src (= 1 - %src) }
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constructor taillvm.op_reg_size_const_reg(op: tllvmop; dst: tregister; size: tdef; src1: int64; src2: tregister);
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begin
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create_llvm(op);
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ops:=4;
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loadreg(0,dst);
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loaddef(1,size);
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loadconst(2,src1);
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loadreg(3,src2);
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end;
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{ %dst = bitcast i32 %src to i8 }
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constructor taillvm.op_reg_size_reg_size(op: tllvmop; dst: tregister; fromsize: tdef; src: tregister; tosize: tdef);
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begin
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create_llvm(op);
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ops:=4;
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loadreg(0,dst);
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loaddef(1,fromsize);
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loadreg(2,src);
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loaddef(3,tosize);
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end;
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{ %dst = bitcast i32 -1 to i8 }
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constructor taillvm.op_reg_size_const_size(op: tllvmop; dst: tregister; fromsize: tdef; src: int64; tosize: tdef);
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begin
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create_llvm(op);
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ops:=4;
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loadreg(0,dst);
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loaddef(1,fromsize);
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loadconst(2,src);
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loaddef(3,tosize);
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end;
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constructor taillvm.op_reg_size_fpconst_size(op: tllvmop; dst: tregister; fromsize: tdef; src: double; tosize: tdef);
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begin
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create_llvm(op);
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ops:=4;
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loadreg(0,dst);
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loaddef(1,fromsize);
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loaddouble(2,src);
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loaddef(3,tosize);
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end;
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{$ifdef cpuextended}
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constructor taillvm.op_reg_size_fpconst80_size(op: tllvmop; dst: tregister; fromsize: tdef; src: extended; tosize: tdef);
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begin
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create_llvm(op);
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ops:=4;
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loadreg(0,dst);
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loaddef(1,fromsize);
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loadextended(2,src);
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loaddef(3,tosize);
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end;
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{$endif cpuextended}
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constructor taillvm.op_reg_size_sym_size(op: tllvmop; dst: tregister; fromsize: tdef; src: TAsmSymbol; tosize: tdef);
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begin
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create_llvm(op);
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ops:=4;
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loadreg(0,dst);
|
||||
loaddef(1,fromsize);
|
||||
loadsymbol(2,src,0);
|
||||
loaddef(3,tosize);
|
||||
end;
|
||||
|
||||
|
||||
{ store i32 3, i32* %ptr }
|
||||
constructor taillvm.op_reg_size_ref_size(op: tllvmop; dst: tregister; fromsize: tdef; const src: treference; tosize: tdef);
|
||||
begin
|
||||
create_llvm(op);
|
||||
ops:=4;
|
||||
loadreg(0,dst);
|
||||
loaddef(1,fromsize);
|
||||
loadref(2,src);
|
||||
loaddef(3,tosize);
|
||||
end;
|
||||
|
||||
|
||||
constructor taillvm.op_size_reg_size_ref(op: tllvmop; fromsize: tdef; src: tregister; ptrsize: tdef; const toref: treference);
|
||||
begin
|
||||
create_llvm(op);
|
||||
ops:=4;
|
||||
loaddef(0,fromsize);
|
||||
loadreg(1,src);
|
||||
loaddef(2,ptrsize);
|
||||
loadref(3,toref);
|
||||
end;
|
||||
|
||||
|
||||
constructor taillvm.op_size_const_size_ref(op: tllvmop; fromsize: tdef; src: int64; ptrsize: tdef; const toref: treference);
|
||||
begin
|
||||
create_llvm(op);
|
||||
ops:=4;
|
||||
loaddef(0,fromsize);
|
||||
loadconst(1,src);
|
||||
loaddef(2,ptrsize);
|
||||
loadref(3,toref);
|
||||
end;
|
||||
|
||||
|
||||
constructor taillvm.op_reg_size_ref(op: tllvmop; dst: tregister; fromsize: tdef; const fromref: treference);
|
||||
begin
|
||||
create_llvm(op);
|
||||
ops:=3;
|
||||
loadreg(0,dst);
|
||||
loaddef(1,fromsize);
|
||||
loadref(2,fromref);
|
||||
end;
|
||||
|
||||
|
||||
constructor taillvm.op_reg_cond_size_reg_reg(op: tllvmop; dst: tregister; cmpcond: topcmp; size: tdef; reg1, reg2: tregister);
|
||||
begin
|
||||
create_llvm(op);
|
||||
ops:=5;
|
||||
loadreg(0,dst);
|
||||
loadcond(1,cmpcond);
|
||||
loaddef(2,size);
|
||||
loadreg(3,reg1);
|
||||
loadreg(4,reg2);
|
||||
end;
|
||||
|
||||
constructor taillvm.op_reg_cond_size_reg_const(op: tllvmop; dst: tregister; cmpcond: topcmp; size: tdef; reg1: tregister; cnst: int64);
|
||||
begin
|
||||
create_llvm(op);
|
||||
ops:=5;
|
||||
loadreg(0,dst);
|
||||
loadcond(1,cmpcond);
|
||||
loaddef(2,size);
|
||||
loadreg(3,reg1);
|
||||
loadconst(4,cnst);
|
||||
end;
|
||||
|
||||
constructor taillvm.op_reg_fpcond_size_reg_reg(op: tllvmop; dst: tregister; cmpcond: tllvmfpcmp; size: tdef; reg1, reg2: tregister);
|
||||
begin
|
||||
create_llvm(op);
|
||||
ops:=5;
|
||||
loadreg(0,dst);
|
||||
loadfpcond(1,cmpcond);
|
||||
loaddef(2,size);
|
||||
loadreg(3,reg1);
|
||||
loadreg(4,reg2);
|
||||
end;
|
||||
|
||||
|
||||
constructor taillvm.op_lab(op: tllvmop; lab: tasmlabel);
|
||||
begin
|
||||
create_llvm(op);
|
||||
ops:=1;
|
||||
loadsymbol(0,lab,0);
|
||||
end;
|
||||
|
||||
|
||||
constructor taillvm.op_size_reg_lab_lab(op: tllvmop; fromsize: tdef; condreg: tregister; labtrue, labfalse: tasmlabel);
|
||||
begin
|
||||
create_llvm(op);
|
||||
ops:=4;
|
||||
loaddef(0,fromsize);
|
||||
loadreg(1,condreg);
|
||||
loadsymbol(2,labtrue,0);
|
||||
loadsymbol(3,labfalse,0);
|
||||
end;
|
||||
|
||||
|
||||
constructor taillvm.op_size_reg(op: tllvmop; def: tdef; reg: tregister);
|
||||
begin
|
||||
create_llvm(op);
|
||||
ops:=2;
|
||||
loaddef(0,def);
|
||||
loadreg(1,reg);
|
||||
end;
|
||||
|
||||
|
||||
constructor taillvm.getelementptr_reg_size_ref_size_reg(dst: tregister; ptrsize: tdef; const ref: treference; indextype: tdef; index1: tregister);
|
||||
begin
|
||||
create_llvm(la_getelementptr);
|
||||
ops:=7;
|
||||
loadreg(0,dst);
|
||||
loaddef(1,ptrsize);
|
||||
loadref(2,ref);
|
||||
loaddef(3,s32inttype);
|
||||
loadconst(4,0);
|
||||
loaddef(5,indextype);
|
||||
loadreg(6,index1);
|
||||
end;
|
||||
|
||||
|
||||
constructor taillvm.getelementptr_reg_size_ref_size_const(dst: tregister; ptrsize: tdef; const ref: treference; indextype: tdef; index1: ptrint);
|
||||
begin
|
||||
create_llvm(la_getelementptr);
|
||||
ops:=7;
|
||||
loadreg(0,dst);
|
||||
loaddef(1,ptrsize);
|
||||
loadref(2,ref);
|
||||
loaddef(3,s32inttype);
|
||||
loadconst(4,0);
|
||||
loaddef(5,indextype);
|
||||
loadconst(6,index1);
|
||||
end;
|
||||
|
||||
end.
|
||||
Loading…
Reference in New Issue
Block a user