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* more readable code

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This commit is contained in:
florian 2025-04-21 20:36:46 +02:00
parent d520f1df0b
commit 32a19eb5b3
1 changed files with 4 additions and 10 deletions
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14
compiler/armgen/aoptarm.pas
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@ -2028,12 +2028,8 @@ Implementation
{ If p.opcode = A_STR, then ThisReg will be NR_NO }
if (
{$ifdef ARM}
(p_second.typ = ait_instruction) and
(taicpu(p_second).condition = taicpu(p).condition) and
(
(taicpu(p_second).opcode = A_MOV) or
(taicpu(p_second).opcode = A_MOVW)
)
MatchInstruction(p_second, A_MOV, [taicpu(p).condition], []) or
MatchInstruction(p_second, A_MOVW, [taicpu(p).condition], [])
{$endif ARM}
{$ifdef AARCH64}
MatchInstruction(p, A_MOVZ, []) or
@ -2073,11 +2069,9 @@ Implementation
(
(
{$ifdef ARM}
(p_second.typ = ait_instruction) and
(taicpu(p_second).condition = taicpu(p).condition) and
(
(taicpu(p_second).opcode = A_MOV) or
(taicpu(p_second).opcode = A_MOVW)
MatchInstruction(p_second, A_MOV, [taicpu(p).condition], []) or
MatchInstruction(p_second, A_MOVW, [taicpu(p).condition], [])
) and
{$endif ARM}
{$ifdef AARCH64}