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* for avr1, do not save registers during an interrupt procedure, as it has no memory to store them
git-svn-id: trunk@44139 -
(cherry picked from commit 2135b9b724
)
# Conflicts:
# compiler/msg/errore.msg
# compiler/msgidx.inc
# compiler/msgtxt.inc
This commit is contained in:
parent
438c971460
commit
32e17c5114
@ -409,6 +409,7 @@ implementation
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i: Integer;
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i: Integer;
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hp: tai;
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hp: tai;
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begin
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begin
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exit;
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taicpu(firstinstruction).opcode:=A_SLEEP;
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taicpu(firstinstruction).opcode:=A_SLEEP;
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for i:=0 to taicpu(firstinstruction).opercnt-1 do
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for i:=0 to taicpu(firstinstruction).opercnt-1 do
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taicpu(firstinstruction).freeop(i);
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taicpu(firstinstruction).freeop(i);
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@ -2229,15 +2229,20 @@ unit cgcpu;
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regs:=regs+[getsupreg(GetDefaultTmpReg)];
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regs:=regs+[getsupreg(GetDefaultTmpReg)];
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if current_settings.cputype=cpu_avr1 then
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message1(cg_w_interrupt_does_not_save_registers,current_procinfo.procdef.fullprocname(false))
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else
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begin
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for reg:=RS_R31 downto RS_R0 do
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for reg:=RS_R31 downto RS_R0 do
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if reg in regs then
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if reg in regs then
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list.concat(taicpu.op_reg(A_PUSH,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
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list.concat(taicpu.op_reg(A_PUSH,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
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{ Save SREG }
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{ Save SREG }
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cg.getcpuregister(list,GetDefaultTmpReg);
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cg.getcpuregister(list,GetDefaultTmpReg);
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list.concat(taicpu.op_reg_const(A_IN, GetDefaultTmpReg, $3F));
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list.concat(taicpu.op_reg_const(A_IN, GetDefaultTmpReg, $3F));
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list.concat(taicpu.op_reg(A_PUSH, GetDefaultTmpReg));
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list.concat(taicpu.op_reg(A_PUSH, GetDefaultTmpReg));
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cg.ungetcpuregister(list,GetDefaultTmpReg);
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cg.ungetcpuregister(list,GetDefaultTmpReg);
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end;
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list.concat(taicpu.op_reg(A_CLR,GetDefaultZeroReg));
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list.concat(taicpu.op_reg(A_CLR,GetDefaultZeroReg));
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@ -2315,9 +2320,12 @@ unit cgcpu;
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{ we clear r1 }
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{ we clear r1 }
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include(regs,getsupreg(GetDefaultZeroReg));
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include(regs,getsupreg(GetDefaultZeroReg));
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if current_settings.cputype<>cpu_avr1 then
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begin
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{ Reload SREG }
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{ Reload SREG }
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regs:=regs+[getsupreg(GetDefaultTmpReg)];
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regs:=regs+[getsupreg(GetDefaultTmpReg)];
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cg.getcpuregister(list,GetDefaultTmpReg);
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cg.getcpuregister(list,GetDefaultTmpReg);
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list.concat(taicpu.op_reg(A_POP, GetDefaultTmpReg));
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list.concat(taicpu.op_reg(A_POP, GetDefaultTmpReg));
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list.concat(taicpu.op_const_reg(A_OUT, $3F, GetDefaultTmpReg));
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list.concat(taicpu.op_const_reg(A_OUT, $3F, GetDefaultTmpReg));
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@ -2327,6 +2335,7 @@ unit cgcpu;
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if reg in regs then
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if reg in regs then
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list.concat(taicpu.op_reg(A_POP,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
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list.concat(taicpu.op_reg(A_POP,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
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end;
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end;
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end;
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list.concat(taicpu.op_none(A_RETI));
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list.concat(taicpu.op_none(A_RETI));
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end
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end
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else if not(nostackframe) and not(current_procinfo.procdef.isempty) then
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else if not(nostackframe) and not(current_procinfo.procdef.isempty) then
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@ -2366,7 +2366,7 @@ sym_e_type_must_be_rec_or_object=05098_E_Record or object type expected
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#
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#
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# Codegenerator
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# Codegenerator
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#
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#
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# 06049 is the last used one
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# 06062 is the last used one
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#
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#
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% \section{Code generator messages}
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% \section{Code generator messages}
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% This section lists all messages that can be displayed if the code
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% This section lists all messages that can be displayed if the code
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@ -2530,6 +2530,10 @@ cg_w_cannot_compile_subroutine=06061_W_The current subroutine "$1" cannot be com
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% Some processors have a very limited instruction set so some routines cannot be compiled for them. As it is not always
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% Some processors have a very limited instruction set so some routines cannot be compiled for them. As it is not always
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% clear from the beginning if a subroutine can be compiled for a certain CPU or not, the compiler checks afterwards
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% clear from the beginning if a subroutine can be compiled for a certain CPU or not, the compiler checks afterwards
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% and creates a dummy if it cannot compile the subroutine.
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% and creates a dummy if it cannot compile the subroutine.
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cg_w_interrupt_does_not_save_registers=06062_W_The target CPU does not support preserving the registers in subroutine "$1"
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% Certain processors have no memory (e.~g. avr1 family), so they do not support storing/restoring the used registers
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% in an interrupt routine. The programmer has to ensure that while there is a chance for the interrupt routine being
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% called that no other code depending on registers being preserved is executed.
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%
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%
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% \end{description}
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% \end{description}
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# EndOfTeX
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# EndOfTeX
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@ -701,6 +701,7 @@ const
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cg_e_case_missing_value=06059;
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cg_e_case_missing_value=06059;
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cg_w_case_incomplete=06060;
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cg_w_case_incomplete=06060;
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cg_w_cannot_compile_subroutine=06061;
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cg_w_cannot_compile_subroutine=06061;
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cg_w_interrupt_does_not_save_registers=06062;
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asmr_d_start_reading=07000;
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asmr_d_start_reading=07000;
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asmr_d_finish_reading=07001;
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asmr_d_finish_reading=07001;
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asmr_e_none_label_contain_at=07002;
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asmr_e_none_label_contain_at=07002;
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@ -1112,9 +1113,9 @@ const
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option_info=11024;
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option_info=11024;
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option_help_pages=11025;
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option_help_pages=11025;
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MsgTxtSize = 83275;
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MsgTxtSize = 83359;
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MsgIdxMax : array[1..20] of longint=(
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MsgIdxMax : array[1..20] of longint=(
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28,106,350,127,99,62,142,34,221,67,
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28,106,350,127,99,63,142,34,221,67,
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63,20,30,1,1,1,1,1,1,1
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63,20,30,1,1,1,1,1,1,1
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);
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);
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