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* extracted the code from psub.translate_registers for generating the name of

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the registers from a tlocation to a new function called location_reg2string
+ added support for 16-bit and 8-bit ALUs in location_reg2string

git-svn-id: trunk@26275 -
This commit is contained in:
nickysn 2013-12-23 22:58:32 +00:00
parent 996ee048be
commit 338d72f564
2 changed files with 48 additions and 9 deletions
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45
compiler/cgutils.pas
View File

@ -174,6 +174,7 @@ unit cgutils;
procedure location_reset_ref(var l : tlocation;lt:TCGRefLoc;lsize:TCGSize; alignment: longint);
procedure location_copy(var destloc:tlocation; const sourceloc : tlocation);
procedure location_swap(var destloc,sourceloc : tlocation);
function location_reg2string(const locreg: tlocation): string;
{ returns r with the given alignment }
function setalignment(const r : treference;b : byte) : treference;
@ -271,5 +272,49 @@ uses
end;
function location_reg2string(const locreg: tlocation): string;
begin
if not (locreg.loc in [LOC_REGISTER,LOC_CREGISTER,
LOC_MMXREGISTER,LOC_CMMXREGISTER,
LOC_MMREGISTER,LOC_CMMREGISTER,
LOC_FPUREGISTER,LOC_CFPUREGISTER]) then
internalerror(2013122301);
if locreg.loc in [LOC_REGISTER,LOC_CREGISTER] then
begin
case locreg.size of
{$if defined(cpu64bitalu)}
OS_128,OS_S128:
result:=std_regname(locreg.registerhi)+':'+std_regname(locreg.register);
{$elseif defined(cpu32bitalu)}
OS_64,OS_S64:
result:=std_regname(locreg.registerhi)+':'+std_regname(locreg.register);
{$elseif defined(cpu16bitalu)}
OS_64,OS_S64:
result:=std_regname(GetNextReg(locreg.registerhi))+':'+std_regname(locreg.registerhi)+':'+std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
OS_32,OS_S32:
result:=std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
{$elseif defined(cpu8bitalu)}
OS_64,OS_S64:
result:=std_regname(GetNextReg(GetNextReg(GetNextReg(locreg.registerhi))))+':'+std_regname(GetNextReg(GetNextReg(locreg.registerhi)))+':'+GetNextReg(locreg.registerhi))+':'+std_regname(locreg.registerhi)+':'+std_regname(GetNextReg(GetNextReg(GetNextReg(locreg.register))))+':'+std_regname(GetNextReg(GetNextReg(locreg.register)))+':'+std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
OS_32,OS_S32:
result:=std_regname(GetNextReg(GetNextReg(GetNextReg(locreg.register))))+':'+std_regname(GetNextReg(GetNextReg(locreg.register)))+':'+std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
OS_16,OS_S16:
result:=std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
{$endif}
else
result:=std_regname(locreg.register);
end;
end
else
begin
if locreg.registerhi<>NR_NO then
result:=std_regname(locreg.registerhi)+':'+std_regname(locreg.register)
else
result:=std_regname(locreg.register);
end;
end;
end.

12
compiler/psub.pas
View File

@ -111,7 +111,7 @@ implementation
scanner,gendef,
pbase,pstatmnt,pdecl,pdecsub,pexports,pgenutil,pparautl,
{ codegen }
tgobj,cgbase,cgobj,hlcgobj,hlcgcpu,dbgbase,
tgobj,cgbase,cgobj,cgutils,hlcgobj,hlcgcpu,dbgbase,
ncgutil,regvars,
optbase,
opttail,
@ -917,14 +917,8 @@ implementation
end;
if cs_asm_source in current_settings.globalswitches then
begin
if tabstractnormalvarsym(p).localloc.registerhi<>NR_NO then
begin
TAsmList(list).concat(Tai_comment.Create(strpnew('Var '+tabstractnormalvarsym(p).realname+' located in register '+
std_regname(tabstractnormalvarsym(p).localloc.registerhi)+':'+std_regname(tabstractnormalvarsym(p).localloc.register))));
end
else
TAsmList(list).concat(Tai_comment.Create(strpnew('Var '+tabstractnormalvarsym(p).realname+' located in register '+
std_regname(tabstractnormalvarsym(p).localloc.register))));
TAsmList(list).concat(Tai_comment.Create(strpnew('Var '+tabstractnormalvarsym(p).realname+' located in register '+
location_reg2string(tabstractnormalvarsym(p).localloc))));
end;
end;
end;