* fixed several arm issues

This commit is contained in:
florian 2004-01-26 19:05:56 +00:00
parent 8ef2f96215
commit 35110d8ef5
5 changed files with 142 additions and 78 deletions

View File

@ -95,7 +95,7 @@ uses
implementation implementation
uses uses
cutils,rgobj; cutils,rgobj,itcpugas;
procedure taicpu.loadshifterop(opidx:longint;const so:tshifterop); procedure taicpu.loadshifterop(opidx:longint;const so:tshifterop);
@ -313,13 +313,13 @@ implementation
function taicpu.spilling_create_load(const ref:treference;r:tregister): tai; function taicpu.spilling_create_load(const ref:treference;r:tregister): tai;
begin begin
result:=taicpu.op_reg_ref(A_LDR,r,ref); internalerror(200401261);
end; end;
function taicpu.spilling_create_store(r:tregister; const ref:treference): tai; function taicpu.spilling_create_store(r:tregister; const ref:treference): tai;
begin begin
result:=taicpu.op_reg_ref(A_STR,r,ref); internalerror(200401262);
end; end;
@ -427,7 +427,10 @@ implementation
end. end.
{ {
$Log$ $Log$
Revision 1.24 2004-01-24 20:19:46 florian Revision 1.25 2004-01-26 19:05:56 florian
* fixed several arm issues
Revision 1.24 2004/01/24 20:19:46 florian
* fixed some spilling stuff * fixed some spilling stuff
+ not(<int64>) implemented + not(<int64>) implemented
+ small set comparisations implemented + small set comparisations implemented

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@ -369,25 +369,18 @@ unit cgcpu;
if dst=src2 then if dst=src2 then
begin begin
if dst<>src1 then if dst<>src1 then
begin list.concat(taicpu.op_reg_reg_reg(A_MUL,dst,src1,src2))
rg[R_INTREGISTER].add_edge(getsupreg(dst),getsupreg(src1));
list.concat(taicpu.op_reg_reg_reg(A_MUL,dst,src1,src2));
end
else else
begin begin
tmpreg:=getintregister(list,size); tmpreg:=getintregister(list,size);
a_load_reg_reg(list,size,size,src2,dst); a_load_reg_reg(list,size,size,src2,dst);
rg[R_INTREGISTER].add_edge(getsupreg(dst),getsupreg(tmpreg));
ungetregister(list,tmpreg); ungetregister(list,tmpreg);
list.concat(taicpu.op_reg_reg_reg(A_MUL,dst,tmpreg,src1)); list.concat(taicpu.op_reg_reg_reg(A_MUL,dst,tmpreg,src1));
end; end;
end end
else else
begin
rg[R_INTREGISTER].add_edge(getsupreg(dst),getsupreg(src2));
list.concat(taicpu.op_reg_reg_reg(A_MUL,dst,src2,src1)); list.concat(taicpu.op_reg_reg_reg(A_MUL,dst,src2,src1));
end; end;
end;
else else
list.concat(setoppostfix(taicpu.op_reg_reg_reg(op_reg_reg_opcg2asmop[op],dst,src2,src1),toppostfix(ord(setflags)*ord(PF_S)))); list.concat(setoppostfix(taicpu.op_reg_reg_reg(op_reg_reg_opcg2asmop[op],dst,src2,src1),toppostfix(ord(setflags)*ord(PF_S))));
end; end;
@ -1228,7 +1221,10 @@ begin
end. end.
{ {
$Log$ $Log$
Revision 1.39 2004-01-24 20:19:46 florian Revision 1.40 2004-01-26 19:05:56 florian
* fixed several arm issues
Revision 1.39 2004/01/24 20:19:46 florian
* fixed some spilling stuff * fixed some spilling stuff
+ not(<int64>) implemented + not(<int64>) implemented
+ small set comparisations implemented + small set comparisations implemented

View File

@ -281,6 +281,17 @@ interface
exprasmlist.concat(setoppostfix(taicpu.op_reg_reg_reg(A_SUB,tmpreg,right.location.register64.reglo,left.location.register64.reglo),PF_S)); exprasmlist.concat(setoppostfix(taicpu.op_reg_reg_reg(A_SUB,tmpreg,right.location.register64.reglo,left.location.register64.reglo),PF_S));
exprasmlist.concat(setoppostfix(taicpu.op_reg_reg_reg(A_SBC,tmpreg,right.location.register64.reghi,left.location.register64.reghi),PF_S)); exprasmlist.concat(setoppostfix(taicpu.op_reg_reg_reg(A_SBC,tmpreg,right.location.register64.reghi,left.location.register64.reghi),PF_S));
cg.ungetregister(exprasmlist,tmpreg); cg.ungetregister(exprasmlist,tmpreg);
if nf_swaped in flags then
begin
if location.resflags=F_LT then
location.resflags:=F_GT
else if location.resflags=F_GE then
location.resflags:=F_LE
else
internalerror(200401221);
end
else
begin
if location.resflags=F_GT then if location.resflags=F_GT then
location.resflags:=F_LT location.resflags:=F_LT
else if location.resflags=F_LE then else if location.resflags=F_LE then
@ -288,6 +299,7 @@ interface
else else
internalerror(200401221); internalerror(200401221);
end; end;
end;
release_reg_left_right; release_reg_left_right;
end; end;
@ -332,7 +344,10 @@ begin
end. end.
{ {
$Log$ $Log$
Revision 1.10 2004-01-24 20:19:46 florian Revision 1.11 2004-01-26 19:05:56 florian
* fixed several arm issues
Revision 1.10 2004/01/24 20:19:46 florian
* fixed some spilling stuff * fixed some spilling stuff
+ not(<int64>) implemented + not(<int64>) implemented
+ small set comparisations implemented + small set comparisations implemented

View File

@ -36,68 +36,115 @@ unit rgcpu;
type type
trgcpu = class(trgobj) trgcpu = class(trgobj)
{ procedure add_cpu_interferences(p : tai);override;
function getexplicitregisterfpu(list : taasmoutput; r : Toldregister) : tregister;override; procedure DoSpillRead(list : taasmoutput;instr : taicpu_abstract;pos: tai; regidx: longint;
procedure ungetregisterfpu(list: taasmoutput; r : tregister; size:TCGsize);override; const spilltemplist:Tspill_temp_list;const regs : tspillregsinfo);override;
procedure cleartempgen; override; procedure DoSpillWritten(list : taasmoutput;instr : taicpu_abstract;pos: tai; regidx: longint;
private const spilltemplist:Tspill_temp_list;const regs : tspillregsinfo);override;
usedpararegs: Tsupregset; procedure DoSpillReadWritten(list : taasmoutput;instr : taicpu_abstract;pos: tai; regidx: longint;
usedparafpuregs: tregisterset; const spilltemplist:Tspill_temp_list;const regs : tspillregsinfo);override;
}
end; end;
implementation implementation
uses uses
cgobj, verbose, cutils; cgobj, verbose, cutils,
aasmcpu;
procedure trgcpu.add_cpu_interferences(p : tai);
begin
if p.typ=ait_instruction then
begin
if (taicpu(p).opcode=A_MUL) then
add_edge(getsupreg(taicpu(p).oper[0]^.reg),getsupreg(taicpu(p).oper[1]^.reg));
end;
end;
procedure trgcpu.DoSpillRead(list : taasmoutput;instr : taicpu_abstract;pos: tai; regidx: longint;
const spilltemplist:Tspill_temp_list;const regs : tspillregsinfo);
var
helpins: tai;
ref : treference;
begin
ref:=spilltemplist[regs[regidx].orgreg];
helpins:=taicpu.op_reg_ref(A_LDR,regs[regidx].tempreg,ref);
if pos=nil then
list.insertafter(helpins,list.first)
else
list.insertafter(helpins,pos.next);
ungetregisterinline(list,instr,regs[regidx].tempreg);
forward_allocation(tai(helpins.next),instr);
end;
procedure trgcpu.DoSpillWritten(list : taasmoutput;instr : taicpu_abstract;pos: tai; regidx: longint;
const spilltemplist:Tspill_temp_list;const regs : tspillregsinfo);
var
helpins: tai;
ref : treference;
begin
ref:=spilltemplist[regs[regidx].orgreg];
helpins:=taicpu.op_reg_ref(A_STR,regs[regidx].tempreg,ref);
list.insertafter(helpins,instr);
ungetregisterinline(list,helpins,regs[regidx].tempreg);
end;
procedure trgcpu.DoSpillReadWritten(list : taasmoutput;instr : taicpu_abstract;pos: tai; regidx: longint;
const spilltemplist:Tspill_temp_list;const regs : tspillregsinfo);
var
helpins1, helpins2: tai;
tmpref,ref : treference;
tmpreg : tregister;
begin
ref:=spilltemplist[regs[regidx].orgreg];
{ {
function trgcpu.getexplicitregisterfpu(list : taasmoutput; r : Toldregister) : tregister; if abs(ref.offset)>4095 then
begin begin
if (r in [R_F0..R_F3]) and reference_reset(tmpref);
not is_reg_var_other[r] then { create consts entry }
begin objectlibrary.getlabel(l);
if r in usedparafpuregs then cg.a_label(current_procinfo.aktlocaldata,l);
internalerror(2003060902); tmpref.symboldata:=current_procinfo.aktlocaldata.last;
include(usedparafpuregs,r);
result.enum := r; current_procinfo.aktlocaldata.concat(tai_const.Create_32bit(ref.offset));
cg.a_reg_alloc(list,result);
end { load consts entry }
else getregisterinline(list,pos,defaultsub,tmpreg);
result:=inherited getexplicitregisterfpu(list,r); tmpref.symbol:=l;
tmpref.base:=NR_R15;
list.concat(taicpu.op_reg_ref(A_LDR,tmpreg,tmpref));
if ref.index<>NR_NO then
internalerror(200401263);
ref.index:=tmpreg;
ref.offset:=0;
end; end;
procedure trgcpu.ungetregisterfpu(list: taasmoutput; r : tregister; size:TCGsize);
begin
if (r.enum in [R_F0..R_F3]) and
not is_reg_var_other[r.enum] then
begin
if not(r.enum in usedparafpuregs) then
internalerror(2003060903);
exclude(usedparafpuregs,r.enum);
cg.a_reg_dealloc(list,r);
end
else
inherited ungetregisterfpu(list,r,size);
end;
procedure trgcpu.cleartempgen;
begin
inherited cleartempgen;
usedpararegs := [];
usedparafpuregs := [];
end;
} }
helpins1:=taicpu.op_reg_ref(A_LDR,regs[regidx].tempreg,ref);
if pos=nil then
list.insertafter(helpins1,list.first)
else
list.insertafter(helpins1,pos.next);
ref:=spilltemplist[regs[regidx].orgreg];
ref.symboldata:=nil;
helpins2:=taicpu.op_reg_ref(A_STR,regs[regidx].tempreg,ref);
list.insertafter(helpins2,instr);
ungetregisterinline(list,helpins2,regs[regidx].tempreg);
forward_allocation(tai(helpins1.next),instr);
end;
end. end.
{ {
$Log$ $Log$
Revision 1.5 2003-11-02 14:30:03 florian Revision 1.6 2004-01-26 19:05:56 florian
* fixed several arm issues
Revision 1.5 2003/11/02 14:30:03 florian
* fixed ARM for new reg. allocation scheme * fixed ARM for new reg. allocation scheme
Revision 1.4 2003/09/11 11:55:00 florian Revision 1.4 2003/09/11 11:55:00 florian

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@ -457,9 +457,9 @@ unit i_linux;
constalignmax : 4; constalignmax : 4;
varalignmin : 0; varalignmin : 0;
varalignmax : 4; varalignmax : 4;
localalignmin : 4; localalignmin : 0;
localalignmax : 4; localalignmax : 4;
recordalignmin : 4; recordalignmin : 0;
recordalignmax : 4; recordalignmax : 4;
maxCrecordalign : 4 maxCrecordalign : 4
); );
@ -514,7 +514,10 @@ initialization
end. end.
{ {
$Log$ $Log$
Revision 1.20 2004-01-12 22:11:39 peter Revision 1.21 2004-01-26 19:05:56 florian
* fixed several arm issues
Revision 1.20 2004/01/12 22:11:39 peter
* use localalign info for alignment for locals and temps * use localalign info for alignment for locals and temps
* sparc fpu flags branching added * sparc fpu flags branching added
* moved powerpc copy_valye_openarray to generic * moved powerpc copy_valye_openarray to generic