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* based on a patch by Christo Crause: more compiler fixes for avrtiny, resolves #36646
git-svn-id: trunk@44103 -
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7abd324231
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@ -475,6 +475,26 @@ implementation
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taicpu(curtai).opcode:=A_RJMP;
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again:=true;
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end;
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A_STS:
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begin
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if (current_settings.cputype=cpu_avrtiny) then
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with taicpu(curtai).oper[0]^ do
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if (ref^.base=NR_NO) and (ref^.index=NR_NO) and (ref^.symbol=nil) and (ref^.offset<$40) then
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begin
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taicpu(curtai).opcode:=A_OUT;
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taicpu(curtai).loadconst(0,ref^.offset);
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end;
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end;
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A_LDS:
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begin
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if (current_settings.cputype=cpu_avrtiny) then
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with taicpu(curtai).oper[1]^ do
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if (ref^.base=NR_NO) and (ref^.index=NR_NO) and (ref^.symbol=nil) and (ref^.offset<$40) then
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begin
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taicpu(curtai).opcode:=A_IN;
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taicpu(curtai).loadconst(1,ref^.offset)
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end;
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end;
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end;
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ait_marker:
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case tai_marker(curtai).Kind of
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@ -433,18 +433,17 @@ Implementation
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(getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and
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(getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and
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(taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and
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// avrxmega3 doesn't map registers into data space so no offset to subtract
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(((current_settings.cputype = cpu_avrxmega3) and
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(((CPUAVR_NOMEMMAPPED_REGS in cpu_capabilities[current_settings.cputype]) and
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(taicpu(p).oper[0]^.ref^.offset>=0) and
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(taicpu(p).oper[0]^.ref^.offset<=63)) or
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((current_settings.cputype <> cpu_avrxmega3) and
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(not(CPUAVR_NOMEMMAPPED_REGS in cpu_capabilities[current_settings.cputype]) and
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(taicpu(p).oper[0]^.ref^.offset>=32) and
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(taicpu(p).oper[0]^.ref^.offset<=95))) then
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begin
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DebugMsg('Peephole Sts2Out performed', p);
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taicpu(p).opcode:=A_OUT;
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if current_settings.cputype = cpu_avrxmega3 then
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if CPUAVR_NOMEMMAPPED_REGS in cpu_capabilities[current_settings.cputype] then
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taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset)
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else
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taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32);
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@ -455,18 +454,17 @@ Implementation
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(getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and
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(getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and
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(taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and
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// avrxmega3 doesn't map registers into data space so no offset to subtract
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(((current_settings.cputype = cpu_avrxmega3) and
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(((CPUAVR_NOMEMMAPPED_REGS in cpu_capabilities[current_settings.cputype]) and
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(taicpu(p).oper[1]^.ref^.offset>=0) and
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(taicpu(p).oper[1]^.ref^.offset<=63)) or
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((current_settings.cputype <> cpu_avrxmega3) and
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(not(CPUAVR_NOMEMMAPPED_REGS in cpu_capabilities[current_settings.cputype]) and
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(taicpu(p).oper[1]^.ref^.offset>=32) and
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(taicpu(p).oper[1]^.ref^.offset<=95))) then
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begin
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DebugMsg('Peephole Lds2In performed', p);
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taicpu(p).opcode:=A_IN;
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if current_settings.cputype = cpu_avrxmega3 then
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if CPUAVR_NOMEMMAPPED_REGS in cpu_capabilities[current_settings.cputype] then
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taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset)
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else
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taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32);
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@ -784,7 +782,8 @@ Implementation
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GetNextInstruction(hp2,hp3) and
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MatchInstruction(hp3,A_POP) then
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begin
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if (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
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if (CPUAVR_HAS_MOVW in cpu_capabilities[current_settings.cputype]) and
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(getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
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((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
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(getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and
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((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then
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@ -2225,9 +2225,9 @@ unit cgcpu;
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regs:=regs+[RS_R28,RS_R29];
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{ we clear r1 }
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include(regs,RS_R1);
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include(regs,getsupreg(GetDefaultZeroReg));
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regs:=regs+[RS_R0];
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regs:=regs+[getsupreg(GetDefaultTmpReg)];
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for reg:=RS_R31 downto RS_R0 do
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if reg in regs then
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@ -2313,7 +2313,7 @@ unit cgcpu;
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end;
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{ we clear r1 }
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include(regs,RS_R1);
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include(regs,getsupreg(GetDefaultZeroReg));
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{ Reload SREG }
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regs:=regs+[getsupreg(GetDefaultTmpReg)];
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@ -2520,7 +2520,8 @@ unit cgcpu;
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begin
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SrcQuickRef:=false;
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DestQuickRef:=false;
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if (CPUAVR_16_REGS in cpu_capabilities[current_settings.cputype]) or
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if ((CPUAVR_16_REGS in cpu_capabilities[current_settings.cputype]) and
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not((source.Base=NR_NO) and (source.Index=NR_NO) and (source.symbol=nil) and (source.Offset in [0..64-len]))) or
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(
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not((source.addressmode=AM_UNCHANGED) and
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(source.symbol=nil) and
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@ -2541,7 +2542,8 @@ unit cgcpu;
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srcref:=source;
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end;
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if (CPUAVR_16_REGS in cpu_capabilities[current_settings.cputype]) or
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if ((CPUAVR_16_REGS in cpu_capabilities[current_settings.cputype]) and
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not((dest.Base=NR_NO) and (dest.Index=NR_NO) and (dest.symbol=nil) and (dest.Offset in [0..64-len]))) or
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(
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not((dest.addressmode=AM_UNCHANGED) and
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(dest.symbol=nil) and
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@ -534,13 +534,14 @@ Const
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CPUAVR_HAS_ELPMX,
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CPUAVR_2_BYTE_PC,
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CPUAVR_3_BYTE_PC,
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CPUAVR_16_REGS
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CPUAVR_16_REGS,
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CPUAVR_NOMEMMAPPED_REGS
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);
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const
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cpu_capabilities : array[tcputype] of set of tcpuflags =
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( { cpu_none } [],
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{ cpu_avrtiny } [CPUAVR_16_REGS,CPUAVR_2_BYTE_PC],
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{ cpu_avrtiny } [CPUAVR_16_REGS,CPUAVR_2_BYTE_PC,CPUAVR_NOMEMMAPPED_REGS],
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{ cpu_avr1 } [CPUAVR_2_BYTE_PC],
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{ cpu_avr2 } [CPUAVR_HAS_LPMX,CPUAVR_2_BYTE_PC],
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{ cpu_avr25 } [CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_2_BYTE_PC],
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@ -551,7 +552,7 @@ Const
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{ cpu_avr5 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_2_BYTE_PC],
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{ cpu_avr51 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_HAS_RAMPZ,CPUAVR_HAS_ELPM,CPUAVR_HAS_ELPMX,CPUAVR_2_BYTE_PC],
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{ cpu_avr6 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_HAS_RAMPZ,CPUAVR_HAS_ELPM,CPUAVR_HAS_ELPMX,CPUAVR_3_BYTE_PC],
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{ cpu_avrxmega3 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_2_BYTE_PC]
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{ cpu_avrxmega3 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_2_BYTE_PC,CPUAVR_NOMEMMAPPED_REGS]
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);
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Implementation
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@ -826,6 +826,8 @@ begin
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Add('OUTPUT_ARCH(avr:6)');
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cpu_avrxmega3:
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Add('OUTPUT_ARCH(avr:103)');
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cpu_avrtiny:
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Add('OUTPUT_ARCH(avr:100)');
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else
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Internalerror(2015072701);
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end;
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