paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-08-17 21:49:18 +02:00
Code Issues Packages Projects Releases Wiki Activity

* based on a patch by Christo Crause: more compiler fixes for avrtiny, resolves #36646

Browse Source 
git-svn-id: trunk@44103 -
This commit is contained in:
florian 2020-02-02 20:35:29 +00:00
parent 7abd324231
commit 36058ca4d4
5 changed files with 41 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
compiler/avr/aasmcpu.pas
View File

@ -475,6 +475,26 @@ implementation
taicpu(curtai).opcode:=A_RJMP; taicpu(curtai).opcode:=A_RJMP;
again:=true; again:=true;
end; end;
A_STS:
begin
if (current_settings.cputype=cpu_avrtiny) then
with taicpu(curtai).oper[0]^ do
if (ref^.base=NR_NO) and (ref^.index=NR_NO) and (ref^.symbol=nil) and (ref^.offset<$40) then
begin
taicpu(curtai).opcode:=A_OUT;
taicpu(curtai).loadconst(0,ref^.offset);
end;
end;
A_LDS:
begin
if (current_settings.cputype=cpu_avrtiny) then
with taicpu(curtai).oper[1]^ do
if (ref^.base=NR_NO) and (ref^.index=NR_NO) and (ref^.symbol=nil) and (ref^.offset<$40) then
begin
taicpu(curtai).opcode:=A_IN;
taicpu(curtai).loadconst(1,ref^.offset)
end;
end;
end; end;
ait_marker: ait_marker:
case tai_marker(curtai).Kind of case tai_marker(curtai).Kind of

17
compiler/avr/aoptcpu.pas
View File

@ -433,18 +433,17 @@ Implementation
(getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and (getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and
(getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and (getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and
(taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and (taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and
// avrxmega3 doesn't map registers into data space so no offset to subtract (((CPUAVR_NOMEMMAPPED_REGS in cpu_capabilities[current_settings.cputype]) and
(((current_settings.cputype = cpu_avrxmega3) and
(taicpu(p).oper[0]^.ref^.offset>=0) and (taicpu(p).oper[0]^.ref^.offset>=0) and
(taicpu(p).oper[0]^.ref^.offset<=63)) or (taicpu(p).oper[0]^.ref^.offset<=63)) or
((current_settings.cputype <> cpu_avrxmega3) and (not(CPUAVR_NOMEMMAPPED_REGS in cpu_capabilities[current_settings.cputype]) and
(taicpu(p).oper[0]^.ref^.offset>=32) and (taicpu(p).oper[0]^.ref^.offset>=32) and
(taicpu(p).oper[0]^.ref^.offset<=95))) then (taicpu(p).oper[0]^.ref^.offset<=95))) then
begin begin
DebugMsg('Peephole Sts2Out performed', p); DebugMsg('Peephole Sts2Out performed', p);
taicpu(p).opcode:=A_OUT; taicpu(p).opcode:=A_OUT;
if current_settings.cputype = cpu_avrxmega3 then if CPUAVR_NOMEMMAPPED_REGS in cpu_capabilities[current_settings.cputype] then
taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset) taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset)
else else
taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32); taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32);
@ -455,18 +454,17 @@ Implementation
(getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and (getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and
(getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and (getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and
(taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and (taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and
// avrxmega3 doesn't map registers into data space so no offset to subtract (((CPUAVR_NOMEMMAPPED_REGS in cpu_capabilities[current_settings.cputype]) and
(((current_settings.cputype = cpu_avrxmega3) and
(taicpu(p).oper[1]^.ref^.offset>=0) and (taicpu(p).oper[1]^.ref^.offset>=0) and
(taicpu(p).oper[1]^.ref^.offset<=63)) or (taicpu(p).oper[1]^.ref^.offset<=63)) or
((current_settings.cputype <> cpu_avrxmega3) and (not(CPUAVR_NOMEMMAPPED_REGS in cpu_capabilities[current_settings.cputype]) and
(taicpu(p).oper[1]^.ref^.offset>=32) and (taicpu(p).oper[1]^.ref^.offset>=32) and
(taicpu(p).oper[1]^.ref^.offset<=95))) then (taicpu(p).oper[1]^.ref^.offset<=95))) then
begin begin
DebugMsg('Peephole Lds2In performed', p); DebugMsg('Peephole Lds2In performed', p);
taicpu(p).opcode:=A_IN; taicpu(p).opcode:=A_IN;
if current_settings.cputype = cpu_avrxmega3 then if CPUAVR_NOMEMMAPPED_REGS in cpu_capabilities[current_settings.cputype] then
taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset) taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset)
else else
taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32); taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32);
@ -784,7 +782,8 @@ Implementation
GetNextInstruction(hp2,hp3) and GetNextInstruction(hp2,hp3) and
MatchInstruction(hp3,A_POP) then MatchInstruction(hp3,A_POP) then
begin begin
if (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and if (CPUAVR_HAS_MOVW in cpu_capabilities[current_settings.cputype]) and
(getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
(getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and (getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and
((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then ((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then

12
compiler/avr/cgcpu.pas
View File

@ -2225,9 +2225,9 @@ unit cgcpu;
regs:=regs+[RS_R28,RS_R29]; regs:=regs+[RS_R28,RS_R29];
{ we clear r1 } { we clear r1 }
include(regs,RS_R1); include(regs,getsupreg(GetDefaultZeroReg));
regs:=regs+[RS_R0]; regs:=regs+[getsupreg(GetDefaultTmpReg)];
for reg:=RS_R31 downto RS_R0 do for reg:=RS_R31 downto RS_R0 do
if reg in regs then if reg in regs then
@ -2313,7 +2313,7 @@ unit cgcpu;
end; end;
{ we clear r1 } { we clear r1 }
include(regs,RS_R1); include(regs,getsupreg(GetDefaultZeroReg));
{ Reload SREG } { Reload SREG }
regs:=regs+[getsupreg(GetDefaultTmpReg)]; regs:=regs+[getsupreg(GetDefaultTmpReg)];
@ -2520,7 +2520,8 @@ unit cgcpu;
begin begin
SrcQuickRef:=false; SrcQuickRef:=false;
DestQuickRef:=false; DestQuickRef:=false;
if (CPUAVR_16_REGS in cpu_capabilities[current_settings.cputype]) or if ((CPUAVR_16_REGS in cpu_capabilities[current_settings.cputype]) and
not((source.Base=NR_NO) and (source.Index=NR_NO) and (source.symbol=nil) and (source.Offset in [0..64-len]))) or
( (
not((source.addressmode=AM_UNCHANGED) and not((source.addressmode=AM_UNCHANGED) and
(source.symbol=nil) and (source.symbol=nil) and
@ -2541,7 +2542,8 @@ unit cgcpu;
srcref:=source; srcref:=source;
end; end;
if (CPUAVR_16_REGS in cpu_capabilities[current_settings.cputype]) or if ((CPUAVR_16_REGS in cpu_capabilities[current_settings.cputype]) and
not((dest.Base=NR_NO) and (dest.Index=NR_NO) and (dest.symbol=nil) and (dest.Offset in [0..64-len]))) or
( (
not((dest.addressmode=AM_UNCHANGED) and not((dest.addressmode=AM_UNCHANGED) and
(dest.symbol=nil) and (dest.symbol=nil) and

7
compiler/avr/cpuinfo.pas
View File

@ -534,13 +534,14 @@ Const
CPUAVR_HAS_ELPMX, CPUAVR_HAS_ELPMX,
CPUAVR_2_BYTE_PC, CPUAVR_2_BYTE_PC,
CPUAVR_3_BYTE_PC, CPUAVR_3_BYTE_PC,
CPUAVR_16_REGS CPUAVR_16_REGS,
CPUAVR_NOMEMMAPPED_REGS
); );
const const
cpu_capabilities : array[tcputype] of set of tcpuflags = cpu_capabilities : array[tcputype] of set of tcpuflags =
( { cpu_none } [], ( { cpu_none } [],
{ cpu_avrtiny } [CPUAVR_16_REGS,CPUAVR_2_BYTE_PC], { cpu_avrtiny } [CPUAVR_16_REGS,CPUAVR_2_BYTE_PC,CPUAVR_NOMEMMAPPED_REGS],
{ cpu_avr1 } [CPUAVR_2_BYTE_PC], { cpu_avr1 } [CPUAVR_2_BYTE_PC],
{ cpu_avr2 } [CPUAVR_HAS_LPMX,CPUAVR_2_BYTE_PC], { cpu_avr2 } [CPUAVR_HAS_LPMX,CPUAVR_2_BYTE_PC],
{ cpu_avr25 } [CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_2_BYTE_PC], { cpu_avr25 } [CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_2_BYTE_PC],
@ -551,7 +552,7 @@ Const
{ cpu_avr5 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_2_BYTE_PC], { cpu_avr5 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_2_BYTE_PC],
{ cpu_avr51 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_HAS_RAMPZ,CPUAVR_HAS_ELPM,CPUAVR_HAS_ELPMX,CPUAVR_2_BYTE_PC], { cpu_avr51 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_HAS_RAMPZ,CPUAVR_HAS_ELPM,CPUAVR_HAS_ELPMX,CPUAVR_2_BYTE_PC],
{ cpu_avr6 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_HAS_RAMPZ,CPUAVR_HAS_ELPM,CPUAVR_HAS_ELPMX,CPUAVR_3_BYTE_PC], { cpu_avr6 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_HAS_RAMPZ,CPUAVR_HAS_ELPM,CPUAVR_HAS_ELPMX,CPUAVR_3_BYTE_PC],
{ cpu_avrxmega3 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_2_BYTE_PC] { cpu_avrxmega3 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_2_BYTE_PC,CPUAVR_NOMEMMAPPED_REGS]
); );
Implementation Implementation

2
compiler/systems/t_embed.pas
View File

@ -826,6 +826,8 @@ begin
Add('OUTPUT_ARCH(avr:6)'); Add('OUTPUT_ARCH(avr:6)');
cpu_avrxmega3: cpu_avrxmega3:
Add('OUTPUT_ARCH(avr:103)'); Add('OUTPUT_ARCH(avr:103)');
cpu_avrtiny:
Add('OUTPUT_ARCH(avr:100)');
else else
Internalerror(2015072701); Internalerror(2015072701);
end; end;