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* fixed bug in typed constant record parsing with variant records
in case a variant part other than the first is initialised (the index of the next symbol was not adjusted, causing incorrect error messages in case there are some alignment bits/bytes between the previous and next field) git-svn-id: trunk@8948 -
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@ -7031,6 +7031,7 @@ tests/test/tprec18.pp svneol=native#text/plain
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tests/test/tprec19.pp svneol=native#text/plain
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tests/test/tprec2.pp svneol=native#text/plain
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tests/test/tprec20.pp svneol=native#text/plain
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tests/test/tprec21.pp svneol=native#text/plain
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tests/test/tprec3.pp svneol=native#text/plain
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tests/test/tprec4.pp svneol=native#text/plain
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tests/test/tprec5.pp svneol=native#text/plain
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@ -1052,7 +1052,10 @@ implementation
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{ end; }
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{ const r: tr = (w1:1;w2:1;l2:5); }
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(tfieldvarsym(recsym).fieldoffset = curroffset) then
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srsym := recsym
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begin
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srsym := recsym;
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symidx := def.symtable.SymList.indexof(srsym)
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end
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{ going backwards isn't allowed in any mode }
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else if (tfieldvarsym(recsym).fieldoffset<curroffset) then
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begin
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@ -1136,7 +1139,7 @@ implementation
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end;
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{ are there any fields left, but don't complain if there only
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come other variant partsa fter the last initialized field }
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come other variant parts after the last initialized field }
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if assigned(srsym) and
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(
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(recsym=nil) or
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52
tests/test/tprec21.pp
Normal file
52
tests/test/tprec21.pp
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@ -0,0 +1,52 @@
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const
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RS_CR = $00;
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RS_CR0 = $01;
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RS_CR1 = $02;
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RS_CR2 = $03;
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RS_CR3 = $04;
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RS_CR4 = $05;
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RS_CR5 = $06;
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RS_CR6 = $07;
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RS_CR7 = $08;
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type
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TAsmCondFlag = (C_None { unconditional jumps },
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{ conditions when not using ctr decrement etc }
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C_LT,C_LE,C_EQ,C_GE,C_GT,C_NL,C_NE,C_NG,C_SO,C_NS,C_UN,C_NU,
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{ conditions when using ctr decrement etc }
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C_T,C_F,C_DNZ,C_DNZT,C_DNZF,C_DZ,C_DZT,C_DZF);
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TDirHint = (DH_None,DH_Minus,DH_Plus);
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type
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TAsmCond = bitpacked record
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dirhint : tdirhint;
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case simple: boolean of
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false: (BO, BI: 0..31);
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true: (
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cond: TAsmCondFlag;
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case byte of
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0: ();
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{ specifies in which part of the cr the bit has to be }
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{ tested for blt,bgt,beq,..,bnu }
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1: (cr: RS_CR0..RS_CR7);
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{ specifies the bit to test for bt,bf,bdz,..,bdzf }
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2: (crbit: 0..31)
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);
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end;
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const
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zerocond: tasmcond = (dirhint: DH_Plus;
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simple: true;
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cond:C_NE;
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cr: RS_CR1);
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begin
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with zerocond do
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if (dirhint <> DH_Plus) or
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not simple or
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(cond <> C_NE) or
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(cr <> RS_CR1) then
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halt(1);
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end.
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