mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-04-20 11:09:42 +02:00
* fixed csdebug
This commit is contained in:
parent
378f8aab70
commit
39b4e0398a
@ -40,7 +40,11 @@ function RegSizesOK(oldReg,newReg: tsuperregister; p: taicpu): boolean;
|
||||
implementation
|
||||
|
||||
uses
|
||||
{$ifdef csdebug}
|
||||
cutils,
|
||||
{$else}
|
||||
{$ifdef replaceregdebug}cutils,{$endif}
|
||||
{$endif}
|
||||
globtype, verbose, procinfo, globals, daopt386, rgobj, rropt386;
|
||||
|
||||
{
|
||||
@ -1692,7 +1696,7 @@ begin
|
||||
begin
|
||||
{$ifdef csdebug}
|
||||
hp5 := tai_comment.Create(strpnew(
|
||||
'cse checking '+std_reg2str[getsupreg(taicpu(p).oper[1]^.reg)])));
|
||||
'cse checking '+std_regname(taicpu(p).oper[1]^.reg)));
|
||||
insertLLItem(asml,p,p.next,hp5);
|
||||
{$endif csdebug}
|
||||
if CheckSequence(p,prevSeq,getsupreg(taicpu(p).oper[1]^.reg), Cnt, reginfo, findPrevSeqs) and
|
||||
@ -1736,8 +1740,8 @@ begin
|
||||
for regcounter := RS_EAX To RS_EDI do
|
||||
if (regcounter in reginfo.RegsLoadedforRef) then
|
||||
begin
|
||||
hp5 := tai_comment.Create(strpnew('New: '+std_reg2str[regcounter]+', Old: '+
|
||||
std_reg2str[reginfo.new2oldreg[regcounter]])));
|
||||
hp5 := tai_comment.Create(strpnew('New: '+std_regname(newreg(R_INTREGISTER,regcounter,R_SUBNONE))+', Old: '+
|
||||
std_regname(newreg(R_INTREGISTER,reginfo.new2oldreg[regcounter],R_SUBNONE))));
|
||||
InsertLLItem(asml, tai(hp2.previous), hp2, hp5);
|
||||
end;
|
||||
{$EndIf CSDebug}
|
||||
@ -2056,7 +2060,10 @@ end.
|
||||
|
||||
{
|
||||
$Log$
|
||||
Revision 1.55 2003-12-14 14:18:59 peter
|
||||
Revision 1.56 2003-12-14 22:42:14 peter
|
||||
* fixed csdebug
|
||||
|
||||
Revision 1.55 2003/12/14 14:18:59 peter
|
||||
* optimizer works again with 1.0.x
|
||||
* fixed wrong loop in FindRegWithConst
|
||||
|
||||
|
@ -247,6 +247,9 @@ var
|
||||
Implementation
|
||||
|
||||
Uses
|
||||
{$ifdef csdebug}
|
||||
cutils,
|
||||
{$endif}
|
||||
globals, systems, verbose, symconst, symsym, cgobj,
|
||||
rgobj, procinfo;
|
||||
|
||||
@ -1480,7 +1483,7 @@ begin {checks whether two taicpu instructions are equal}
|
||||
begin
|
||||
include(RegInfo.RegsLoadedForRef, getsupreg(base));
|
||||
{$ifdef csdebug}
|
||||
Writeln(std_reg2str[base], ' added');
|
||||
Writeln(std_regname(base), ' added');
|
||||
{$endif csdebug}
|
||||
end;
|
||||
if (index <> NR_NO) and
|
||||
@ -1489,7 +1492,7 @@ begin {checks whether two taicpu instructions are equal}
|
||||
begin
|
||||
include(RegInfo.RegsLoadedForRef, getsupreg(index));
|
||||
{$ifdef csdebug}
|
||||
Writeln(std_reg2str[index], ' added');
|
||||
Writeln(std_regname(index), ' added');
|
||||
{$endif csdebug}
|
||||
end;
|
||||
|
||||
@ -1500,7 +1503,7 @@ begin {checks whether two taicpu instructions are equal}
|
||||
RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
|
||||
[getsupreg(taicpu(p2).oper[1]^.reg)];
|
||||
{$ifdef csdebug}
|
||||
Writeln(std_reg2str[getsupreg(taicpu(p2).oper[1]^.reg)], ' removed');
|
||||
Writeln(std_regname(getsupreg(taicpu(p2).oper[1]^.reg)), ' removed');
|
||||
{$endif csdebug}
|
||||
end;
|
||||
InstructionsEquivalent :=
|
||||
@ -1513,9 +1516,9 @@ begin {checks whether two taicpu instructions are equal}
|
||||
{$ifdef csdebug}
|
||||
hp := tai_comment.Create(strpnew('checking if equivalent'));
|
||||
hp.previous := p2;
|
||||
hp.next := p2^.next;
|
||||
p2^.next^.previous := hp;
|
||||
p2^.next := hp;
|
||||
hp.next := p2.next;
|
||||
p2.next.previous := hp;
|
||||
p2.next := hp;
|
||||
{$endif csdebug}
|
||||
InstructionsEquivalent :=
|
||||
(not(assigned(taicpu(p1).oper[0])) or
|
||||
@ -1532,18 +1535,18 @@ begin {checks whether two taicpu instructions are equal}
|
||||
{$ifdef csdebug}
|
||||
hp := tai_comment.Create(strpnew('different opcodes/format'));
|
||||
hp.previous := p2;
|
||||
hp.next := p2^.next;
|
||||
p2^.next^.previous := hp;
|
||||
p2^.next := hp;
|
||||
hp.next := p2.next;
|
||||
p2.next.previous := hp;
|
||||
p2.next := hp;
|
||||
{$endif csdebug}
|
||||
InstructionsEquivalent := False;
|
||||
end;
|
||||
{$ifdef csdebug}
|
||||
hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
|
||||
hp.previous := p2;
|
||||
hp.next := p2^.next;
|
||||
p2^.next^.previous := hp;
|
||||
p2^.next := hp;
|
||||
hp.next := p2.next;
|
||||
p2.next.previous := hp;
|
||||
p2.next := hp;
|
||||
{$endif csdebug}
|
||||
end;
|
||||
|
||||
@ -2705,7 +2708,10 @@ end.
|
||||
|
||||
{
|
||||
$Log$
|
||||
Revision 1.58 2003-12-14 14:18:59 peter
|
||||
Revision 1.59 2003-12-14 22:42:14 peter
|
||||
* fixed csdebug
|
||||
|
||||
Revision 1.58 2003/12/14 14:18:59 peter
|
||||
* optimizer works again with 1.0.x
|
||||
* fixed wrong loop in FindRegWithConst
|
||||
|
||||
|
@ -809,7 +809,7 @@ begin
|
||||
fld/fst mem1 (hp1) fld/fst mem1
|
||||
fld mem2 (p) fxxx mem2
|
||||
fxxxp st, st1 (hp2) }
|
||||
|
||||
|
||||
begin
|
||||
case taicpu(hp2).opcode Of
|
||||
A_FADDP: taicpu(p).opcode := A_FADD;
|
||||
@ -1996,7 +1996,10 @@ end.
|
||||
|
||||
{
|
||||
$Log$
|
||||
Revision 1.51 2003-12-13 15:48:47 jonas
|
||||
Revision 1.52 2003-12-14 22:42:14 peter
|
||||
* fixed csdebug
|
||||
|
||||
Revision 1.51 2003/12/13 15:48:47 jonas
|
||||
* isgp32reg was being called with both tsuperregister and tregister
|
||||
parameters, so changed type to tsuperregister (fixes bug reported by
|
||||
Bas Steendijk)
|
||||
|
Loading…
Reference in New Issue
Block a user