* the switch -Oouseebp allows the i386 compiler to use ebp as normal register

the drawback of this is that get_caller_frame and get_caller_addr might not work
  anymore because they make the wrong assumption (i.e. not required by the abi)
  that ebp contains always a valid (not necessarily the current) frame pointer

git-svn-id: trunk@21918 -
This commit is contained in:
florian 2012-07-15 19:23:36 +00:00
parent b1d00b66ac
commit 3a9e3991be
4 changed files with 8 additions and 5 deletions

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@ -243,7 +243,7 @@ interface
cs_opt_level1,cs_opt_level2,cs_opt_level3, cs_opt_level1,cs_opt_level2,cs_opt_level3,
cs_opt_regvar,cs_opt_uncertain,cs_opt_size,cs_opt_stackframe, cs_opt_regvar,cs_opt_uncertain,cs_opt_size,cs_opt_stackframe,
cs_opt_peephole,cs_opt_asmcse,cs_opt_loopunroll,cs_opt_tailrecursion,cs_opt_nodecse, cs_opt_peephole,cs_opt_asmcse,cs_opt_loopunroll,cs_opt_tailrecursion,cs_opt_nodecse,
cs_opt_nodedfa,cs_opt_loopstrength,cs_opt_scheduler,cs_opt_autoinline cs_opt_nodedfa,cs_opt_loopstrength,cs_opt_scheduler,cs_opt_autoinline,cs_useebp
); );
toptimizerswitches = set of toptimizerswitch; toptimizerswitches = set of toptimizerswitch;
@ -267,7 +267,7 @@ interface
'LEVEL1','LEVEL2','LEVEL3', 'LEVEL1','LEVEL2','LEVEL3',
'REGVAR','UNCERTAIN','SIZE','STACKFRAME', 'REGVAR','UNCERTAIN','SIZE','STACKFRAME',
'PEEPHOLE','ASMCSE','LOOPUNROLL','TAILREC','CSE', 'PEEPHOLE','ASMCSE','LOOPUNROLL','TAILREC','CSE',
'DFA','STRENGTH','SCHEDULE','AUTOINLINE' 'DFA','STRENGTH','SCHEDULE','AUTOINLINE','USEEBP'
); );
WPOptimizerSwitchStr : array [twpoptimizerswitch] of string[14] = ( WPOptimizerSwitchStr : array [twpoptimizerswitch] of string[14] = (
'DEVIRTCALLS','OPTVMTS','SYMBOLLIVENESS' 'DEVIRTCALLS','OPTVMTS','SYMBOLLIVENESS'

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@ -89,7 +89,10 @@ unit cgcpu;
(cs_create_pic in current_settings.moduleswitches) then (cs_create_pic in current_settings.moduleswitches) then
rg[R_INTREGISTER]:=trgcpu.create(R_INTREGISTER,R_SUBWHOLE,[RS_EAX,RS_EDX,RS_ECX,RS_ESI,RS_EDI],first_int_imreg,[RS_EBP]) rg[R_INTREGISTER]:=trgcpu.create(R_INTREGISTER,R_SUBWHOLE,[RS_EAX,RS_EDX,RS_ECX,RS_ESI,RS_EDI],first_int_imreg,[RS_EBP])
else else
rg[R_INTREGISTER]:=trgcpu.create(R_INTREGISTER,R_SUBWHOLE,[RS_EAX,RS_EDX,RS_ECX,RS_EBX,RS_ESI,RS_EDI],first_int_imreg,[RS_EBP]); if (cs_useebp in current_settings.optimizerswitches) and assigned(current_procinfo) and (current_procinfo.framepointer<>NR_EBP) then
rg[R_INTREGISTER]:=trgcpu.create(R_INTREGISTER,R_SUBWHOLE,[RS_EAX,RS_EDX,RS_ECX,RS_EBX,RS_ESI,RS_EDI,RS_EBP],first_int_imreg,[])
else
rg[R_INTREGISTER]:=trgcpu.create(R_INTREGISTER,R_SUBWHOLE,[RS_EAX,RS_EDX,RS_ECX,RS_EBX,RS_ESI,RS_EDI],first_int_imreg,[RS_EBP]);
rg[R_MMXREGISTER]:=trgcpu.create(R_MMXREGISTER,R_SUBNONE,[RS_XMM0,RS_XMM1,RS_XMM2,RS_XMM3,RS_XMM4,RS_XMM5,RS_XMM6,RS_XMM7],first_mm_imreg,[]); rg[R_MMXREGISTER]:=trgcpu.create(R_MMXREGISTER,R_SUBNONE,[RS_XMM0,RS_XMM1,RS_XMM2,RS_XMM3,RS_XMM4,RS_XMM5,RS_XMM6,RS_XMM7],first_mm_imreg,[]);
rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBWHOLE,[RS_XMM0,RS_XMM1,RS_XMM2,RS_XMM3,RS_XMM4,RS_XMM5,RS_XMM6,RS_XMM7],first_mm_imreg,[]); rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBWHOLE,[RS_XMM0,RS_XMM1,RS_XMM2,RS_XMM3,RS_XMM4,RS_XMM5,RS_XMM6,RS_XMM7],first_mm_imreg,[]);
rgfpu:=Trgx86fpu.create; rgfpu:=Trgx86fpu.create;

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@ -135,7 +135,7 @@
This value can be deduced from the CALLED_USED_REGISTERS array in the This value can be deduced from the CALLED_USED_REGISTERS array in the
GCC source. GCC source.
} }
saved_standard_registers : array[0..2] of tsuperregister = (RS_EBX,RS_ESI,RS_EDI); saved_standard_registers : array[0..3] of tsuperregister = (RS_EBX,RS_ESI,RS_EDI,RS_EBP);
saved_mm_registers : array[0..0] of tsuperregister = (RS_INVALID); saved_mm_registers : array[0..0] of tsuperregister = (RS_INVALID);
{# Required parameter alignment when calling a routine declared as {# Required parameter alignment when calling a routine declared as

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@ -102,7 +102,7 @@ Const
[cs_opt_level1,cs_opt_level2,cs_opt_level3]+ [cs_opt_level1,cs_opt_level2,cs_opt_level3]+
[cs_opt_peephole,cs_opt_regvar,cs_opt_stackframe, [cs_opt_peephole,cs_opt_regvar,cs_opt_stackframe,
cs_opt_asmcse,cs_opt_loopunroll,cs_opt_uncertain, cs_opt_asmcse,cs_opt_loopunroll,cs_opt_uncertain,
cs_opt_tailrecursion,cs_opt_nodecse]; cs_opt_tailrecursion,cs_opt_nodecse,cs_useebp];
level1optimizerswitches = genericlevel1optimizerswitches + [cs_opt_peephole]; level1optimizerswitches = genericlevel1optimizerswitches + [cs_opt_peephole];
level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches + level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches +