mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-08-15 18:49:16 +02:00
* several FPU instructions weren't marked as reading operand one (like
FADD and FSUB)
This commit is contained in:
parent
a663745429
commit
3b4a3a2cee
@ -467,9 +467,3 @@
|
|||||||
'pswapd',
|
'pswapd',
|
||||||
'ffreep'
|
'ffreep'
|
||||||
);
|
);
|
||||||
{
|
|
||||||
$Log$
|
|
||||||
Revision 1.2 2000-07-13 11:32:42 michael
|
|
||||||
+ removed logs
|
|
||||||
|
|
||||||
}
|
|
||||||
|
@ -467,9 +467,3 @@ attsufNONE,
|
|||||||
attsufNONE,
|
attsufNONE,
|
||||||
attsufNONE
|
attsufNONE
|
||||||
);
|
);
|
||||||
{
|
|
||||||
$Log$
|
|
||||||
Revision 1.2 2000-07-13 11:32:42 michael
|
|
||||||
+ removed logs
|
|
||||||
|
|
||||||
}
|
|
||||||
|
@ -344,7 +344,7 @@ void \2\xD9\xF0 8086,FPU
|
|||||||
void \2\xD9\xE1 8086,FPU
|
void \2\xD9\xE1 8086,FPU
|
||||||
|
|
||||||
[FADD,faddF]
|
[FADD,faddF]
|
||||||
(Ch_FPU, Ch_None, Ch_None)
|
(Ch_FPU, Ch_ROp1, Ch_None)
|
||||||
mem32 \300\1\xD8\200 8086,FPU
|
mem32 \300\1\xD8\200 8086,FPU
|
||||||
mem64 \300\1\xDC\200 8086,FPU
|
mem64 \300\1\xDC\200 8086,FPU
|
||||||
void \2\xDE\xC1 8086,FPU
|
void \2\xDE\xC1 8086,FPU
|
||||||
@ -354,7 +354,7 @@ fpureg \1\xD8\10\xC0 8086,FPU
|
|||||||
fpu0,fpureg \1\xD8\11\xC0 8086,FPU
|
fpu0,fpureg \1\xD8\11\xC0 8086,FPU
|
||||||
|
|
||||||
[FADDP,faddpF]
|
[FADDP,faddpF]
|
||||||
(Ch_FPU, Ch_None, Ch_None)
|
(Ch_FPU, Ch_ROp1, Ch_None)
|
||||||
void \2\xDE\xC1 8086,FPU
|
void \2\xDE\xC1 8086,FPU
|
||||||
fpureg \1\xDE\10\xC0 8086,FPU
|
fpureg \1\xDE\10\xC0 8086,FPU
|
||||||
fpureg,fpu0 \1\xDE\10\xC0 8086,FPU
|
fpureg,fpu0 \1\xDE\10\xC0 8086,FPU
|
||||||
@ -470,7 +470,7 @@ void \2\xD9\xF6 8086,FPU
|
|||||||
void \3\x9B\xDB\xE1 8086,FPU
|
void \3\x9B\xDB\xE1 8086,FPU
|
||||||
|
|
||||||
[FDIV,fdivF]
|
[FDIV,fdivF]
|
||||||
(Ch_FPU, Ch_None, Ch_None)
|
(Ch_FPU, Ch_ROp1, Ch_None)
|
||||||
mem32 \300\1\xD8\206 8086,FPU
|
mem32 \300\1\xD8\206 8086,FPU
|
||||||
mem64 \300\1\xDC\206 8086,FPU
|
mem64 \300\1\xDC\206 8086,FPU
|
||||||
void \2\xDC\xF1 8086,FPU
|
void \2\xDC\xF1 8086,FPU
|
||||||
@ -480,13 +480,13 @@ fpureg \1\xD8\10\xF0 8086,FPU
|
|||||||
fpu0,fpureg \1\xD8\11\xF0 8086,FPU
|
fpu0,fpureg \1\xD8\11\xF0 8086,FPU
|
||||||
|
|
||||||
[FDIVP,fdivpF]
|
[FDIVP,fdivpF]
|
||||||
(Ch_FPU, Ch_None, Ch_None)
|
(Ch_FPU, Ch_ROp1, Ch_None)
|
||||||
void \2\xDE\xF1 8086,FPU
|
void \2\xDE\xF1 8086,FPU
|
||||||
fpureg,fpu0 \1\xDE\10\xF0 8086,FPU
|
fpureg,fpu0 \1\xDE\10\xF0 8086,FPU
|
||||||
fpureg \1\xDE\10\xF0 8086,FPU
|
fpureg \1\xDE\10\xF0 8086,FPU
|
||||||
|
|
||||||
[FDIVR,fdivrF]
|
[FDIVR,fdivrF]
|
||||||
(Ch_FPU, Ch_None, Ch_None)
|
(Ch_FPU, Ch_ROp1, Ch_None)
|
||||||
mem32 \300\1\xD8\207 8086,FPU
|
mem32 \300\1\xD8\207 8086,FPU
|
||||||
mem64 \300\1\xDC\207 8086,FPU
|
mem64 \300\1\xDC\207 8086,FPU
|
||||||
void \2\xDC\xF9 8086,FPU
|
void \2\xDC\xF9 8086,FPU
|
||||||
@ -496,7 +496,7 @@ fpureg \1\xD8\10\xF8 8086,FPU
|
|||||||
fpu0,fpureg \1\xD8\11\xF8 8086,FPU
|
fpu0,fpureg \1\xD8\11\xF8 8086,FPU
|
||||||
|
|
||||||
[FDIVRP,fdivrpF]
|
[FDIVRP,fdivrpF]
|
||||||
(Ch_FPU, Ch_None, Ch_None)
|
(Ch_FPU, Ch_ROp1, Ch_None)
|
||||||
void \2\xDE\xF9 8086,FPU
|
void \2\xDE\xF9 8086,FPU
|
||||||
fpureg \1\xDE\10\xF8 8086,FPU
|
fpureg \1\xDE\10\xF8 8086,FPU
|
||||||
fpureg,fpu0 \1\xDE\10\xF8 8086,FPU
|
fpureg,fpu0 \1\xDE\10\xF8 8086,FPU
|
||||||
@ -514,7 +514,7 @@ void \3\x9B\xDB\xE0 8086,FPU
|
|||||||
fpureg \1\xDD\10\xC0 8086,FPU
|
fpureg \1\xDD\10\xC0 8086,FPU
|
||||||
|
|
||||||
[FIADD,fiaddR]
|
[FIADD,fiaddR]
|
||||||
(Ch_FPU, Ch_None, Ch_None)
|
(Ch_FPU, Ch_ROp1, Ch_None)
|
||||||
mem16 \300\1\xDE\200 8086,FPU
|
mem16 \300\1\xDE\200 8086,FPU
|
||||||
mem32 \300\1\xDA\200 8086,FPU
|
mem32 \300\1\xDA\200 8086,FPU
|
||||||
|
|
||||||
@ -529,23 +529,23 @@ mem16 \300\1\xDE\203 8086,FPU
|
|||||||
mem32 \300\1\xDA\203 8086,FPU
|
mem32 \300\1\xDA\203 8086,FPU
|
||||||
|
|
||||||
[FIDIV,fidivR]
|
[FIDIV,fidivR]
|
||||||
(Ch_FPU, Ch_None, Ch_None)
|
(Ch_FPU, Ch_ROp1, Ch_None)
|
||||||
mem16 \300\1\xDE\206 8086,FPU
|
mem16 \300\1\xDE\206 8086,FPU
|
||||||
mem32 \300\1\xDA\206 8086,FPU
|
mem32 \300\1\xDA\206 8086,FPU
|
||||||
|
|
||||||
[FIDIVR,fidivrR]
|
[FIDIVR,fidivrR]
|
||||||
(Ch_FPU, Ch_None, Ch_None)
|
(Ch_FPU, Ch_ROp1, Ch_None)
|
||||||
mem16 \300\1\xDE\207 8086,FPU
|
mem16 \300\1\xDE\207 8086,FPU
|
||||||
mem32 \300\1\xDA\207 8086,FPU
|
mem32 \300\1\xDA\207 8086,FPU
|
||||||
|
|
||||||
[FILD,fildR]
|
[FILD,fildR]
|
||||||
(Ch_FPU, Ch_None, Ch_None)
|
(Ch_FPU, Ch_ROp1, Ch_None)
|
||||||
mem32 \300\1\xDB\200 8086,FPU
|
mem32 \300\1\xDB\200 8086,FPU
|
||||||
mem16 \320\300\1\xDF\200 8086,FPU
|
mem16 \320\300\1\xDF\200 8086,FPU
|
||||||
mem64 \300\1\xDF\205 8086,FPU
|
mem64 \300\1\xDF\205 8086,FPU
|
||||||
|
|
||||||
[FIMUL,fimulR]
|
[FIMUL,fimulR]
|
||||||
(Ch_FPU, Ch_None, Ch_None)
|
(Ch_FPU, Ch_ROp1, Ch_None)
|
||||||
mem16 \300\1\xDE\201 8086,FPU
|
mem16 \300\1\xDE\201 8086,FPU
|
||||||
mem32 \300\1\xDA\201 8086,FPU
|
mem32 \300\1\xDA\201 8086,FPU
|
||||||
|
|
||||||
@ -569,12 +569,12 @@ mem16 \320\300\1\xDF\203 8086,FPU
|
|||||||
mem64 \300\1\xDF\207 8086,FPU
|
mem64 \300\1\xDF\207 8086,FPU
|
||||||
|
|
||||||
[FISUB,fisubR]
|
[FISUB,fisubR]
|
||||||
(Ch_FPU, Ch_None, Ch_None)
|
(Ch_FPU, Ch_ROp1, Ch_None)
|
||||||
mem16 \300\1\xDE\204 8086,FPU
|
mem16 \300\1\xDE\204 8086,FPU
|
||||||
mem32 \300\1\xDA\204 8086,FPU
|
mem32 \300\1\xDA\204 8086,FPU
|
||||||
|
|
||||||
[FISUBR,fisubrR]
|
[FISUBR,fisubrR]
|
||||||
(Ch_FPU, Ch_None, Ch_None)
|
(Ch_FPU, Ch_ROp1, Ch_None)
|
||||||
mem16 \300\1\xDE\205 8086,FPU
|
mem16 \300\1\xDE\205 8086,FPU
|
||||||
mem32 \300\1\xDA\205 8086,FPU
|
mem32 \300\1\xDA\205 8086,FPU
|
||||||
|
|
||||||
|
@ -467,9 +467,3 @@
|
|||||||
'pswapd',
|
'pswapd',
|
||||||
'ffreep'
|
'ffreep'
|
||||||
);
|
);
|
||||||
{
|
|
||||||
$Log$
|
|
||||||
Revision 1.2 2000-07-13 11:32:42 michael
|
|
||||||
+ removed logs
|
|
||||||
|
|
||||||
}
|
|
||||||
|
@ -467,9 +467,3 @@ A_PF2IW,
|
|||||||
A_PSWAPD,
|
A_PSWAPD,
|
||||||
A_FFREEP
|
A_FFREEP
|
||||||
);
|
);
|
||||||
{
|
|
||||||
$Log$
|
|
||||||
Revision 1.2 2000-07-13 11:32:42 michael
|
|
||||||
+ removed logs
|
|
||||||
|
|
||||||
}
|
|
||||||
|
@ -43,8 +43,8 @@
|
|||||||
(Ch: (Ch_RWESP, Ch_None, Ch_None)),
|
(Ch: (Ch_RWESP, Ch_None, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
|
||||||
(Ch: (Ch_Rop1, Ch_FPU, Ch_None)),
|
(Ch: (Ch_Rop1, Ch_FPU, Ch_None)),
|
||||||
(Ch: (Ch_Wop1, Ch_FPU, Ch_None)),
|
(Ch: (Ch_Wop1, Ch_FPU, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
||||||
@ -65,26 +65,26 @@
|
|||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
|
||||||
(Ch: (Ch_All, Ch_None, Ch_None)),
|
(Ch: (Ch_All, Ch_None, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
||||||
|
(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
||||||
(Ch: (Ch_Wop1, Ch_None, Ch_None)),
|
(Ch: (Ch_Wop1, Ch_None, Ch_None)),
|
||||||
(Ch: (Ch_Wop1, Ch_None, Ch_None)),
|
(Ch: (Ch_Wop1, Ch_None, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
|
||||||
(Ch: (Ch_Rop1, Ch_FPU, Ch_None)),
|
(Ch: (Ch_Rop1, Ch_FPU, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
||||||
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
(Ch: (Ch_FPU, Ch_None, Ch_None)),
|
||||||
|
@ -9276,13 +9276,3 @@
|
|||||||
flags : if_pent or if_3dnow or if_fpu
|
flags : if_pent or if_3dnow or if_fpu
|
||||||
)
|
)
|
||||||
);
|
);
|
||||||
|
|
||||||
{
|
|
||||||
$Log$
|
|
||||||
Revision 1.3 2000-07-13 12:08:26 michael
|
|
||||||
+ patched to 1.1.0 with former 1.09patch from peter
|
|
||||||
|
|
||||||
Revision 1.2 2000/07/13 11:32:42 michael
|
|
||||||
+ removed logs
|
|
||||||
|
|
||||||
}
|
|
||||||
|
Loading…
Reference in New Issue
Block a user