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* some small m68k bugfixes

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This commit is contained in:
carl 2003-02-12 22:11:13 +00:00
parent ce2b1f45ef
commit 3c97889b0f
2 changed files with 34 additions and 15 deletions
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11
compiler/m68k/cgcpu.pas
View File

@ -446,7 +446,7 @@ Implementation
OP_AND, OP_AND,
OP_OR: OP_OR:
Begin Begin
list.concat(taicpu.op_const_reg(topcg2tasmop[op],S_L,a, reg)); list.concat(taicpu.op_const_reg(topcg2tasmop[op],S_L,longint(a), reg));
end; end;
OP_DIV : OP_DIV :
Begin Begin
@ -1014,7 +1014,9 @@ Implementation
list.concat(taicpu.op_reg_sym(A_DBRA,S_L,hregister,hl)); list.concat(taicpu.op_reg_sym(A_DBRA,S_L,hregister,hl));
end; end;
{ restore the registers that we have just used olny if they are used! } { restore the registers that we have just used olny if they are used! }
free_scratch_reg(list, iregister);
free_scratch_reg(list, jregister);
if jregister.enum = R_A1 then if jregister.enum = R_A1 then
hp2.base.enum := R_NO; hp2.base.enum := R_NO;
if iregister.enum = R_A0 then if iregister.enum = R_A0 then
@ -1335,7 +1337,10 @@ end.
{ {
$Log$ $Log$
Revision 1.16 2003-02-02 19:25:54 carl Revision 1.17 2003-02-12 22:11:13 carl
* some small m68k bugfixes
Revision 1.16 2003/02/02 19:25:54 carl
* Several bugfixes for m68k target (register alloc., opcode emission) * Several bugfixes for m68k target (register alloc., opcode emission)
+ VIS target + VIS target
+ Generic add more complete (still not verified) + Generic add more complete (still not verified)

38
compiler/m68k/rasm.pas
View File

@ -101,7 +101,7 @@ type
AS_SEPARATOR,AS_ID,AS_REGISTER,AS_OPCODE,AS_SLASH,AS_APPT,AS_REALNUM, AS_SEPARATOR,AS_ID,AS_REGISTER,AS_OPCODE,AS_SLASH,AS_APPT,AS_REALNUM,
AS_ALIGN, AS_ALIGN,
{------------------ Assembler directives --------------------} {------------------ Assembler directives --------------------}
AS_DB,AS_DW,AS_DD,AS_END, AS_DB,AS_DW,AS_DD,AS_XDEF,AS_END,
{------------------ Assembler Operators --------------------} {------------------ Assembler Operators --------------------}
AS_MOD,AS_SHL,AS_SHR,AS_NOT,AS_AND,AS_OR,AS_XOR); AS_MOD,AS_SHL,AS_SHR,AS_NOT,AS_AND,AS_OR,AS_XOR);
@ -117,7 +117,7 @@ const
_count_asmoperators = longint(lastoperator)-longint(firstoperator); _count_asmoperators = longint(lastoperator)-longint(firstoperator);
_asmdirectives : array[0.._count_asmdirectives] of tasmkeyword = _asmdirectives : array[0.._count_asmdirectives] of tasmkeyword =
('DC.B','DC.W','DC.L','END'); ('DC.B','DC.W','DC.L','XDEF','END');
{ problems with shl,shr,not,and,or and xor, they are } { problems with shl,shr,not,and,or and xor, they are }
{ context sensitive. } { context sensitive. }
@ -1471,16 +1471,18 @@ type
end end
else else
Message1(sym_e_unknown_id,actasmpattern); Message1(sym_e_unknown_id,actasmpattern);
expr := actasmpattern;
Consume(AS_ID);
case actasmtoken of
AS_LPAREN: { indexing }
BuildReference;
AS_SEPARATOR,AS_COMMA: ;
else
Message(asmr_e_syntax_error);
end;
end; end;
expr := actasmpattern;
Consume(AS_ID);
case actasmtoken of
AS_LPAREN: { indexing }
BuildReference;
AS_SEPARATOR,AS_COMMA: ;
else
Message(asmr_e_syntax_error);
end;
end; end;
end; end;
{ // Pre-decrement mode reference or constant mem offset. // } { // Pre-decrement mode reference or constant mem offset. // }
@ -2133,6 +2135,15 @@ type
Consume(AS_DD); Consume(AS_DD);
BuildConstant($ffffffff); BuildConstant($ffffffff);
end; end;
AS_XDEF:
Begin
Consume(AS_XDEF);
if actasmtoken=AS_ID then
ConcatPublic(curlist,actasmpattern);
Consume(AS_ID);
if actasmtoken<>AS_SEPARATOR then
Consume(AS_SEPARATOR);
end;
AS_ALIGN: Begin AS_ALIGN: Begin
Message(asmr_w_align_not_supported); Message(asmr_w_align_not_supported);
while actasmtoken <> AS_SEPARATOR do while actasmtoken <> AS_SEPARATOR do
@ -2197,7 +2208,10 @@ Begin
end. end.
{ {
$Log$ $Log$
Revision 1.11 2003-01-08 18:43:57 daniel Revision 1.12 2003-02-12 22:11:13 carl
* some small m68k bugfixes
Revision 1.11 2003/01/08 18:43:57 daniel
* Tregister changed into a record * Tregister changed into a record
Revision 1.10 2002/12/14 15:02:03 carl Revision 1.10 2002/12/14 15:02:03 carl