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* x86: FuncMov2Func moved to separate method and also called by OptPass2MOV.
This commit is contained in:
J. Gareth "Curious Kit" Moreton
FPK
parent
d35be8a9ea
commit
3d805b8a9a
@ -137,6 +137,8 @@ unit aoptx86;
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function DeepMOVOpt(const p_mov: taicpu; const hp: taicpu): Boolean;
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function DeepMOVOpt(const p_mov: taicpu; const hp: taicpu): Boolean;
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function FuncMov2Func(var p: tai; const hp1: tai): Boolean;
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procedure DebugMsg(const s : string; p : tai);inline;
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procedure DebugMsg(const s : string; p : tai);inline;
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class function IsExitCode(p : tai) : boolean; static;
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class function IsExitCode(p : tai) : boolean; static;
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@ -2682,6 +2684,87 @@ unit aoptx86;
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end;
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end;
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function TX86AsmOptimizer.FuncMov2Func(var p: tai; const hp1: tai): Boolean;
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var
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hp2: tai;
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p_SourceReg, p_TargetReg: TRegister;
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begin
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Result := False;
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{ Backward optimisation. If we have:
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func. %reg1,%reg2
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mov %reg2,%reg3
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(dealloc %reg2)
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Change to:
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func. %reg1,%reg3 (see comment below for what a valid func. is)
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Perform similar optimisations with 1, 3 and 4-operand instructions
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that only have one output.
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}
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if MatchOpType(taicpu(p), top_reg, top_reg) then
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begin
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p_SourceReg := taicpu(p).oper[0]^.reg;
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p_TargetReg := taicpu(p).oper[1]^.reg;
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TransferUsedRegs(TmpUsedRegs);
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if not RegUsedAfterInstruction(p_SourceReg, p, TmpUsedRegs) and
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GetLastInstruction(p, hp2) and
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(hp2.typ = ait_instruction) and
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{ Have to make sure it's an instruction that only reads from
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the first operands and only writes (not reads or modifies) to
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the last one; in essence, a pure function such as BSR, POPCNT
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or ANDN }
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(
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(
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(taicpu(hp2).ops = 1) and
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(insprop[taicpu(hp2).opcode].Ch * [Ch_Wop1] = [Ch_Wop1])
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) or
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(
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(taicpu(hp2).ops = 2) and
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(insprop[taicpu(hp2).opcode].Ch * [Ch_Rop1, Ch_Wop2] = [Ch_Rop1, Ch_Wop2])
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) or
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(
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(taicpu(hp2).ops = 3) and
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(insprop[taicpu(hp2).opcode].Ch * [Ch_Rop1, Ch_Rop2, Ch_Wop3] = [Ch_Rop1, Ch_Rop2, Ch_Wop3])
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) or
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(
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(taicpu(hp2).ops = 4) and
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(insprop[taicpu(hp2).opcode].Ch * [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4] = [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4])
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)
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) and
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(taicpu(hp2).oper[taicpu(hp2).ops-1]^.typ = top_reg) and
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(taicpu(hp2).oper[taicpu(hp2).ops-1]^.reg = p_SourceReg) then
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begin
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case taicpu(hp2).opcode of
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A_FSTSW, A_FNSTSW,
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A_IN, A_INS, A_OUT, A_OUTS,
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A_CMPS, A_LODS, A_MOVS, A_SCAS, A_STOS:
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{ These routines have explicit operands, but they are restricted in
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what they can be (e.g. IN and OUT can only read from AL, AX or
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EAX. }
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;
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else
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begin
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DebugMsg(SPeepholeOptimization + 'Removed MOV and changed destination on previous instruction to optimise register usage (FuncMov2Func)', p);
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taicpu(hp2).oper[taicpu(hp2).ops-1]^.reg := p_TargetReg;
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if not RegInInstruction(p_TargetReg, hp2) then
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begin
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{ Since we're allocating from an earlier point, we
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need to remove the register from the tracking }
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ExcludeRegFromUsedRegs(p_TargetReg, TmpUsedRegs);
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AllocRegBetween(p_TargetReg, hp2, p, TmpUsedRegs);
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end;
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RemoveCurrentp(p, hp1);
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Result := True;
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Exit;
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end;
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end;
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end;
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end;
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end;
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function TX86AsmOptimizer.OptPass1MOV(var p : tai) : boolean;
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function TX86AsmOptimizer.OptPass1MOV(var p : tai) : boolean;
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var
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var
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hp1, hp2, hp3: tai;
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hp1, hp2, hp3: tai;
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@ -4810,78 +4893,13 @@ unit aoptx86;
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end;
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end;
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end;
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end;
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{ Backward optimisation. If we have:
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{ Backward optimisation shared with OptPass2MOV }
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func. %reg1,%reg2
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if FuncMov2Func(p, hp1) then
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mov %reg2,%reg3
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(dealloc %reg2)
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Change to:
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func. %reg1,%reg3 (see comment below for what a valid func. is)
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Perform similar optimisations with 1, 3 and 4-operand instructions
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that only have one output.
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}
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if MatchOpType(taicpu(p), top_reg, top_reg) then
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begin
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begin
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p_SourceReg := taicpu(p).oper[0]^.reg;
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{ Remember that p_TargetReg contains taicpu(p).oper[1]^.reg }
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TransferUsedRegs(TmpUsedRegs);
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if not RegUsedAfterInstruction(p_SourceReg, p, TmpUsedRegs) and
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GetLastInstruction(p, hp2) and
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(hp2.typ = ait_instruction) and
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{ Have to make sure it's an instruction that only reads from
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the first operands and only writes (not reads or modifies) to
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the last one; in essence, a pure function such as BSR, POPCNT
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or ANDN }
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(
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(
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(taicpu(hp2).ops = 1) and
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(insprop[taicpu(hp2).opcode].Ch * [Ch_Wop1] = [Ch_Wop1])
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) or
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(
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(taicpu(hp2).ops = 2) and
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(insprop[taicpu(hp2).opcode].Ch * [Ch_Rop1, Ch_Wop2] = [Ch_Rop1, Ch_Wop2])
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) or
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(
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(taicpu(hp2).ops = 3) and
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(insprop[taicpu(hp2).opcode].Ch * [Ch_Rop1, Ch_Rop2, Ch_Wop3] = [Ch_Rop1, Ch_Rop2, Ch_Wop3])
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) or
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(
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(taicpu(hp2).ops = 4) and
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(insprop[taicpu(hp2).opcode].Ch * [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4] = [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4])
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)
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) and
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(taicpu(hp2).oper[taicpu(hp2).ops-1]^.typ = top_reg) and
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(taicpu(hp2).oper[taicpu(hp2).ops-1]^.reg = p_SourceReg) then
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begin
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case taicpu(hp2).opcode of
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A_FSTSW, A_FNSTSW,
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A_IN, A_INS, A_OUT, A_OUTS,
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A_CMPS, A_LODS, A_MOVS, A_SCAS, A_STOS:
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{ These routines have explicit operands, but they are restricted in
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what they can be (e.g. IN and OUT can only read from AL, AX or
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EAX. }
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;
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else
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begin
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DebugMsg(SPeepholeOptimization + 'Removed MOV and changed destination on previous instruction to optimise register usage (FuncMov2Func)', p);
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taicpu(hp2).oper[taicpu(hp2).ops-1]^.reg := p_TargetReg;
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if not RegInInstruction(p_TargetReg, hp2) then
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begin
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{ Since we're allocating from an earlier point, we
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need to remove the register from the tracking }
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ExcludeRegFromUsedRegs(p_TargetReg, TmpUsedRegs);
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AllocRegBetween(p_TargetReg, hp2, p, TmpUsedRegs);
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end;
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RemoveCurrentp(p, hp1);
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Result := True;
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Result := True;
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Exit;
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Exit;
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end;
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end;
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end;
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end;
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end;
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end;
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end;
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function TX86AsmOptimizer.OptPass1MOVXX(var p : tai) : boolean;
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function TX86AsmOptimizer.OptPass1MOVXX(var p : tai) : boolean;
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@ -9240,6 +9258,12 @@ unit aoptx86;
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setsubreg(taicpu(hp3).oper[1]^.reg, R_SUBD);
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setsubreg(taicpu(hp3).oper[1]^.reg, R_SUBD);
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{$endif x86_64}
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{$endif x86_64}
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end;
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end;
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if FuncMov2Func(p, hp1) then
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begin
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Result := True;
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Exit;
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end;
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end;
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end;
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