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synced 2025-04-22 08:29:29 +02:00
+ much improved CSE: the CSE now searches further back for sequences it
can reuse. After I've also implemented register renaming, the effect
should be even better (afaik web bug #1088 will then even be optimized
properly). I don't know about the slow down factor this adds. Maybe
a new optimization level should be introduced?
This commit is contained in:
Jonas Maebe
parent
31f57d1429
commit
3df81628bc
@ -34,7 +34,8 @@ Procedure CSE(AsmL: PAasmOutput; First, Last: Pai);
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Implementation
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Uses
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CObjects, verbose, hcodegen, globals,cpubase,cpuasm,DAOpt386, tgeni386;
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{$ifdef replaceregdebug}cutils,{$endif}
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verbose, hcodegen, globals,cpubase,cpuasm,DAOpt386, tgeni386;
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{
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Function PaiInSequence(P: Pai; Const Seq: TContent): Boolean;
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@ -56,14 +57,153 @@ Begin
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End;
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}
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Function CheckSequence(p: Pai; Reg: TRegister; Var Found: Longint; Var RegInfo: TRegInfo): Boolean;
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function modifiesMemLocation(p1: pai): boolean;
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var p: paicpu;
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opCount: byte;
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begin
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modifiesMemLocation := false;
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if p1^.typ <> ait_instruction then
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exit;
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p := paicpu(p1);
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for opCount := 1 to MaxCh do
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case InsProp[p^.opcode].Ch[opCount] of
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Ch_MOp1,CH_WOp1,CH_RWOp1:
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if p^.oper[0].typ = top_ref then
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begin
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modifiesMemLocation := true;
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exit
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end;
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Ch_MOp2,CH_WOp2,CH_RWOp2:
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if p^.oper[1].typ = top_ref then
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begin
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modifiesMemLocation := true;
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exit
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end;
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Ch_MOp3,CH_WOp3,CH_RWOp3:
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if p^.oper[2].typ = top_ref then
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begin
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modifiesMemLocation := true;
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exit
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end;
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Ch_WMemEDI:
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begin
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modifiesMemLocation := true;
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exit;
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end;
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end;
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end;
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function getPrevSequence(reg: tregister; current: pai; var prev: pai; var passedJump: boolean):
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tregister;
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function stillValid(p: pai): boolean;
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begin
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stillValid :=
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(p^.typ = ait_instruction) and
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(paicpu(p)^.opcode <> a_jmp) and
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(ppaiprop(p^.optinfo)^.regs[reg].state =
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ppaiprop(current^.optinfo)^.regs[reg].state) and
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{ in case destroyreg is called with doIncState = false }
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(ppaiprop(p^.optinfo)^.regs[reg].typ =
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ppaiprop(current^.optinfo)^.regs[reg].typ);
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passedJump :=
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(p^.typ = ait_instruction) and
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(paicpu(p)^.is_jmp);
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end;
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function findChangedRegister(p: pai): tregister;
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var
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regCounter: tregister;
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begin
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for regCounter := R_EAX to R_EDI do
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with ppaiprop(p^.optinfo)^.regs[regCounter] do
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if ((startmod <>
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ppaiprop(current^.optinfo)^.regs[regCounter].startmod) or
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(nrOfMods <>
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ppaiprop(current^.optinfo)^.regs[regCounter].nrOfMods)) and
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(not ppaiprop(p^.optinfo)^.canBeRemoved) and
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(ppaiprop(p^.optinfo)^.regs[regCounter].typ in
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[con_ref,con_noRemoveRef]) then
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begin
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findChangedRegister := regCounter;
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exit;
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end;
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findChangedRegister := R_NO;
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end;
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var
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hp, prevFound: pai;
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tmpResult: tregister;
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begin
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getPrevSequence := R_NO;
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{ no memory writes (could be refined further) }
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if modifiesMemLocation(current) or
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not getLastInstruction(current,hp) then
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exit;
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tmpResult := R_NO;
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while (tmpResult = R_NO) and
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stillValid(hp) do
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begin
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{ in case getPreviousInstruction fails and sets hp to nil in the }
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{ next iteration }
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prevFound := hp;
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tmpResult := findChangedRegister(hp);
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if modifiesMemLocation(hp) or
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{ do not load the self pointer or a regvar before a (conditional) }
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{ jump with a new value, since if the jump is taken, the old value }
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{ is (probably) still necessary }
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(passedJump and not(reg in (usableregs+[R_EDI]))) or
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not getLastInstruction(hp,hp) then
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break;
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end;
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getPrevSequence := tmpResult;
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if tmpResult <> R_NO then
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prev := prevFound;
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end;
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{checks whether the current instruction sequence (starting with p) and the
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one between StartMod and EndMod of Reg are the same. If so, the number of
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instructions that match is stored in Found and true is returned, otherwise
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Found holds the number of instructions between StartMod and EndMod and false
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is returned}
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Var hp2, hp3{, EndMod}: Pai;
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PrevNonRemovablePai: Pai;
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Function CheckSequence(p: Pai; var prev: pai; Reg: TRegister; Var Found: Longint;
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Var RegInfo: TRegInfo): Boolean;
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function getNextRegToTest(var orgP: pai; currentReg: tregister): tregister;
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const
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checkingPrevSequences: boolean = false;
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passedJump: boolean = false;
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begin
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if currentReg = R_NO then
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checkingPrevSequences := false;
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if not checkingPrevSequences then
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begin
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Repeat
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Inc(currentReg);
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Until (currentReg > R_EDI) or
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(ppaiprop(orgP^.optInfo)^.regs[currentReg].typ
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in [con_ref,con_noRemoveRef]);
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if currentReg > R_EDI then
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begin
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if not modifiesMemLocation(orgP) and
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(ppaiprop(orgP^.optinfo)^.regs[reg].rstate =
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ppaiprop(p^.optinfo)^.regs[reg].rstate) then
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begin
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checkingPrevSequences := true;
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passedJump := false;
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end
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else
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getNextRegToTest := R_NO;
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end
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else getNextRegToTest := currentReg;
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end;
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if checkingPrevSequences then
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getNextRegToTest := getPrevSequence(reg,orgP,orgP, passedJump);
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end;
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Var hp2, hp3{, EndMod},highPrev, orgPrev: Pai;
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{Cnt,} OldNrOfMods: Longint;
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startRegInfo, OrgRegInfo, HighRegInfo: TRegInfo;
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HighFound, OrgRegFound: Byte;
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@ -86,19 +226,16 @@ Begin {CheckSequence}
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new2OldReg[stack_pointer] := stack_pointer;
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oldRegsEncountered := newRegsEncountered;
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end;
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RegCounter := R_EAX;
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GetLastInstruction(p, PrevNonRemovablePai);
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While (RegCounter <= R_EDI) And
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not(ppaiprop(prevNonRemovablePai^.optInfo)^.regs[regCounter].typ in
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[con_ref,con_noRemoveRef]) do
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Inc(RegCounter);
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While (RegCounter <= R_EDI) Do
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GetLastInstruction(p, prev);
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regCounter := getNextRegToTest(prev,R_NO);
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While (RegCounter <> R_NO) Do
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Begin
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regInfo := startRegInfo;
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Found := 0;
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hp2 := PPaiProp(PrevNonRemovablePai^.OptInfo)^.Regs[RegCounter].StartMod;
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If (PrevNonRemovablePai <> PPaiProp(PrevNonRemovablePai^.OptInfo)^.Regs[RegCounter].StartMod)
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Then OldNrOfMods := PPaiProp(PrevNonRemovablePai^.OptInfo)^.Regs[RegCounter].NrOfMods
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hp2 := PPaiProp(prev^.OptInfo)^.Regs[RegCounter].StartMod;
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If (prev <> PPaiProp(prev^.OptInfo)^.Regs[RegCounter].StartMod)
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Then OldNrOfMods := PPaiProp(prev^.OptInfo)^.Regs[RegCounter].NrOfMods
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Else OldNrOfMods := 1;
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hp3 := p;
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While (Found <> OldNrOfMods) And
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@ -111,7 +248,9 @@ Begin {CheckSequence}
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(paicpu(hp3)^.opcode = A_MOVSX)) and
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(paicpu(hp3)^.oper[0].typ in
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[top_const,top_ref,top_symbol]) and
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(paicpu(hp3)^.oper[1].typ = top_reg) then
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(paicpu(hp3)^.oper[1].typ = top_reg) and
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not(regInRef(reg32(paicpu(hp3)^.oper[1].reg),
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paicpu(hp3)^.oper[0].ref^)) then
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regInfo.lastReload
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[reg32(paicpu(hp3)^.oper[1].reg)] := hp3;
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GetNextInstruction(hp2, hp2);
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@ -120,9 +259,9 @@ Begin {CheckSequence}
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End;
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for regCounter2 := R_EAX to R_EDX do
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if (regInfo.new2OldReg[regCounter2] <> R_NO) and
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(reg in PPaiProp(hp3^.optInfo)^.usedRegs) and
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not regLoadedWithNewValue(reg,false,hp3) then
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include(regInfo.regsStillUsedAfterSeq,regCounter);
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(regCounter2 in PPaiProp(hp3^.optInfo)^.usedRegs) and
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not regLoadedWithNewValue(regCounter2,false,hp3) then
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include(regInfo.regsStillUsedAfterSeq,regCounter2);
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If (Found <> OldNrOfMods) or
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{ the following is to avoid problems with rangecheck code (see testcse2) }
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(assigned(hp3) and
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@ -147,23 +286,18 @@ Begin {CheckSequence}
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(Found > HighFound)
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Then
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Begin
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highPrev := prev;
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HighFound := Found;
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HighRegInfo := RegInfo;
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End;
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If (RegCounter = Reg) Then
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Begin
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orgPrev := prev;
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OrgRegFound := Found;
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OrgRegResult := TmpResult;
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OrgRegInfo := RegInfo
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End;
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Repeat
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Inc(RegCounter);
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Until (RegCounter > R_EDI) or
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((ppaiprop(prevNonRemovablePai^.optInfo)^.regs[regCounter].typ
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in [con_ref,con_noRemoveRef]) {And
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((Regcounter = Reg) Or
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Not(PaiInSequence(p, PPaiProp(PrevNonRemovablePai^.OptInfo)^.Regs[RegCounter]))) }
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);
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regCounter := getNextRegToTest(prev,regCounter);
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End;
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If (HighFound > 0) And
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(Not(OrgRegResult) Or
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@ -175,6 +309,7 @@ Begin {CheckSequence}
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{$else fpc}
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CheckSequence := True;
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{$endif fpc}
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prev := highPrev;
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RegInfo := HighRegInfo;
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Found := HighFound
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End
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@ -185,6 +320,7 @@ Begin {CheckSequence}
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{$else fpc}
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CheckSequence := OrgRegResult;
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{$endif fpc}
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prev := orgPrev;
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Found := OrgRegFound;
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RegInfo := OrgRegInfo;
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End;
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@ -361,12 +497,14 @@ Procedure RestoreRegContentsTo(reg: TRegister; const c: TContent; p, endP: pai);
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var
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{$ifdef replaceregdebug}
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hp: pai;
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l: longint;
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{$endif replaceregdebug}
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tmpState: byte;
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begin
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{$ifdef replaceregdebug}
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l := random(1000);
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hp := new(pai_asm_comment,init(strpnew(
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'restored '+att_reg2str[reg]+' with data from here...')));
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'restored '+att_reg2str[reg]+' with data from here... '+tostr(l))));
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hp^.next := p;
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hp^.previous := p^.previous;
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p^.previous := hp;
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@ -388,7 +526,7 @@ begin
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if assigned(p) then
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begin
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hp := new(pai_asm_comment,init(strpnew(
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'restored '+att_reg2str[reg]+' till here...')));
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'restored '+att_reg2str[reg]+' till here... '+tostr(l))));
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hp^.next := p;
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hp^.previous := p^.previous;
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p^.previous := hp;
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@ -398,6 +536,7 @@ begin
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{$endif replaceregdebug}
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end;
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function FindRegDealloc(reg: tregister; p: pai): boolean;
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{ assumes reg is a 32bit register }
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var
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@ -438,25 +577,36 @@ Procedure ClearRegContentsFrom(reg: TRegister; p, endP: pai);
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var
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{$ifdef replaceregdebug}
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hp: pai;
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l: longint;
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{$endif replaceregdebug}
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tmpState: byte;
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oldStartmod: pai;
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begin
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{$ifdef replaceregdebug}
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l := random(1000);
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hp := new(pai_asm_comment,init(strpnew(
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'cleared '+att_reg2str[reg]+' from here... '+tostr(l))));
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hp^.next := p;
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hp^.previous := p^.previous;
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p^.previous := hp;
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if assigned(hp^.previous) then
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hp^.previous^.next := hp;
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{$endif replaceregdebug}
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PPaiProp(p^.optInfo)^.Regs[reg].typ := con_unknown;
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While (p <> endP) Do
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Begin
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PPaiProp(p^.optInfo)^.Regs[reg].typ := con_unknown;
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getNextInstruction(p,p);
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end;
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tmpState := PPaiProp(p^.optInfo)^.Regs[reg].wState;
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oldStartmod := PPaiProp(p^.optInfo)^.Regs[reg].startmod;
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repeat
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PPaiProp(p^.optInfo)^.Regs[reg].typ := con_unknown;
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until not getNextInstruction(p,p) or
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(PPaiProp(p^.optInfo)^.Regs[reg].wState <> tmpState);
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(PPaiProp(p^.optInfo)^.Regs[reg].startmod <> oldStartmod);
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{$ifdef replaceregdebug}
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if assigned(p) then
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begin
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hp := new(pai_asm_comment,init(strpnew(
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'cleared '+att_reg2str[reg]+' till here...')));
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'cleared '+att_reg2str[reg]+' till here... '+tostr(l))));
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hp^.next := p;
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hp^.previous := p^.previous;
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p^.previous := hp;
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@ -488,33 +638,69 @@ begin
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end;
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end;
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Procedure ChangeReg(var Reg: TRegister; orgReg, newReg: TRegister);
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function ChangeReg(var Reg: TRegister; orgReg, newReg: TRegister): boolean;
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begin
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changeReg := true;
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if reg = newReg then
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reg := orgReg
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else if reg = regtoreg8(newReg) then
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reg := regtoreg8(orgReg)
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else if reg = regtoreg16(newReg) then
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reg := regtoreg16(orgReg);
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reg := regtoreg16(orgReg)
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else changeReg := false;
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end;
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procedure changeOp(var o: toper; orgReg, newReg: tregister);
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function changeOp(var o: toper; orgReg, newReg: tregister): boolean;
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begin
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case o.typ of
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top_reg: changeReg(o.reg,orgReg,newReg);
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top_reg: changeOp := changeReg(o.reg,orgReg,newReg);
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top_ref:
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begin
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changeReg(o.ref^.base,orgReg,newReg);
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changeReg(o.ref^.index,orgReg,newReg);
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changeOp :=
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changeReg(o.ref^.base,orgReg,newReg) or
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changeReg(o.ref^.index,orgReg,newReg);
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end;
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end;
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end;
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Procedure DoReplaceReg(orgReg,newReg: tregister; hp: paicpu);
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var opCount: byte;
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procedure updateStates(orgReg,newReg: tregister; hp: pai; writeStateToo: boolean);
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var
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prev: pai;
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newOrgRegRState, newOrgRegWState: byte;
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begin
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if getLastInstruction(hp,prev) then
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with ppaiprop(prev^.optinfo)^ do
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begin
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newOrgRegRState := regs[orgReg].rState +
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ppaiprop(hp^.optinfo)^.regs[newReg].rState - regs[newReg].rstate;
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if writeStateToo then
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newOrgRegWState := regs[orgReg].wState +
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ppaiprop(hp^.optinfo)^.regs[newReg].wState - regs[newReg].wstate;
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end
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else
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with ppaiprop(hp^.optinfo)^.regs[newReg] do
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begin
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newOrgRegRState := rState;
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if writeStateToo then
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newOrgRegWState := wState;
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end;
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with ppaiprop(hp^.optinfo)^.regs[orgReg] do
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begin
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rState := newOrgRegRState;
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if writeStateToo then
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wState := newOrgRegwState;
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end;
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end;
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function doReplaceReg(orgReg,newReg: tregister; hp: paicpu): boolean;
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var
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opCount: byte;
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tmpResult: boolean;
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begin
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for opCount := 0 to 2 do
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changeOp(hp^.oper[opCount],orgReg,newReg)
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tmpResult :=
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changeOp(hp^.oper[opCount],orgReg,newReg) or tmpResult;
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doReplaceReg := tmpResult;
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end;
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function RegSizesOK(oldReg,newReg: TRegister; p: paicpu): boolean;
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@ -535,9 +721,10 @@ begin
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end;
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end;
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procedure DoReplaceReadReg(orgReg,newReg: tregister; p: paicpu);
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function doReplaceReadReg(orgReg,newReg: tregister; p: paicpu): boolean;
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var opCount: byte;
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begin
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doReplaceReadReg := false;
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{ handle special case }
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case p^.opcode of
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A_IMUL:
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@ -546,9 +733,17 @@ begin
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1: internalerror(1301001);
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2,3:
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begin
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changeOp(p^.oper[0],orgReg,newReg);
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if p^.ops = 3 then
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changeOp(p^.oper[1],orgReg,newReg);
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if changeOp(p^.oper[0],orgReg,newReg) then
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begin
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{ updateStates(orgReg,newReg,p,false);}
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doReplaceReadReg := true;
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end;
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if p^.ops = 3 then
|
||||
if changeOp(p^.oper[1],orgReg,newReg) then
|
||||
begin
|
||||
{ updateStates(orgReg,newReg,p,false);}
|
||||
doReplaceReadReg := true;
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
@ -557,23 +752,115 @@ begin
|
||||
begin
|
||||
for opCount := 0 to 2 do
|
||||
if p^.oper[opCount].typ = top_ref then
|
||||
changeOp(p^.oper[opCount],orgReg,newReg);
|
||||
if changeOp(p^.oper[opCount],orgReg,newReg) then
|
||||
begin
|
||||
{ updateStates(orgReg,newReg,p,false);}
|
||||
doReplaceReadReg := true;
|
||||
end;
|
||||
for opCount := 1 to MaxCh do
|
||||
case InsProp[p^.opcode].Ch[opCount] of
|
||||
Ch_ROp1:
|
||||
if p^.oper[0].typ = top_reg then
|
||||
ChangeReg(p^.oper[0].reg,orgReg,newReg);
|
||||
if changeReg(p^.oper[0].reg,orgReg,newReg) then
|
||||
begin
|
||||
{ updateStates(orgReg,newReg,p,false);}
|
||||
doReplaceReadReg := true;
|
||||
end;
|
||||
Ch_ROp2:
|
||||
if p^.oper[1].typ = top_reg then
|
||||
ChangeReg(p^.oper[1].reg,orgReg,newReg);
|
||||
if changeReg(p^.oper[1].reg,orgReg,newReg) then
|
||||
begin
|
||||
{ updateStates(orgReg,newReg,p,false);}
|
||||
doReplaceReadReg := true;
|
||||
end;
|
||||
Ch_ROp3:
|
||||
if p^.oper[2].typ = top_reg then
|
||||
ChangeReg(p^.oper[2].reg,orgReg,newReg);
|
||||
if changeReg(p^.oper[2].reg,orgReg,newReg) then
|
||||
begin
|
||||
{ updateStates(orgReg,newReg,p,false);}
|
||||
doReplaceReadReg := true;
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
|
||||
|
||||
procedure updateState(reg: tregister; p: pai);
|
||||
{ this procedure updates the read and write states of the instructions }
|
||||
{ coming after p. It's called when the read/write state of p has been }
|
||||
{ changed and this change has to be propagated to the following }
|
||||
{ instructions as well }
|
||||
var
|
||||
newRState, newWState: byte;
|
||||
prevRState, prevWState: byte;
|
||||
doRState, doWState: boolean;
|
||||
begin
|
||||
{ get the new read/write states from p }
|
||||
with ppaiprop(p^.optinfo)^.regs[reg] do
|
||||
begin
|
||||
newRState := rState;
|
||||
newWState := wState;
|
||||
end;
|
||||
if not GetNextInstruction(p,p) then
|
||||
exit;
|
||||
{ get the old read/write states from the next instruction, to know }
|
||||
{ when we can stop updating }
|
||||
with ppaiprop(p^.optinfo)^.regs[reg] do
|
||||
begin
|
||||
prevRState := rState;
|
||||
prevWState := wState;
|
||||
end;
|
||||
{ adjust the states if this next instruction reads/writes the register }
|
||||
if regReadByInstruction(reg,p) then
|
||||
incState(newRState,1);
|
||||
if regModifiedByInstruction(reg,p) then
|
||||
incState(newWState,1);
|
||||
{ do we still have to update the read and/or write states? }
|
||||
doRState := true;
|
||||
doWState := true;
|
||||
repeat
|
||||
{ update the states }
|
||||
with ppaiprop(p^.optinfo)^.regs[reg] do
|
||||
begin
|
||||
if doRState then
|
||||
rState := newRState;
|
||||
if doWState then
|
||||
wState := newWState;
|
||||
end;
|
||||
if not getNextInstruction(p,p) then
|
||||
break;
|
||||
with ppaiprop(p^.optinfo)^.regs[reg] do
|
||||
begin
|
||||
{ stop updating the read state if it changes }
|
||||
doRState :=
|
||||
doRState and (rState = prevRState);
|
||||
{ if, by accident, this changed state is the same as the one }
|
||||
{ we've been using, change it to a value that's definitely }
|
||||
{ different from the previous and next state }
|
||||
if not doRState and
|
||||
(rState = newRState) then
|
||||
begin
|
||||
incState(newRState,1);
|
||||
prevRState := rState;
|
||||
doRState := true;
|
||||
end;
|
||||
{ ditto for the write state }
|
||||
doWState :=
|
||||
doWState and (WState = prevWState);
|
||||
if not doWState and
|
||||
(wState = newWState) then
|
||||
begin
|
||||
incState(newWState,1);
|
||||
prevWState := wState;
|
||||
doWState := true;
|
||||
end;
|
||||
end;
|
||||
{ stop when we don't have to update either state anymore }
|
||||
until not(doRState or doWState);
|
||||
end;
|
||||
|
||||
|
||||
function ReplaceReg(asmL: PaasmOutput; orgReg, newReg: TRegister; p: pai;
|
||||
const c: TContent; orgRegCanBeModified: Boolean;
|
||||
var returnEndP: pai): Boolean;
|
||||
@ -585,7 +872,8 @@ function ReplaceReg(asmL: PaasmOutput; orgReg, newReg: TRegister; p: pai;
|
||||
{ if the function returns true, returnEndP holds the last instruction }
|
||||
{ where newReg was replaced by orgReg }
|
||||
var endP, hp: Pai;
|
||||
removeLast, sequenceEnd, tmpResult, newRegModified, orgRegRead: Boolean;
|
||||
removeLast, sequenceEnd, tmpResult, newRegModified, orgRegRead,
|
||||
stateChanged, readStateChanged: Boolean;
|
||||
|
||||
function storeBack(p1: pai): boolean;
|
||||
{ returns true if p1 contains an instruction that stores the contents }
|
||||
@ -664,6 +952,8 @@ begin
|
||||
not(newRegModified and orgRegRead)) (* and
|
||||
{ since newReg will be replaced by orgReg, we can't allow that newReg }
|
||||
{ gets modified if orgRegCanBeModified = false }
|
||||
|
||||
{ this now gets checked after the loop (JM) }
|
||||
(orgRegCanBeModified or not(newRegModified)) *);
|
||||
tmpResult :=
|
||||
not(removeLast) and
|
||||
@ -709,16 +999,28 @@ begin
|
||||
{$endif replaceregdebug}
|
||||
replaceReg := true;
|
||||
returnEndP := endP;
|
||||
|
||||
getNextInstruction(p,hp);
|
||||
stateChanged := false;
|
||||
while hp <> endP do
|
||||
begin
|
||||
if not(PPaiProp(hp^.optInfo)^.canBeRemoved) and
|
||||
if {not(PPaiProp(hp^.optInfo)^.canBeRemoved) and }
|
||||
(hp^.typ = ait_instruction) then
|
||||
DoReplaceReg(orgReg,newReg,paicpu(hp));
|
||||
GetNextInstruction(hp,hp)
|
||||
stateChanged :=
|
||||
doReplaceReg(orgReg,newReg,paicpu(hp)) or stateChanged;
|
||||
if stateChanged then
|
||||
updateStates(orgReg,newReg,hp,true);
|
||||
getNextInstruction(hp,hp)
|
||||
end;
|
||||
if assigned(endp) and (endp^.typ = ait_instruction) then
|
||||
DoReplaceReadReg(orgReg,newReg,paicpu(endP));
|
||||
readStateChanged :=
|
||||
DoReplaceReadReg(orgReg,newReg,paicpu(endP));
|
||||
if stateChanged or readStateChanged then
|
||||
updateStates(orgReg,newReg,endP,stateChanged);
|
||||
|
||||
if stateChanged or readStateChanged then
|
||||
updateState(orgReg,endP);
|
||||
|
||||
{ the replacing stops either at the moment that }
|
||||
{ a) the newreg gets loaded with a new value (one not depending on the }
|
||||
{ current value of newreg) }
|
||||
@ -733,7 +1035,8 @@ begin
|
||||
if removeLast or
|
||||
(p <> endp) or
|
||||
not RegLoadedWithNewValue(newReg,true,endP) then
|
||||
RestoreRegContentsTo(newReg, c ,p, hp);
|
||||
RestoreRegContentsTo(newReg,c,p,hp);
|
||||
|
||||
{ In both case a and b, it is possible that the new register was modified }
|
||||
{ (e.g. an add/sub), so if it was replaced by oldreg in that instruction, }
|
||||
{ oldreg's contents have been changed. To take this into account, we simply }
|
||||
@ -743,6 +1046,7 @@ begin
|
||||
if removeLast then
|
||||
ppaiprop(endP^.optinfo)^.canBeRemoved := true;
|
||||
allocRegBetween(asml,orgReg,p,endP);
|
||||
|
||||
end
|
||||
{$ifdef replaceregdebug}
|
||||
else
|
||||
@ -834,7 +1138,7 @@ Procedure DoCSE(AsmL: PAasmOutput; First, Last: Pai);
|
||||
removed immediately because sometimes an instruction needs to be checked in
|
||||
two different sequences}
|
||||
var cnt, cnt2, cnt3: longint;
|
||||
p, hp1, hp2: Pai;
|
||||
p, hp1, hp2, prevSeq, prevSeq_next: Pai;
|
||||
hp3, hp4: pai;
|
||||
hp5 : pai;
|
||||
RegInfo: TRegInfo;
|
||||
@ -875,7 +1179,7 @@ Begin
|
||||
'cse checking '+att_reg2str[Reg32(Paicpu(p)^.oper[1].reg)])));
|
||||
insertLLItem(asml,p,p^.next,hp5);
|
||||
{$endif csdebug}
|
||||
If CheckSequence(p, Paicpu(p)^.oper[1].reg, Cnt, RegInfo) And
|
||||
If CheckSequence(p,prevSeq,Paicpu(p)^.oper[1].reg, Cnt, RegInfo) And
|
||||
(Cnt > 0) Then
|
||||
Begin
|
||||
hp1 := nil;
|
||||
@ -924,7 +1228,8 @@ Begin
|
||||
PPaiProp(hp5^.OptInfo)^.CanBeRemoved := True;
|
||||
getNextInstruction(hp5,hp5);
|
||||
end;
|
||||
{$endif noremove} end
|
||||
end
|
||||
{$endif noremove}
|
||||
end
|
||||
end
|
||||
{$ifndef noremove}
|
||||
@ -934,10 +1239,10 @@ Begin
|
||||
; Inc(Cnt2);
|
||||
GetNextInstruction(p, p);
|
||||
End;
|
||||
hp3 := New(Pai_Marker,Init(NoPropInfoStart));
|
||||
InsertLLItem(AsmL, Pai(hp2^.Previous), hp2, hp3);
|
||||
{hp4 is used to get the contents of the registers before the sequence}
|
||||
GetLastInstruction(hp2, hp4);
|
||||
|
||||
getNextInstruction(prevSeq,prevSeq_next);
|
||||
{$IfDef CSDebug}
|
||||
For RegCounter := R_EAX To R_EDI Do
|
||||
If (RegCounter in RegInfo.RegsLoadedForRef) Then
|
||||
@ -954,21 +1259,44 @@ Begin
|
||||
(RegInfo.New2OldReg[RegCounter] <> R_NO) Then
|
||||
Begin
|
||||
AllocRegBetween(AsmL,RegInfo.New2OldReg[RegCounter],
|
||||
PPaiProp(hp4^.OptInfo)^.Regs[RegInfo.New2OldReg[RegCounter]].StartMod,hp2);
|
||||
PPaiProp(prevSeq^.OptInfo)^.Regs[RegInfo.New2OldReg[RegCounter]].StartMod,prevSeq_next);
|
||||
if hp4 <> prevSeq then
|
||||
begin
|
||||
if assigned(reginfo.lastReload[regCounter]) then
|
||||
getLastInstruction(reginfo.lastReload[regCounter],hp3)
|
||||
else hp3 := hp4;
|
||||
if prevSeq <> hp3 then
|
||||
clearRegContentsFrom(regCounter,prevSeq_next,
|
||||
hp3);
|
||||
allocRegBetween(asmL,regCounter,prevSeq,hp3);
|
||||
end;
|
||||
If Not(RegCounter In RegInfo.RegsLoadedForRef) And
|
||||
{old reg new reg}
|
||||
(RegInfo.New2OldReg[RegCounter] <> RegCounter) Then
|
||||
Begin
|
||||
getLastInstruction(p,hp3);
|
||||
If not(regCounter in usableRegs + [R_EDI,R_ESI]) or
|
||||
If (hp4 <> prevSeq) or
|
||||
not(regCounter in usableRegs + [R_EDI,R_ESI]) or
|
||||
not ReplaceReg(asmL,RegInfo.New2OldReg[RegCounter],
|
||||
regCounter,hp3,
|
||||
PPaiProp(hp4^.optInfo)^.Regs[regCounter],true,hp5) then
|
||||
PPaiProp(PrevSeq^.optInfo)^.Regs[regCounter],true,hp5) then
|
||||
begin
|
||||
hp3 := New(Pai_Marker,Init(NoPropInfoEnd));
|
||||
InsertLLItem(AsmL, prevSeq, Pai(prevSeq^.next), hp3);
|
||||
hp3 := New(Paicpu,Op_Reg_Reg(A_MOV, S_L,
|
||||
{old reg new reg}
|
||||
RegInfo.New2OldReg[RegCounter], RegCounter));
|
||||
InsertLLItem(AsmL, Pai(hp2^.previous), hp2, hp3);
|
||||
InsertLLItem(AsmL, prevSeq, Pai(prevSeq^.next), hp3);
|
||||
hp3 := New(Pai_Marker,Init(NoPropInfoStart));
|
||||
InsertLLItem(AsmL, prevSeq, Pai(prevSeq^.next), hp3);
|
||||
{ adjusts states in previous instruction so that it will }
|
||||
{ definitely be different from the previous or next state }
|
||||
incstate(ppaiprop(prevSeq_next^.optinfo)^.
|
||||
regs[RegInfo.New2OldReg[RegCounter]].rstate,20);
|
||||
incstate(ppaiprop(prevSeq_next^.optinfo)^.
|
||||
regs[regCounter].wstate,20);
|
||||
updateState(RegInfo.New2OldReg[RegCounter],
|
||||
prevSeq_next);
|
||||
end
|
||||
End
|
||||
Else
|
||||
@ -1002,8 +1330,6 @@ Begin
|
||||
hp2,hp3);
|
||||
End;
|
||||
End;
|
||||
hp3 := New(Pai_Marker,Init(NoPropInfoEnd));
|
||||
InsertLLItem(AsmL, Pai(hp2^.Previous), hp2, hp3);
|
||||
If hp1 <> nil Then
|
||||
p := hp1;
|
||||
Continue;
|
||||
@ -1167,7 +1493,14 @@ End.
|
||||
|
||||
{
|
||||
$Log$
|
||||
Revision 1.7 2000-08-25 19:40:45 jonas
|
||||
Revision 1.8 2000-09-20 15:00:58 jonas
|
||||
+ much improved CSE: the CSE now searches further back for sequences it
|
||||
can reuse. After I've also implemented register renaming, the effect
|
||||
should be even better (afaik web bug 1088 will then even be optimized
|
||||
properly). I don't know about the slow down factor this adds. Maybe
|
||||
a new optimization level should be introduced?
|
||||
|
||||
Revision 1.7 2000/08/25 19:40:45 jonas
|
||||
* refined previous fix a bit, some instructions weren't being removed
|
||||
while they could (merged from fixes branch)
|
||||
* made checksequence a bit faster
|
||||
|
||||
@ -89,6 +89,8 @@ Procedure ShutDownDFA;
|
||||
|
||||
Function FindLabel(L: PasmLabel; Var hp: Pai): Boolean;
|
||||
|
||||
Procedure IncState(Var S: Byte; amount: longint);
|
||||
|
||||
{******************************* Constants *******************************}
|
||||
|
||||
Const
|
||||
@ -116,14 +118,17 @@ type
|
||||
{start and end of block instructions that defines the
|
||||
content of this register.}
|
||||
StartMod: pai;
|
||||
{starts at 0, gets increased everytime the register is written to}
|
||||
WState: Byte;
|
||||
{starts at 0, gets increased everytime the register is read from}
|
||||
RState: Byte;
|
||||
{how many instructions starting with StarMod does the block consist of}
|
||||
NrOfMods: Byte;
|
||||
{the type of the content of the register: unknown, memory, constant}
|
||||
Typ: Byte;
|
||||
case byte of
|
||||
{starts at 0, gets increased everytime the register is written to}
|
||||
1: (WState: Byte;
|
||||
{starts at 0, gets increased everytime the register is read from}
|
||||
RState: Byte);
|
||||
{ to compare both states in one operation }
|
||||
2: (state: word);
|
||||
End;
|
||||
|
||||
{Contents of the integer registers}
|
||||
@ -1177,13 +1182,13 @@ Begin
|
||||
End;
|
||||
|
||||
|
||||
Procedure IncState(Var S: Byte);
|
||||
Procedure IncState(Var S: Byte; amount: longint);
|
||||
{Increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
|
||||
errors}
|
||||
Begin
|
||||
If (s <> $ff)
|
||||
Then Inc(s)
|
||||
Else s := 0
|
||||
if (s <= $ff - amount) then
|
||||
inc(s, amount)
|
||||
else s := longint(s) + amount - $ff;
|
||||
End;
|
||||
|
||||
Function sequenceDependsonReg(Const Content: TContent; seqReg, Reg: TRegister): Boolean;
|
||||
@ -1241,7 +1246,7 @@ begin
|
||||
with p1^.regs[counter] Do
|
||||
if (typ in [con_ref,con_noRemoveRef]) and
|
||||
sequenceDependsOnReg(p1^.Regs[counter],counter,reg) then
|
||||
if typ = con_ref then
|
||||
if typ in [con_ref,con_invalid] then
|
||||
typ := con_invalid
|
||||
{ con_invalid and con_noRemoveRef = con_unknown }
|
||||
else typ := con_unknown;
|
||||
@ -1269,7 +1274,7 @@ Begin
|
||||
begin
|
||||
if doIncState then
|
||||
begin
|
||||
incState(WState);
|
||||
incState(wstate,1);
|
||||
typ := con_unknown;
|
||||
end
|
||||
else
|
||||
@ -1488,7 +1493,7 @@ Procedure ReadReg(p: PPaiProp; Reg: TRegister);
|
||||
Begin
|
||||
Reg := Reg32(Reg);
|
||||
If Reg in [R_EAX..R_EDI] Then
|
||||
IncState(p^.Regs[Reg].RState)
|
||||
incState(p^.regs[Reg].rstate,1)
|
||||
End;
|
||||
|
||||
|
||||
@ -1572,14 +1577,14 @@ Begin
|
||||
If (Ref.base = procinfo^.FramePointer) or
|
||||
Assigned(Ref.Symbol) Then
|
||||
Begin
|
||||
If (Ref.Index = R_NO) And
|
||||
(Not(Assigned(Ref.Symbol)) or
|
||||
(Ref.base = R_NO)) Then
|
||||
{ local variable which is not an array }
|
||||
RefsEq := {$ifdef fpc}@{$endif}RefsEqual
|
||||
If (ref.index <> R_NO) or
|
||||
(assigned(ref.symbol) and
|
||||
(ref.base <> R_NO)) then
|
||||
{ local/global variable or parameter which is an array }
|
||||
RefsEq := {$ifdef fpc}@{$endif}ArrayRefsEq
|
||||
Else
|
||||
{ local variable which is an array }
|
||||
RefsEq := {$ifdef fpc}@{$endif}ArrayRefsEq;
|
||||
{ local/global variable or parameter which is not an array }
|
||||
RefsEq := {$ifdef fpc}@{$endif}RefsEqual;
|
||||
|
||||
{write something to a parameter, a local or global variable, so
|
||||
* with uncertain optimizations on:
|
||||
@ -1696,7 +1701,7 @@ Begin
|
||||
if (typ in [con_ref,con_noRemoveRef])
|
||||
Then
|
||||
Begin
|
||||
IncState(WState);
|
||||
incState(wstate,1);
|
||||
{also store how many instructions are part of the sequence in the first
|
||||
instructions PPaiProp, so it can be easily accessed from within
|
||||
CheckSequence}
|
||||
@ -2031,7 +2036,7 @@ Begin
|
||||
Begin
|
||||
With CurProp^.Regs[TmpReg] Do
|
||||
Begin
|
||||
IncState(WState);
|
||||
incState(wstate,1);
|
||||
{also store how many instructions are part of the sequence in the first
|
||||
instructions PPaiProp, so it can be easily accessed from within
|
||||
CheckSequence}
|
||||
@ -2333,7 +2338,14 @@ End.
|
||||
|
||||
{
|
||||
$Log$
|
||||
Revision 1.8 2000-08-25 19:39:18 jonas
|
||||
Revision 1.9 2000-09-20 15:00:58 jonas
|
||||
+ much improved CSE: the CSE now searches further back for sequences it
|
||||
can reuse. After I've also implemented register renaming, the effect
|
||||
should be even better (afaik web bug 1088 will then even be optimized
|
||||
properly). I don't know about the slow down factor this adds. Maybe
|
||||
a new optimization level should be introduced?
|
||||
|
||||
Revision 1.8 2000/08/25 19:39:18 jonas
|
||||
* bugfix to FindRegAlloc function (caused wrong regalloc info in
|
||||
some cases) (merged from fixes branch)
|
||||
|
||||
|
||||
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Reference in New Issue
Block a user