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* MIPS peephole: refactored/simplified and added (another) couple of optimizations.
git-svn-id: trunk@28591 -
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sergei
parent
ac64c4600f
commit
3ede5ec99b
@ -40,6 +40,7 @@ unit aoptcpu;
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function RegUsedAfterInstruction(reg: Tregister; p: tai;
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var AllUsedRegs: TAllUsedRegs): Boolean;
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function TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
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function TryRemoveMovToRefIndex(var p: tai; next: taicpu): boolean;
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function TryRemoveMovBeforeStore(var p: tai; next: taicpu; const storeops: TAsmOpSet): boolean;
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function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
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procedure PeepHoleOptPass2; override;
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@ -301,6 +302,22 @@ unit aoptcpu;
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end;
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function TCpuAsmOptimizer.TryRemoveMovToRefIndex(var p: tai; next: taicpu): boolean;
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begin
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result:=(next.oper[1]^.typ=top_ref) and
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(next.oper[1]^.ref^.base=taicpu(p).oper[0]^.reg) and
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(not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
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Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next)));
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if result then
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begin
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next.oper[1]^.ref^.base:=taicpu(p).oper[1]^.reg;
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asml.remove(p);
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p.free;
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p:=next;
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end;
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end;
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function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
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var
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next,next2: tai;
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@ -311,6 +328,26 @@ unit aoptcpu;
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ait_instruction:
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begin
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case taicpu(p).opcode of
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A_SEH:
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begin
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if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
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MatchInstruction(next,A_SH) and
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MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) and
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(not RegUsedBetween(taicpu(p).oper[1]^.reg,p,next)) and
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Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
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begin
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taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
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asml.remove(p);
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p.free;
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p:=next;
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end
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else
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TryRemoveMov(p,A_MOVE);
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end;
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A_SEB:
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{ TODO: can be handled similar to A_SEH, but it's almost never encountered }
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TryRemoveMov(p,A_MOVE);
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A_SLL:
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begin
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{ if this is a sign extension... }
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@ -329,10 +366,7 @@ unit aoptcpu;
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{ the initial register may not be reused }
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(not RegUsedBetween(taicpu(p).oper[1]^.reg,next,next2)) then
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begin
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CopyUsedRegs(TmpUsedRegs);
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UpdateUsedRegs(TmpUsedRegs, tai(p.next));
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UpdateUsedRegs(TmpUsedRegs, tai(next.next));
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if not RegUsedAfterInstruction(taicpu(p).oper[0]^.reg,next2,TmpUsedRegs) then
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if Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next2.next))) then
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begin
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taicpu(next2).loadreg(0,taicpu(p).oper[1]^.reg);
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asml.remove(p);
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@ -341,7 +375,6 @@ unit aoptcpu;
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next.free;
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p:=next2;
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end;
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ReleaseUsedRegs(TmpUsedRegs);
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end
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else
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TryRemoveMov(p,A_MOVE);
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@ -349,6 +382,7 @@ unit aoptcpu;
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A_SRL:
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begin
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{ TODO: also kill sign-extensions that follow, both SLL+SRA and SEB/SEH versions }
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{ Remove 'andi' in sequences
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srl Rx,Ry,16
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andi Rx,Rx,65535
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@ -448,16 +482,18 @@ unit aoptcpu;
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A_MOVE:
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begin
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if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
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(next.typ=ait_instruction) then
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(next.typ=ait_instruction) and
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(not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) then
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begin
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{ MOVE Rx,Ry; store Rx,(ref); dealloc Rx ==> store Ry,(ref) }
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if TryRemoveMovBeforeStore(p,taicpu(next),[A_SB,A_SH,A_SW]) then
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{ optimization successful }
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else if TryRemoveMovToRefIndex(p,taicpu(next)) then
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{ successful as well }
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{ MOVE Rx,Ry; opcode Rx,Rx,any ==> opcode Rx,Ry,any
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MOVE Rx,Ry; opcode Rx,Rz,Rx ==> opcode Rx,Rz,Ry }
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else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU]) and
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MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) and
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(not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) then
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MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
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begin
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if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
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begin
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@ -478,18 +514,25 @@ unit aoptcpu;
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end
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{ MOVE Rx,Ry; opcode Rz,Rx,any; dealloc Rx ==> opcode Rz,Ry,any }
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else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU,A_SLT,A_SLTU]) and
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MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) and
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(not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
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Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
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begin
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taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
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asml.remove(p);
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p.free;
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p:=next;
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if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
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begin
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taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
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asml.remove(p);
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p.free;
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p:=next;
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end
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else if MatchOperand(taicpu(next).oper[2]^,taicpu(p).oper[0]^.reg) then
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begin
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taicpu(next).loadreg(2,taicpu(p).oper[1]^.reg);
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asml.remove(p);
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p.free;
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p:=next;
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end;
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end
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{ MULT[U] must be handled separately }
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{ MULT[U] must be handled separately due to different operand numbers }
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else if (taicpu(next).opcode in [A_MULT,A_MULTU]) and
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(not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
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Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
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begin
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if MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
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