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https://gitlab.com/freepascal.org/fpc/source.git
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* cleaning up tcgsize: it makes no sense to declare every combination and type
the different vector types must be either handled in the high level cg or
by using the shuffle parameter
git-svn-id: trunk@43860 -
(cherry picked from commit b7c6e01b03)
This commit is contained in:
florian
Jonas Maebe
parent
dba65567f1
commit
3ef2ab1019
@ -168,14 +168,9 @@ interface
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OS_S8, OS_S16, OS_S32, OS_S64, OS_S128,
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{ single, double, extended, comp, float128 }
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OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
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{ multi-media sizes: split in byte, word, dword, ... }
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{ entities, then the signed counterparts }
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OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512,
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OS_MS8, OS_MS16, OS_MS32, OS_MS64, OS_MS128, OS_MS256, OS_MS512,
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{ multi-media sizes: single-precision floating-point }
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OS_MF32, OS_MF128, OS_MF256, OS_MF512,
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{ multi-media sizes: double-precision floating-point }
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OS_MD64, OS_MD128, OS_MD256, OS_MD512);
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{ multi-media sizes, describes only the register size but not how it is split,
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this information must be passed separately }
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OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512);
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{ Register types }
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TRegisterType = (
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@ -319,12 +314,7 @@ interface
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{ floating point values }
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4, 8, 10, 8, 16,
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{ multimedia values }
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1, 2, 4, 8, 16, 32, 64,
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1, 2, 4, 8, 16, 32, 64,
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{ single-precision multimedia values }
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4, 16, 32, 64,
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{ double-precision multimedia values }
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8, 16, 32, 64);
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1, 2, 4, 8, 16, 32, 64);
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tfloat2tcgsize: array[tfloattype] of tcgsize =
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(OS_F32,OS_F64,OS_F80,OS_F80,OS_C64,OS_C64,OS_F128);
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@ -364,10 +354,7 @@ interface
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OS_8, OS_16, OS_32, OS_64, OS_128,
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OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
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OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512,
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OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512,
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OS_MF32, OS_MF128,OS_MF256,OS_MF512,
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OS_MD64, OS_MD128,OS_MD256,OS_MD512);
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OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512);
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tcgsize2signed : array[tcgsize] of tcgsize = (OS_NO,
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@ -375,10 +362,7 @@ interface
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OS_S8, OS_S16, OS_S32, OS_S64, OS_S128,
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OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
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OS_MS8, OS_MS16, OS_MS32, OS_MS64, OS_MS128,OS_MS256,OS_MS512,
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OS_MS8, OS_MS16, OS_MS32, OS_MS64, OS_MS128,OS_MS256,OS_MS512,
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OS_MF32, OS_MF128,OS_MF256,OS_MF512,
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OS_MD64, OS_MD128,OS_MD256,OS_MD512);
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OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256,OS_M512);
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tcgloc2str : array[TCGLoc] of string[12] = (
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@ -730,13 +714,13 @@ implementation
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begin
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case a of
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4:
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result := OS_MF32;
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result := OS_M32;
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16:
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result := OS_MF128;
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result := OS_M128;
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32:
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result := OS_MF256;
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result := OS_M256;
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64:
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result := OS_MF512;
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result := OS_M512;
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else
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result := int_cgsize(a);
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end;
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@ -746,13 +730,13 @@ implementation
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begin
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case a of
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8:
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result := OS_MD64;
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result := OS_M64;
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16:
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result := OS_MD128;
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result := OS_M128;
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32:
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result := OS_MD256;
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result := OS_M256;
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64:
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result := OS_MD512;
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result := OS_M512;
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else
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result := int_cgsize(a);
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end;
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@ -1150,8 +1150,7 @@ implementation
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OS_F64,
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OS_F128:
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a_loadmm_ref_reg(list,location^.size,location^.size,tmpref,location^.register,mms_movescalar);
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OS_M8..OS_M128,
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OS_MS8..OS_MS128:
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OS_M8..OS_M512:
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a_loadmm_ref_reg(list,location^.size,location^.size,tmpref,location^.register,nil);
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else
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internalerror(2010053101);
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@ -1356,8 +1355,7 @@ implementation
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OS_F64,
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OS_F128:
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a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,mms_movescalar);
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OS_M8..OS_M128,
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OS_MS8..OS_MS128:
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OS_M8..OS_M512:
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a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,nil);
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else
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internalerror(2010053102);
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@ -1413,8 +1411,7 @@ implementation
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OS_F64,
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OS_F128:
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a_loadmm_reg_reg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
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OS_M8..OS_M128,
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OS_MS8..OS_MS128:
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OS_M8..OS_M512:
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a_loadmm_reg_reg(list,paraloc.size,paraloc.size,paraloc.register,reg,nil);
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else
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internalerror(2010053102);
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@ -1551,19 +1551,19 @@ implementation
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case TFloatDef(tarraydef(def).elementdef).floattype of
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s32real:
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case def.size of
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4: result:=OS_MF32;
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16: result:=OS_MF128;
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32: result:=OS_MF256;
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64: result:=OS_MF512;
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4: result:=OS_M32;
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16: result:=OS_M128;
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32: result:=OS_M256;
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64: result:=OS_M512;
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else
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internalerror(2017121400);
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end;
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s64real:
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case def.size of
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8: result:=OS_MD64;
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16: result:=OS_MD128;
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32: result:=OS_MD256;
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64: result:=OS_MD512;
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8: result:=OS_M64;
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16: result:=OS_M128;
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32: result:=OS_M256;
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64: result:=OS_M512;
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else
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internalerror(2017121401);
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end;
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@ -1066,8 +1066,7 @@ implementation
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OS_F64,
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OS_F128:
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a_loadmm_ref_reg(list,location^.def,location^.def,tmpref,location^.register,mms_movescalar);
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OS_M8..OS_M128,
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OS_MS8..OS_MS128:
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OS_M8..OS_M128:
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a_loadmm_ref_reg(list,location^.def,location^.def,tmpref,location^.register,nil);
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else
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internalerror(2010053101);
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@ -343,10 +343,7 @@ unit cpubase;
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tcgsize2opsize: Array[tcgsize] of topsize =
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(S_NO,S_B,S_W,S_L,S_L,S_NO,S_B,S_W,S_L,S_L,S_NO,
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S_FS,S_FD,S_FX,S_NO,S_NO,
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S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,
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S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,
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S_NO,S_NO,S_NO,S_NO,S_NO,
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S_NO,S_NO,S_NO,S_NO,S_NO);
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S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO);
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function is_calljmp(o:tasmop):boolean;
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@ -159,26 +159,17 @@ unit cgx86;
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TCGSize2OpSize: Array[tcgsize] of topsize =
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(S_NO,S_B,S_W,S_L,S_Q,S_XMM,S_B,S_W,S_L,S_Q,S_XMM,
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S_FS,S_FL,S_FX,S_IQ,S_FXX,
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S_NO,S_NO,S_NO,S_MD,S_XMM,S_YMM,S_ZMM,
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S_NO,S_NO,S_NO,S_NO,S_XMM,S_YMM,S_ZMM,
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S_NO,S_XMM,S_YMM,S_ZMM,
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S_NO,S_XMM,S_YMM,S_ZMM);
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S_NO,S_NO,S_NO,S_MD,S_XMM,S_YMM,S_ZMM);
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{$elseif defined(i386)}
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TCGSize2OpSize: Array[tcgsize] of topsize =
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(S_NO,S_B,S_W,S_L,S_L,S_T,S_B,S_W,S_L,S_L,S_L,
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S_FS,S_FL,S_FX,S_IQ,S_FXX,
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S_NO,S_NO,S_NO,S_MD,S_XMM,S_YMM,S_ZMM,
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S_NO,S_NO,S_NO,S_NO,S_XMM,S_YMM,S_ZMM,
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S_NO,S_XMM,S_YMM,S_ZMM,
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S_NO,S_XMM,S_YMM,S_ZMM);
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S_NO,S_NO,S_NO,S_MD,S_XMM,S_YMM,S_ZMM);
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{$elseif defined(i8086)}
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TCGSize2OpSize: Array[tcgsize] of topsize =
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(S_NO,S_B,S_W,S_W,S_W,S_T,S_B,S_W,S_W,S_W,S_W,
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S_FS,S_FL,S_FX,S_IQ,S_FXX,
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S_NO,S_NO,S_NO,S_MD,S_XMM,S_YMM,S_ZMM,
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S_NO,S_NO,S_NO,S_NO,S_XMM,S_YMM,S_ZMM,
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S_NO,S_XMM,S_YMM,S_ZMM,
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S_NO,S_XMM,S_YMM,S_ZMM);
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S_NO,S_NO,S_NO,S_MD,S_XMM,S_YMM,S_ZMM);
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{$endif}
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{$ifndef NOTARGETWIN}
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@ -295,17 +286,11 @@ unit cgx86;
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OS_M64:
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result:=rg[R_MMREGISTER].getregister(list,R_SUBQ);
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OS_M128,
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OS_F128,
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OS_MF128,
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OS_MD128:
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OS_F128:
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result:=rg[R_MMREGISTER].getregister(list,R_SUBMMX); { R_SUBMMWHOLE seems a bit dangerous and ambiguous, so changed to R_SUBMMX. [Kit] }
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OS_M256,
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OS_MF256,
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OS_MD256:
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OS_M256:
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result:=rg[R_MMREGISTER].getregister(list,R_SUBMMY);
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OS_M512,
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OS_MF512,
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OS_MD512:
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OS_M512:
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result:=rg[R_MMREGISTER].getregister(list,R_SUBMMZ);
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else
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internalerror(200506041);
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@ -1374,14 +1359,12 @@ unit cgx86;
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if fromsize=tosize then
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{ needs correct size in case of spilling }
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case fromsize of
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OS_F32,
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OS_MF128:
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OS_F32:
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if UseAVX then
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instr:=taicpu.op_reg_reg(A_VMOVAPS,S_NO,reg1,reg2)
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else
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instr:=taicpu.op_reg_reg(A_MOVAPS,S_NO,reg1,reg2);
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OS_F64,
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OS_MD128:
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OS_F64:
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if UseAVX then
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instr:=taicpu.op_reg_reg(A_VMOVAPD,S_NO,reg1,reg2)
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else
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@ -1391,27 +1374,13 @@ unit cgx86;
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instr:=taicpu.op_reg_reg(A_VMOVQ,S_NO,reg1,reg2)
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else
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instr:=taicpu.op_reg_reg(A_MOVQ,S_NO,reg1,reg2);
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OS_M128, OS_MS128:
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OS_M128:
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if UseAVX then
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instr:=taicpu.op_reg_reg(A_VMOVDQA,S_NO,reg1,reg2)
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else
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instr:=taicpu.op_reg_reg(A_MOVDQA,S_NO,reg1,reg2);
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OS_MF256,
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OS_MF512:
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if UseAVX then
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instr:=taicpu.op_reg_reg(A_VMOVAPS,S_NO,reg1,reg2)
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else
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{ SSE doesn't support 512-bit vectors }
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InternalError(2018012931);
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OS_MD256,
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OS_MD512:
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if UseAVX then
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instr:=taicpu.op_reg_reg(A_VMOVAPD,S_NO,reg1,reg2)
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else
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{ SSE doesn't support 512-bit vectors }
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InternalError(2018012932);
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OS_M256, OS_MS256,
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OS_M512, OS_MS512:
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OS_M256,
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OS_M512:
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if UseAVX then
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instr:=taicpu.op_reg_reg(A_VMOVDQA,S_NO,reg1,reg2)
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else
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@ -1496,39 +1465,7 @@ unit cgx86;
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op := A_VMOVQ
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else
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op := A_MOVQ;
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OS_MF128:
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{ Use XMM transfer of packed singles }
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if UseAVX then
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begin
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if GetRefAlignment(tmpref) = 16 then
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op := A_VMOVAPS
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else
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op := A_VMOVUPS
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end
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else
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begin
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if GetRefAlignment(tmpref) = 16 then
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op := A_MOVAPS
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else
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op := A_MOVUPS
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end;
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OS_MD128:
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{ Use XMM transfer of packed doubles }
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if UseAVX then
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begin
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if GetRefAlignment(tmpref) = 16 then
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op := A_VMOVAPD
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else
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op := A_VMOVUPD
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end
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else
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begin
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if GetRefAlignment(tmpref) = 16 then
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op := A_MOVAPD
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else
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op := A_MOVUPD
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end;
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OS_M128, OS_MS128:
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OS_M128:
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{ Use XMM integer transfer }
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if UseAVX then
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begin
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@ -1542,33 +1479,9 @@ unit cgx86;
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if GetRefAlignment(tmpref) = 16 then
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op := A_MOVDQA
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else
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op := A_MOVDQU
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op := A_MOVDQU;
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end;
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OS_MF256:
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{ Use YMM transfer of packed singles }
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if UseAVX then
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begin
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if GetRefAlignment(tmpref) = 32 then
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op := A_VMOVAPS
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else
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op := A_VMOVUPS
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end
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else
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{ SSE doesn't support 256-bit vectors }
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InternalError(2018012934);
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OS_MD256:
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{ Use YMM transfer of packed doubles }
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if UseAVX then
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begin
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if GetRefAlignment(tmpref) = 32 then
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op := A_VMOVAPD
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else
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op := A_VMOVUPD
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end
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else
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{ SSE doesn't support 256-bit vectors }
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InternalError(2018012935);
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OS_M256, OS_MS256:
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OS_M256:
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{ Use YMM integer transfer }
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if UseAVX then
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begin
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@ -1579,32 +1492,8 @@ unit cgx86;
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end
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else
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{ SSE doesn't support 256-bit vectors }
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InternalError(2018012936);
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OS_MF512:
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{ Use ZMM transfer of packed singles }
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if UseAVX then
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begin
|
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if GetRefAlignment(tmpref) = 64 then
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op := A_VMOVAPS
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else
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op := A_VMOVUPS
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end
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else
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{ SSE doesn't support 512-bit vectors }
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InternalError(2018012937);
|
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OS_MD512:
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{ Use ZMM transfer of packed doubles }
|
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if UseAVX then
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begin
|
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if GetRefAlignment(tmpref) = 64 then
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op := A_VMOVAPD
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else
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op := A_VMOVUPD
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end
|
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else
|
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{ SSE doesn't support 512-bit vectors }
|
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InternalError(2018012938);
|
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OS_M512, OS_MS512:
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Internalerror(2020010401);
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OS_M512:
|
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{ Use ZMM integer transfer }
|
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if UseAVX then
|
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begin
|
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@ -1670,37 +1559,7 @@ unit cgx86;
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op := A_VMOVQ
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else
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op := A_MOVQ;
|
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OS_MF128:
|
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{ Use XMM transfer of packed singles }
|
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if UseAVX then
|
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begin
|
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if GetRefAlignment(tmpref) = 16 then
|
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op := A_VMOVAPS
|
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else
|
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op := A_VMOVUPS
|
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end else
|
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begin
|
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if GetRefAlignment(tmpref) = 16 then
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op := A_MOVAPS
|
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else
|
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op := A_MOVUPS
|
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end;
|
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OS_MD128:
|
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{ Use XMM transfer of packed doubles }
|
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if UseAVX then
|
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begin
|
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if GetRefAlignment(tmpref) = 16 then
|
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op := A_VMOVAPD
|
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else
|
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op := A_VMOVUPD
|
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end else
|
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begin
|
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if GetRefAlignment(tmpref) = 16 then
|
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op := A_MOVAPD
|
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else
|
||||
op := A_MOVUPD
|
||||
end;
|
||||
OS_M128, OS_MS128:
|
||||
OS_M128:
|
||||
{ Use XMM integer transfer }
|
||||
if UseAVX then
|
||||
begin
|
||||
@ -1715,29 +1574,7 @@ unit cgx86;
|
||||
else
|
||||
op := A_MOVDQU
|
||||
end;
|
||||
OS_MF256:
|
||||
{ Use XMM transfer of packed singles }
|
||||
if UseAVX then
|
||||
begin
|
||||
if GetRefAlignment(tmpref) = 32 then
|
||||
op := A_VMOVAPS
|
||||
else
|
||||
op := A_VMOVUPS
|
||||
end else
|
||||
{ SSE doesn't support 256-bit vectors }
|
||||
InternalError(2018012940);
|
||||
OS_MD256:
|
||||
{ Use XMM transfer of packed doubles }
|
||||
if UseAVX then
|
||||
begin
|
||||
if GetRefAlignment(tmpref) = 32 then
|
||||
op := A_VMOVAPD
|
||||
else
|
||||
op := A_VMOVUPD
|
||||
end else
|
||||
{ SSE doesn't support 256-bit vectors }
|
||||
InternalError(2018012941);
|
||||
OS_M256, OS_MS256:
|
||||
OS_M256:
|
||||
{ Use XMM integer transfer }
|
||||
if UseAVX then
|
||||
begin
|
||||
@ -1748,29 +1585,7 @@ unit cgx86;
|
||||
end else
|
||||
{ SSE doesn't support 256-bit vectors }
|
||||
InternalError(2018012942);
|
||||
OS_MF512:
|
||||
{ Use XMM transfer of packed singles }
|
||||
if UseAVX then
|
||||
begin
|
||||
if GetRefAlignment(tmpref) = 64 then
|
||||
op := A_VMOVAPS
|
||||
else
|
||||
op := A_VMOVUPS
|
||||
end else
|
||||
{ SSE doesn't support 512-bit vectors }
|
||||
InternalError(2018012943);
|
||||
OS_MD512:
|
||||
{ Use XMM transfer of packed doubles }
|
||||
if UseAVX then
|
||||
begin
|
||||
if GetRefAlignment(tmpref) = 64 then
|
||||
op := A_VMOVAPD
|
||||
else
|
||||
op := A_VMOVUPD
|
||||
end else
|
||||
{ SSE doesn't support 512-bit vectors }
|
||||
InternalError(2018012944);
|
||||
OS_M512, OS_MS512:
|
||||
OS_M512:
|
||||
{ Use XMM integer transfer }
|
||||
if UseAVX then
|
||||
begin
|
||||
|
||||
@ -447,11 +447,11 @@ implementation
|
||||
else
|
||||
internalerror(2009071902);
|
||||
end;
|
||||
OS_M128,OS_MS128,OS_MF128,OS_MD128:
|
||||
OS_M128:
|
||||
cgsize2subreg:=R_SUBMMX;
|
||||
OS_M256,OS_MS256,OS_MF256,OS_MD256:
|
||||
OS_M256:
|
||||
cgsize2subreg:=R_SUBMMY;
|
||||
OS_M512,OS_MS512,OS_MF512,OS_MD512:
|
||||
OS_M512:
|
||||
cgsize2subreg:=R_SUBMMZ;
|
||||
OS_NO:
|
||||
{ error message should have been thrown already before, so avoid only
|
||||
|
||||
@ -1288,10 +1288,12 @@ begin
|
||||
asize:=OT_BITS64;
|
||||
OS_F80 :
|
||||
asize:=OT_BITS80;
|
||||
OS_128,OS_M128,OS_MS128:
|
||||
OS_128,OS_M128:
|
||||
asize := OT_BITS128;
|
||||
OS_M256,OS_MS256:
|
||||
OS_M256:
|
||||
asize := OT_BITS256;
|
||||
OS_M512:
|
||||
asize := OT_BITS512;
|
||||
end;
|
||||
if asize<>0 then
|
||||
ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and not OT_SIZE_MASK) or asize;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user