From 3f66d043f8948725a13b1e73cd2801624b7729ae Mon Sep 17 00:00:00 2001 From: "J. Gareth \"Curious Kit\" Moreton" Date: Thu, 3 Apr 2025 18:56:42 +0100 Subject: [PATCH] * x86_64: Bug fix in "PrePeepholeOptSxx" where shifts greater than or equal to 32 weren't handled correctly --- compiler/x86/aoptx86.pas | 30 +++++++++++++++++++++++++++--- 1 file changed, 27 insertions(+), 3 deletions(-) diff --git a/compiler/x86/aoptx86.pas b/compiler/x86/aoptx86.pas index 1cac0293fa..5903a9e643 100644 --- a/compiler/x86/aoptx86.pas +++ b/compiler/x86/aoptx86.pas @@ -1753,7 +1753,15 @@ unit aoptx86; OpsEqual(taicpu(hp1).oper[1]^, taicpu(p).oper[1]^) then begin if (taicpu(p).oper[0]^.val > taicpu(hp1).oper[0]^.val) and - not(cs_opt_size in current_settings.optimizerswitches) then + not(cs_opt_size in current_settings.optimizerswitches) +{$ifdef x86_64} + and ( + (taicpu(p).opsize <> S_Q) or + { 64-bit AND can only store signed 32-bit immediates } + (taicpu(p).oper[0]^.val < 32) + ) +{$endif x86_64} + then begin { shr/sar const1, %reg shl const2, %reg @@ -1772,7 +1780,15 @@ unit aoptx86; end; end else if (taicpu(p).oper[0]^.val S_Q) or + { 64-bit AND can only store signed 32-bit immediates } + (taicpu(p).oper[0]^.val < 32) + ) +{$endif x86_64} + then begin { shr/sar const1, %reg shl const2, %reg @@ -1790,7 +1806,15 @@ unit aoptx86; Internalerror(2017050702) end; end - else if (taicpu(p).oper[0]^.val = taicpu(hp1).oper[0]^.val) then + else if (taicpu(p).oper[0]^.val = taicpu(hp1).oper[0]^.val) +{$ifdef x86_64} + and ( + (taicpu(p).opsize <> S_Q) or + { 64-bit AND can only store signed 32-bit immediates } + (taicpu(p).oper[0]^.val < 32) + ) +{$endif x86_64} + then begin { shr/sar const1, %reg shl const2, %reg