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* merge request 75 by J. Gareth "Kit" Moreton manually applied:
This merge request makes a number of improvements to the DeepMOVOpt method and supporting functions:
* ReplaceRegisterInInstruction now replaces registers in references that are written to
(since the registers themselves won't change)
* RegModifiedByInstruction will no longer return True for a register that appears in a reference
that's written to (for the same reason as above) - special operations like MOVSS
(the 0-operand version) aren't affected.
* DeepMOVOpt returning True will now always set the Result of OptPass1MOV to True even though p
wasn't directly modified, since this often caused missed optimisations.
* Some of the speed-ups in the patch from #32916 have also been applied in order to make
the general DeepMOVOpt run faster, notably it tries to avoid calling UpdateUsedRegs where possible.
This commit is contained in:
florian
parent
5c75ef30ce
commit
4012c3dbd4
@ -115,7 +115,7 @@ unit aoptx86;
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{ Returns true if the reference only refers to ESP or EBP (or their 64-bit equivalents),
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or writes to a global symbol }
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class function IsRefSafe(const ref: PReference): Boolean; static; inline;
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class function IsRefSafe(const ref: PReference): Boolean; static;
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{ Returns true if the given MOV instruction can be safely converted to CMOV }
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@ -785,6 +785,14 @@ unit aoptx86;
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function TX86AsmOptimizer.RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean;
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const
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WriteOps: array[0..3] of set of TInsChange =
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([CH_RWOP1,CH_WOP1,CH_MOP1],
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[Ch_RWOP2,Ch_WOP2,Ch_MOP2],
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[Ch_RWOP3,Ch_WOP3,Ch_MOP3],
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[Ch_RWOP4,Ch_WOP4,Ch_MOP4]);
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var
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OperIdx: Integer;
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begin
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Result := False;
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if p1.typ <> ait_instruction then
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@ -909,22 +917,12 @@ unit aoptx86;
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end;
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end;
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end;
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if ([CH_RWOP1,CH_WOP1,CH_MOP1]*Ch<>[]) and reginop(reg,taicpu(p1).oper[0]^) then
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begin
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Result := true;
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exit
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end;
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if ([Ch_RWOP2,Ch_WOP2,Ch_MOP2]*Ch<>[]) and reginop(reg,taicpu(p1).oper[1]^) then
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begin
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Result := true;
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exit
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end;
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if ([Ch_RWOP3,Ch_WOP3,Ch_MOP3]*Ch<>[]) and reginop(reg,taicpu(p1).oper[2]^) then
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begin
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Result := true;
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exit
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end;
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if ([Ch_RWOP4,Ch_WOP4,Ch_MOP4]*Ch<>[]) and reginop(reg,taicpu(p1).oper[3]^) then
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for OperIdx := 0 to taicpu(p1).ops - 1 do
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if (WriteOps[OperIdx]*Ch<>[]) and
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{ The register doesn't get modified inside a reference }
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(taicpu(p1).oper[OperIdx]^.typ = top_reg) and
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SuperRegistersEqual(reg,taicpu(p1).oper[OperIdx]^.reg) then
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begin
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Result := true;
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exit
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@ -2199,9 +2197,10 @@ unit aoptx86;
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Result := False;
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for OperIdx := 0 to p.ops - 1 do
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if (ReadFlag[OperIdx] in InsProp[p.Opcode].Ch) and
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if (ReadFlag[OperIdx] in InsProp[p.Opcode].Ch) then
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begin
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{ The shift and rotate instructions can only use CL }
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not (
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if not (
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(OperIdx = 0) and
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{ This second condition just helps to avoid unnecessarily
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calling MatchInstruction for 10 different opcodes }
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@ -2209,22 +2208,27 @@ unit aoptx86;
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MatchInstruction(p, [A_RCL, A_RCR, A_ROL, A_ROR, A_SAL, A_SAR, A_SHL, A_SHLD, A_SHR, A_SHRD], [])
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) then
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Result := ReplaceRegisterInOper(p, OperIdx, AOldReg, ANewReg) or Result;
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end
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else if p.oper[OperIdx]^.typ = top_ref then
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{ It's okay to replace registers in references that get written to }
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Result := ReplaceRegisterInOper(p, OperIdx, AOldReg, ANewReg) or Result;
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end;
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class function TX86AsmOptimizer.IsRefSafe(const ref: PReference): Boolean; inline;
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class function TX86AsmOptimizer.IsRefSafe(const ref: PReference): Boolean;
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begin
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with ref^ do
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Result :=
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(ref^.index = NR_NO) and
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(index = NR_NO) and
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(
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{$ifdef x86_64}
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(
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(ref^.base = NR_RIP) and
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(ref^.refaddr in [addr_pic, addr_pic_no_got])
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(base = NR_RIP) and
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(refaddr in [addr_pic, addr_pic_no_got])
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) or
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{$endif x86_64}
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(ref^.base = NR_STACK_POINTER_REG) or
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(ref^.base = current_procinfo.framepointer)
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(base = NR_STACK_POINTER_REG) or
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(base = current_procinfo.framepointer)
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);
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end;
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@ -2416,6 +2420,9 @@ unit aoptx86;
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if RegReadByInstruction(CurrentReg, hp1) and
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DeepMOVOpt(taicpu(p), taicpu(hp1)) then
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begin
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{ A change has occurred, just not in p }
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Result := True;
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TransferUsedRegs(TmpUsedRegs);
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UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
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@ -3359,11 +3366,30 @@ unit aoptx86;
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{ Saves on a large number of dereferences }
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ActiveReg := taicpu(p).oper[1]^.reg;
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TransferUsedRegs(TmpUsedRegs);
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UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
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while GetNextInstructionUsingRegCond(hp3,hp2,ActiveReg,CrossJump) and
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{ GetNextInstructionUsingRegCond only searches one instruction ahead unless -O3 is specified }
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(hp2.typ=ait_instruction) do
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begin
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case taicpu(hp2).opcode of
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A_POP:
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if MatchOperand(taicpu(hp2).oper[0]^,ActiveReg) then
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begin
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if not CrossJump and
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not RegUsedBetween(ActiveReg, p, hp2) then
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begin
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{ We can remove the original MOV since the register
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wasn't used between it and its popping from the stack }
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DebugMsg(SPeepholeOptimization + 'Mov2Nop 3c done',p);
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RemoveCurrentp(p, hp1);
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Result := True;
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Exit;
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end;
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{ Can't go any further }
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Break;
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end;
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A_MOV:
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if MatchOperand(taicpu(hp2).oper[0]^,ActiveReg) and
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((taicpu(p).oper[0]^.typ=top_const) or
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@ -3377,9 +3403,6 @@ unit aoptx86;
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mov %treg, y
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}
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TransferUsedRegs(TmpUsedRegs);
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TmpUsedRegs[R_INTREGISTER].Update(tai(p.Next));
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{ We don't need to call UpdateUsedRegs for every instruction between
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p and hp2 because the register we're concerned about will not
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become deallocated (otherwise GetNextInstructionUsingReg would
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@ -3387,8 +3410,8 @@ unit aoptx86;
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TempRegUsed :=
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CrossJump { Assume the register is in use if it crossed a conditional jump } or
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RegUsedAfterInstruction(ActiveReg, hp2, TmpUsedRegs) or
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RegReadByInstruction(ActiveReg, hp1);
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RegReadByInstruction(ActiveReg, hp3) or
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RegUsedAfterInstruction(ActiveReg, hp2, TmpUsedRegs);
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case taicpu(p).oper[0]^.typ Of
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top_reg:
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@ -3557,40 +3580,41 @@ unit aoptx86;
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Exit;
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end;
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else
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if MatchOpType(taicpu(p), top_reg, top_reg) then
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{ Move down to the MatchOpType if-block below };
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end;
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{ Also catches MOV/S/Z instructions that aren't modified }
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if taicpu(p).oper[0]^.typ = top_reg then
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begin
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TransferUsedRegs(TmpUsedRegs);
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TmpUsedRegs[R_INTREGISTER].Update(tai(p.Next));
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CurrentReg := taicpu(p).oper[0]^.reg;
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if
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not RegModifiedByInstruction(taicpu(p).oper[0]^.reg, hp1) and
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not RegModifiedBetween(taicpu(p).oper[0]^.reg, hp1, hp2) and
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DeepMovOpt(taicpu(p), taicpu(hp2)) then
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not RegModifiedByInstruction(CurrentReg, hp3) and
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not RegModifiedBetween(CurrentReg, hp3, hp2) and
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DeepMOVOpt(taicpu(p), taicpu(hp2)) then
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begin
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Result := True;
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{ Just in case something didn't get modified (e.g. an
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implicit register) }
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if not RegReadByInstruction(ActiveReg, hp2) and
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implicit register). Also, if it does read from this
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register, then there's no longer an advantage to
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changing the register on subsequent instructions.}
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if not RegReadByInstruction(ActiveReg, hp2) then
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begin
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{ If a conditional jump was crossed, do not delete
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the original MOV no matter what }
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not CrossJump then
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if not CrossJump and
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{ RegEndOfLife returns True if the register is
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deallocated before the next instruction or has
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been loaded with a new value }
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RegEndOfLife(ActiveReg, taicpu(hp2)) then
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begin
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TransferUsedRegs(TmpUsedRegs);
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UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
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UpdateUsedRegs(TmpUsedRegs, tai(hp1.Next));
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if
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{ Make sure the original register isn't still present
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and has been written to (e.g. with SHRX) }
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RegLoadedWithNewValue(ActiveReg, hp2) or
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not RegUsedAfterInstruction(ActiveReg, hp2, TmpUsedRegs) then
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begin
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RegUsedAfterInstruction(ActiveReg, hp2, TmpUsedRegs);
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{ We can remove the original MOV }
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DebugMsg(SPeepholeOptimization + 'Mov2Nop 3b done',p);
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RemoveCurrentp(p, hp1);
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Result := True;
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Exit;
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end
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else
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end;
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if not RegModifiedByInstruction(ActiveReg, hp2) then
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begin
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{ See if there's more we can optimise }
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hp3 := hp2;
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@ -3599,7 +3623,6 @@ unit aoptx86;
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end;
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end;
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end;
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end;
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{ Break out of the while loop under normal circumstances }
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Break;
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