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+ Next portion of MIPS peephole optimizations. Get more aggressive and do more than a single pass if needed, enabling optimization of instructions that logically turn into MOVE due to register renaming.
git-svn-id: trunk@33095 -
This commit is contained in:
sergei
parent
263c888555
commit
41751bc5b4
@ -202,11 +202,6 @@ unit aoptcpu;
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Result:=GetNextInstruction(Next,Next);
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until {not(cs_opt_level3 in current_settings.optimizerswitches) or} not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
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(is_calljmp(taicpu(Next).opcode));
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if Result and (next.typ=ait_instruction) and is_calljmp(taicpu(next).opcode) then
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begin
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result:=false;
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next:=nil;
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end;
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end;
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@ -338,6 +333,35 @@ unit aoptcpu;
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ait_instruction:
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begin
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case taicpu(p).opcode of
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A_BC:
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begin
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{ BEQ/BNE with same register are bogus, but can be generated for code like
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"if lo(qwordvar)=cardinal(qwordvar) ...",
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optimizations below can also yield them, e.g. if one register was initially R0. }
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if (taicpu(p).condition in [C_EQ,C_NE]) and
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(taicpu(p).oper[0]^.reg=taicpu(p).oper[1]^.reg) then
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begin
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if (taicpu(p).condition=C_NE) then
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begin
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if (taicpu(p).oper[2]^.typ = top_ref) and
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(taicpu(p).oper[2]^.ref^.symbol is TAsmLabel) then
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TAsmLabel(taicpu(p).oper[2]^.ref^.symbol).decrefs;
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RemoveDelaySlot(p);
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GetNextInstruction(p,next);
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end
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else
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begin
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next:=taicpu.op_sym(A_BA,taicpu(p).oper[2]^.ref^.symbol);
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taicpu(next).fileinfo:=taicpu(p).fileinfo;
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asml.insertbefore(next,p);
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end;
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asml.remove(p);
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p.Free;
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p:=next;
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result:=true;
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end;
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end;
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A_SEH:
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begin
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if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
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@ -350,13 +374,14 @@ unit aoptcpu;
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asml.remove(p);
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p.free;
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p:=next;
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result:=true;
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end
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else
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TryRemoveMov(p,A_MOVE);
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result:=TryRemoveMov(p,A_MOVE);
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end;
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A_SEB:
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{ TODO: can be handled similar to A_SEH, but it's almost never encountered }
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TryRemoveMov(p,A_MOVE);
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result:=TryRemoveMov(p,A_MOVE);
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A_SLL:
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begin
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@ -384,10 +409,11 @@ unit aoptcpu;
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p.free;
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next.free;
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p:=next2;
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result:=true;
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end;
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end
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else
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TryRemoveMov(p,A_MOVE);
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result:=TryRemoveMov(p,A_MOVE);
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end;
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A_SRL:
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@ -415,9 +441,10 @@ unit aoptcpu;
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begin
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asml.remove(next);
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next.free;
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result:=true;
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end
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else
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TryRemoveMov(p,A_MOVE);
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result:=TryRemoveMov(p,A_MOVE);
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end;
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A_ANDI:
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@ -445,6 +472,7 @@ unit aoptcpu;
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asml.remove(next2);
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next.free;
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next2.free;
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result:=true;
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end
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{ Remove zero extension if register is used only for byte/word memory store }
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else if (taicpu(p).oper[2]^.typ=top_const) and
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@ -459,9 +487,10 @@ unit aoptcpu;
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asml.remove(p);
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p.free;
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p:=next;
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result:=true;
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end
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else
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TryRemoveMov(p,A_MOVE);
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result:=TryRemoveMov(p,A_MOVE);
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end;
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A_MOV_S:
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@ -470,7 +499,7 @@ unit aoptcpu;
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(next.typ=ait_instruction) then
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begin
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if TryRemoveMovBeforeStore(p,taicpu(next),[A_SWC1]) then
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{ optimization successful };
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result:=true;
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end;
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end;
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@ -480,7 +509,7 @@ unit aoptcpu;
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(next.typ=ait_instruction) then
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begin
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if TryRemoveMovBeforeStore(p,taicpu(next),[A_SDC1]) then
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{ optimization successful };
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result:=true;
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end;
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end;
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@ -492,12 +521,12 @@ unit aoptcpu;
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begin
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{ MOVE Rx,Ry; store Rx,(ref); dealloc Rx ==> store Ry,(ref) }
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if TryRemoveMovBeforeStore(p,taicpu(next),[A_SB,A_SH,A_SW]) then
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{ optimization successful }
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result:=true
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else if TryRemoveMovToRefIndex(p,taicpu(next)) then
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{ successful as well }
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result:=true
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{ MOVE Rx,Ry; opcode Rx,Rx,any ==> opcode Rx,Ry,any
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MOVE Rx,Ry; opcode Rx,Rz,Rx ==> opcode Rx,Rz,Ry }
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else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU]) and
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else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU,A_AND,A_ANDI,A_SLLV,A_SRLV,A_SRAV]) and
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MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
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begin
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if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
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@ -506,6 +535,7 @@ unit aoptcpu;
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asml.remove(p);
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p.free;
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p:=next;
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result:=true;
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end
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{ TODO: if Ry=NR_R0, this effectively changes instruction into MOVE,
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providing further optimization possibilities }
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@ -515,10 +545,12 @@ unit aoptcpu;
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asml.remove(p);
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p.free;
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p:=next;
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result:=true;
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end;
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end
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{ MOVE Rx,Ry; opcode Rz,Rx,any; dealloc Rx ==> opcode Rz,Ry,any }
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else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU,A_SLT,A_SLTU,A_DIV,A_DIVU]) and
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else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU,A_SLT,A_SLTU,A_DIV,A_DIVU,
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A_SLL,A_SRL,A_SRA,A_SLLV,A_SRLV,A_SRAV,A_AND,A_ANDI,A_OR,A_ORI,A_XOR,A_XORI]) and
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Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
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begin
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if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
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@ -527,6 +559,7 @@ unit aoptcpu;
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asml.remove(p);
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p.free;
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p:=next;
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result:=true;
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end
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else if MatchOperand(taicpu(next).oper[2]^,taicpu(p).oper[0]^.reg) then
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begin
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@ -534,25 +567,32 @@ unit aoptcpu;
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asml.remove(p);
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p.free;
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p:=next;
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result:=true;
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end;
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end
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{ MULT[U] must be handled separately due to different operand numbers }
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else if (taicpu(next).opcode in [A_MULT,A_MULTU]) and
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{ MULT[U] and cond.branches must be handled separately due to different operand numbers }
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else if (taicpu(next).opcode in [A_MULT,A_MULTU,A_BC]) and
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Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
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begin
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if MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
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begin
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taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
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if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
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taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
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asml.remove(p);
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p.free;
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p:=next;
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result:=true;
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end
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else if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
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begin
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taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
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if MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
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taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
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asml.remove(p);
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p.free;
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p:=next;
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result:=true;
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end;
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end
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else if TryRemoveMov(p,A_MOVE) then
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@ -564,9 +604,9 @@ unit aoptcpu;
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asml.remove(p);
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p.free;
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p:=next;
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result:=true;
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end;
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end;
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{ TODO: MOVE Rx,Ry; Bcc Rx,Rz,label; dealloc Rx ==> Bcc Ry,Rz,label }
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end;
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end;
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@ -610,28 +650,51 @@ unit aoptcpu;
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result:=TryRemoveMov(p,A_MOVE);
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end;
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A_ADD,A_ADDU,A_OR:
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begin
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if MatchOperand(taicpu(p).oper[1]^,NR_R0) then
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begin
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taicpu(p).freeop(1);
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taicpu(p).oper[1]:=taicpu(p).oper[2];
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taicpu(p).oper[2]:=nil;
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taicpu(p).ops:=2;
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taicpu(p).opercnt:=2;
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taicpu(p).opcode:=A_MOVE;
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result:=true;
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end
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else if MatchOperand(taicpu(p).oper[2]^,NR_R0) then
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begin
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taicpu(p).freeop(2);
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taicpu(p).ops:=2;
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taicpu(p).opercnt:=2;
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taicpu(p).opcode:=A_MOVE;
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result:=true;
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end
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else
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result:=TryRemoveMov(p,A_MOVE);
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end;
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A_LB,A_LBU,A_LH,A_LHU,A_LW,
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A_ADD,A_ADDU,
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A_ADDI,
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A_SUB,A_SUBU,
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A_SRA,A_SRAV,
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A_SRLV,
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A_SLLV,
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A_MFLO,A_MFHI,
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A_AND,A_OR,A_XOR,A_ORI,A_XORI:
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TryRemoveMov(p,A_MOVE);
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A_AND,A_XOR,A_ORI,A_XORI:
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result:=TryRemoveMov(p,A_MOVE);
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A_LWC1,
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A_ADD_s, A_SUB_s, A_MUL_s, A_DIV_s,
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A_ABS_s, A_NEG_s, A_SQRT_s,
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A_CVT_s_w, A_CVT_s_l, A_CVT_s_d:
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TryRemoveMov(p,A_MOV_s);
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result:=TryRemoveMov(p,A_MOV_s);
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A_LDC1,
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A_ADD_d, A_SUB_d, A_MUL_d, A_DIV_d,
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A_ABS_d, A_NEG_d, A_SQRT_d,
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A_CVT_d_w, A_CVT_d_l, A_CVT_d_s:
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TryRemoveMov(p,A_MOV_d);
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result:=TryRemoveMov(p,A_MOV_d);
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end;
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end;
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end;
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