From 42c6e9323b557d61afdbe7c902e04e5990560032 Mon Sep 17 00:00:00 2001 From: peter Date: Mon, 12 Jan 2004 16:39:40 +0000 Subject: [PATCH] * sparc updates, mostly float related --- compiler/aggas.pas | 32 +-- compiler/i386/cgcpu.pas | 7 +- compiler/i386/cpuswtch.pas | 9 +- compiler/i386/rgcpu.pas | 7 +- compiler/ncgadd.pas | 13 +- compiler/ncgcal.pas | 14 +- compiler/ncgcon.pas | 11 +- compiler/sparc/aasmcpu.pas | 47 +++- compiler/sparc/cgcpu.pas | 30 +-- compiler/sparc/cpubase.pas | 17 +- compiler/sparc/cpugas.pas | 61 +++-- compiler/sparc/cpuswtch.pas | 8 +- compiler/sparc/itcpugas.pas | 8 +- compiler/sparc/ncpuadd.pas | 51 ++-- compiler/sparc/opcode.inc | 10 +- compiler/sparc/racpugas.pas | 7 +- compiler/sparc/radirect.pas | 445 ----------------------------------- compiler/sparc/rspcon.inc | 276 +++++++++++----------- compiler/sparc/rspnor.inc | 2 +- compiler/sparc/rspnum.inc | 2 + compiler/sparc/rsprni.inc | 16 +- compiler/sparc/rspsri.inc | 56 ++--- compiler/sparc/rspstab.inc | 2 + compiler/sparc/rspstd.inc | 2 + compiler/sparc/rspsup.inc | 2 + compiler/sparc/spreg.dat | 284 +++++++++++----------- compiler/sparc/strinst.inc | 9 +- compiler/systems.pas | 9 +- compiler/systems/i_linux.pas | 15 +- compiler/utils/mkspreg.pp | 17 +- 30 files changed, 576 insertions(+), 893 deletions(-) delete mode 100644 compiler/sparc/radirect.pas diff --git a/compiler/aggas.pas b/compiler/aggas.pas index 668a0f98e3..8ecbb6abb9 100644 --- a/compiler/aggas.pas +++ b/compiler/aggas.pas @@ -69,7 +69,8 @@ implementation dos, {$endif Delphi} cutils,globtype,systems, - fmodule,finput,verbose,cpubase + fmodule,finput,verbose,cpubase, + itcpugas {$ifdef GDB} {$ifdef delphi} ,sysutils @@ -78,15 +79,6 @@ implementation {$endif} ,gdb {$endif GDB} -{$ifdef x86} - ,itcpugas -{$endif} -{$ifdef powerpc} - ,itcpugas -{$endif} -{$ifdef arm} - ,itcpugas -{$endif} ; const @@ -505,11 +497,12 @@ var AsmWrite(#9'.rva'#9); AsmWriteLn(tai_const_symbol(hp).sym.name); end; + {$ifdef cpuextended} ait_real_80bit : begin if do_line then - AsmWriteLn(target_asm.comment+target_asm.comment+extended2str(tai_real_80bit(hp).value)); + AsmWriteLn(target_asm.comment+'value: '+extended2str(tai_real_80bit(hp).value)); { Make sure e is a extended type, bestreal could be a different type (bestreal) !! (PFV) } e:=tai_real_80bit(hp).value; @@ -527,13 +520,11 @@ var ait_real_64bit : begin if do_line then - AsmWriteLn(target_asm.comment+target_asm.comment+double2str(tai_real_64bit(hp).value)); + AsmWriteLn(target_asm.comment+'value: '+double2str(tai_real_64bit(hp).value)); d:=tai_real_64bit(hp).value; { swap the values to correct endian if required } -{$ifdef fpc} if source_info.endian <> target_info.endian then swap64bitarray(t64bitarray(d)); -{$endif} AsmWrite(#9'.byte'#9); for i:=0 to 7 do begin @@ -547,13 +538,11 @@ var ait_real_32bit : begin if do_line then - AsmWriteLn(target_asm.comment+target_asm.comment+single2str(tai_real_32bit(hp).value)); + AsmWriteLn(target_asm.comment+'value: '+single2str(tai_real_32bit(hp).value)); sin:=tai_real_32bit(hp).value; -{$ifdef fpc} { swap the values to correct endian if required } if source_info.endian <> target_info.endian then swap32bitarray(t32bitarray(sin)); -{$endif} AsmWrite(#9'.byte'#9); for i:=0 to 3 do begin @@ -567,18 +556,16 @@ var ait_comp_64bit : begin if do_line then - AsmWriteLn(target_asm.comment+target_asm.comment+extended2str(tai_comp_64bit(hp).value)); + AsmWriteLn(target_asm.comment+'value: '+extended2str(tai_comp_64bit(hp).value)); AsmWrite(#9'.byte'#9); {$ifdef FPC} co:=comp(tai_comp_64bit(hp).value); {$else} co:=tai_comp_64bit(hp).value; {$endif} -{$ifdef fpc} { swap the values to correct endian if required } if source_info.endian <> target_info.endian then swap64bitarray(t64bitarray(co)); -{$endif} for i:=0 to 7 do begin if i<>0 then @@ -852,7 +839,10 @@ var end. { $Log$ - Revision 1.42 2004-01-07 17:40:06 jonas + Revision 1.43 2004-01-12 16:39:40 peter + * sparc updates, mostly float related + + Revision 1.42 2004/01/07 17:40:06 jonas * darwin requires the alginment of .lcomm symbols to be specified together with the symbol itself, instead of in a .align directive diff --git a/compiler/i386/cgcpu.pas b/compiler/i386/cgcpu.pas index 14cd4e6777..832cc3fab3 100644 --- a/compiler/i386/cgcpu.pas +++ b/compiler/i386/cgcpu.pas @@ -63,7 +63,7 @@ unit cgcpu; class function tcg386.reg_cgsize(const reg: tregister): tcgsize; const subreg2cgsize:array[Tsubregister] of Tcgsize = - (OS_NO,OS_8,OS_8,OS_16,OS_32,OS_64,OS_NO); + (OS_NO,OS_8,OS_8,OS_16,OS_32,OS_64,OS_NO,OS_NO); begin case getregtype(reg) of @@ -232,7 +232,10 @@ begin end. { $Log$ - Revision 1.42 2003-12-24 00:10:02 florian + Revision 1.43 2004-01-12 16:39:40 peter + * sparc updates, mostly float related + + Revision 1.42 2003/12/24 00:10:02 florian - delete parameter in cg64 methods removed Revision 1.41 2003/12/19 22:08:44 daniel diff --git a/compiler/i386/cpuswtch.pas b/compiler/i386/cpuswtch.pas index 4cfefb2f97..936078ea0d 100644 --- a/compiler/i386/cpuswtch.pas +++ b/compiler/i386/cpuswtch.pas @@ -100,8 +100,8 @@ begin if More='INTEL' then initasmmode:=asmmode_i386_intel else - if More='DIRECT' then - initasmmode:=asmmode_direct + if (More='STANDARD') or (More='DEFAULT') then + initasmmode:=asmmode_standard else IllegalPara(opt); end; @@ -116,7 +116,10 @@ initialization end. { $Log$ - Revision 1.11 2003-11-07 15:58:32 florian + Revision 1.12 2004-01-12 16:39:40 peter + * sparc updates, mostly float related + + Revision 1.11 2003/11/07 15:58:32 florian * Florian's culmutative nr. 1; contains: - invalid calling conventions for a certain cpu are rejected - arm softfloat calling conventions diff --git a/compiler/i386/rgcpu.pas b/compiler/i386/rgcpu.pas index bca418f225..2c3b32eec7 100644 --- a/compiler/i386/rgcpu.pas +++ b/compiler/i386/rgcpu.pas @@ -35,7 +35,7 @@ unit rgcpu; cclasses,globtype,cgbase,rgobj,rgx86; type - trgcpu = class(trgobj) + trgcpu = class(trgx86) procedure add_constraints(reg:Tregister);override; end; @@ -72,7 +72,10 @@ implementation end. { $Log$ - Revision 1.41 2003-12-24 00:10:02 florian + Revision 1.42 2004-01-12 16:39:40 peter + * sparc updates, mostly float related + + Revision 1.41 2003/12/24 00:10:02 florian - delete parameter in cg64 methods removed Revision 1.40 2003/10/17 15:08:34 peter diff --git a/compiler/ncgadd.pas b/compiler/ncgadd.pas index 65babdae85..333abbcea5 100644 --- a/compiler/ncgadd.pas +++ b/compiler/ncgadd.pas @@ -114,9 +114,7 @@ interface begin truelabel:=otl; falselabel:=ofl; - end - else - internalerror(2003122901); + end; { are too few registers free? } if left.location.loc=LOC_FPUREGISTER then @@ -138,9 +136,7 @@ interface begin truelabel:=otl; falselabel:=ofl; - end - else - internalerror(2003122902); + end; if pushedfpu then begin tmpreg := cg.getfpuregister(exprasmlist,left.location.size); @@ -753,7 +749,10 @@ begin end. { $Log$ - Revision 1.25 2003-12-29 11:37:52 jonas + Revision 1.26 2004-01-12 16:39:40 peter + * sparc updates, mostly float related + + Revision 1.25 2003/12/29 11:37:52 jonas * hopefully fixed bug tb0454 (merged from nppcadd) Revision 1.24 2003/12/23 14:38:07 florian diff --git a/compiler/ncgcal.pas b/compiler/ncgcal.pas index a5ad590892..918488bc87 100644 --- a/compiler/ncgcal.pas +++ b/compiler/ncgcal.pas @@ -486,7 +486,14 @@ implementation location.register:=NR_FUNCTION_RESULT_REG else {$endif cpufpemu} - location.register:=NR_FPU_RESULT_REG; + begin + location.register:=NR_FPU_RESULT_REG; +{$ifdef sparc} + { Double are returned in F0:F1 } + if location.size=OS_F64 then + setsubreg(location.register,R_SUBFD); +{$endif sparc} + end; {$ifdef x86} tcgx86(cg).inc_fpu_stack; {$else x86} @@ -1154,7 +1161,10 @@ begin end. { $Log$ - Revision 1.149 2003-12-28 22:09:12 florian + Revision 1.150 2004-01-12 16:39:40 peter + * sparc updates, mostly float related + + Revision 1.149 2003/12/28 22:09:12 florian + setting of bit 6 of cr for c var args on ppc implemented Revision 1.148 2003/12/26 13:19:16 florian diff --git a/compiler/ncgcon.pas b/compiler/ncgcon.pas index f9abefb3f8..32e6120107 100644 --- a/compiler/ncgcon.pas +++ b/compiler/ncgcon.pas @@ -133,7 +133,7 @@ implementation lab_real:=lastlabel; if (cs_create_smart in aktmoduleswitches) then Consts.concat(Tai_cut.Create); - consts.concat(tai_align.create(const_align(4))); + consts.concat(tai_align.create(const_align(resulttype.def.size))); Consts.concat(Tai_label.Create(lastlabel)); case realait of ait_real_32bit : @@ -273,7 +273,7 @@ implementation hp2:=tai(lastlabelhp.previous); if assigned(hp2) and (hp2.typ=ait_const_32bit) and - (tai_const(hp2).value=-1) and + (tai_const(hp2).value=aword(-1)) and assigned(hp2.previous) and (tai(hp2.previous).typ=ait_const_32bit) and (tai_const(hp2.previous).value=len) and @@ -475,7 +475,7 @@ implementation else begin { compare small set } - if plongint(value_set)^=tai_const(hp1).value then + if paword(value_set)^=tai_const(hp1).value then begin { found! } lab_set:=lastlabel; @@ -559,7 +559,10 @@ begin end. { $Log$ - Revision 1.34 2003-12-08 22:34:24 peter + Revision 1.35 2004-01-12 16:39:40 peter + * sparc updates, mostly float related + + Revision 1.34 2003/12/08 22:34:24 peter * tai_const.create_32bit changed to cardinal Revision 1.33 2003/10/26 13:37:22 florian diff --git a/compiler/sparc/aasmcpu.pas b/compiler/sparc/aasmcpu.pas index 4759d34d59..3673f3ce9f 100644 --- a/compiler/sparc/aasmcpu.pas +++ b/compiler/sparc/aasmcpu.pas @@ -217,7 +217,7 @@ implementation function taicpu.is_reg_move:boolean; begin - result:=(opcode=A_MOV) and + result:=((opcode=A_MOV) or (opcode=A_FMOVS)) and (ops=2) and (oper[0]^.typ=top_reg) and (oper[1]^.typ=top_reg); @@ -226,9 +226,7 @@ implementation function taicpu.is_same_reg_move:boolean; begin - { Note: This should not check for A_NOP, because that is - used for the delay slots } - result:=(opcode=A_MOV) and + result:=((opcode=A_MOV) or (opcode=A_FMOVS)) and (ops=2) and (oper[0]^.typ=top_reg) and (oper[1]^.typ=top_reg) and @@ -254,13 +252,45 @@ implementation function taicpu.spilling_create_load(const ref:treference;r:tregister): tai; begin - result:=taicpu.op_ref_reg(A_LD,ref,r); + case getregtype(r) of + R_INTREGISTER : + result:=taicpu.op_ref_reg(A_LD,ref,r); + R_FPUREGISTER : + begin + case getsubreg(r) of + R_SUBFS : + result:=taicpu.op_ref_reg(A_LDF,ref,r); + R_SUBFD : + result:=taicpu.op_ref_reg(A_LDD,ref,r); + else + internalerror(200401042); + end; + end + else + internalerror(200401041); + end; end; function taicpu.spilling_create_store(r:tregister; const ref:treference): tai; begin - result:=taicpu.op_reg_ref(A_ST,r,ref); + case getregtype(r) of + R_INTREGISTER : + result:=taicpu.op_reg_ref(A_ST,r,ref); + R_FPUREGISTER : + begin + case getsubreg(r) of + R_SUBFS : + result:=taicpu.op_reg_ref(A_STF,r,ref); + R_SUBFD : + result:=taicpu.op_reg_ref(A_STD,r,ref); + else + internalerror(200401042); + end; + end + else + internalerror(200401041); + end; end; @@ -276,7 +306,10 @@ implementation end. { $Log$ - Revision 1.40 2003-12-28 16:20:09 jonas + Revision 1.41 2004-01-12 16:39:40 peter + * sparc updates, mostly float related + + Revision 1.40 2003/12/28 16:20:09 jonas - removed unused methods from old generic spilling code Revision 1.39 2003/12/26 14:02:30 peter diff --git a/compiler/sparc/cgcpu.pas b/compiler/sparc/cgcpu.pas index a076c68d24..195796b224 100644 --- a/compiler/sparc/cgcpu.pas +++ b/compiler/sparc/cgcpu.pas @@ -182,11 +182,9 @@ implementation begin if tmpreg=NR_NO then tmpreg:=GetIntRegister(list,OS_INT); - if (ref.index<>NR_NO) then - begin - list.concat(taicpu.op_reg_reg_reg(A_ADD,ref.base,ref.index,tmpreg)); - ref.index:=NR_NO; - end; + list.concat(taicpu.op_reg_reg_reg(A_ADD,ref.base,ref.index,tmpreg)); + ref.base:=tmpreg; + ref.index:=NR_NO; end; end; if isstore then @@ -227,7 +225,7 @@ implementation [RS_O0,RS_O1,RS_O2,RS_O3,RS_O4,RS_O5,RS_O7, RS_L0,RS_L1,RS_L2,RS_L3,RS_L4,RS_L5,RS_L6,RS_L7], first_int_imreg,[]); - rg[R_FPUREGISTER]:=trgcpu.create(R_FPUREGISTER,R_SUBNONE, + rg[R_FPUREGISTER]:=trgcpu.create(R_FPUREGISTER,R_SUBFS, [RS_F0,RS_F1,RS_F2,RS_F3,RS_F4,RS_F5,RS_F6,RS_F7, RS_F8,RS_F9,RS_F10,RS_F11,RS_F12,RS_F13,RS_F14,RS_F15, RS_F16,RS_F17,RS_F18,RS_F19,RS_F20,RS_F21,RS_F22,RS_F23, @@ -249,7 +247,7 @@ implementation if size=OS_F64 then result:=rg[R_FPUREGISTER].getregister(list,R_SUBFD) else - result:=rg[R_FPUREGISTER].getregister(list,R_SUBWHOLE); + result:=rg[R_FPUREGISTER].getregister(list,R_SUBFS); end; @@ -604,17 +602,12 @@ implementation procedure TCgSparc.a_loadfpu_reg_reg(list:TAasmOutput;size:tcgsize;reg1, reg2:tregister); + const + FpuMovInstr : Array[OS_F32..OS_F64] of TAsmOp = + (A_FMOVS,A_FMOVD); begin if reg1<>reg2 then - begin - list.concat(taicpu.op_reg_reg(A_FMOVs,reg1,reg2)); - if size=OS_F64 then - begin - setsupreg(reg1,getsupreg(reg1)+1); - setsupreg(reg2,getsupreg(reg2)+1); - list.concat(taicpu.op_reg_reg(A_FMOVs,reg1,reg2)); - end; - end; + list.concat(taicpu.op_reg_reg(fpumovinstr[size],reg1,reg2)); end; @@ -1109,7 +1102,10 @@ begin end. { $Log$ - Revision 1.75 2003-12-26 14:02:30 peter + Revision 1.76 2004-01-12 16:39:40 peter + * sparc updates, mostly float related + + Revision 1.75 2003/12/26 14:02:30 peter * sparc updates * use registertype in spill_register diff --git a/compiler/sparc/cpubase.pas b/compiler/sparc/cpubase.pas index d9e8675ee4..1f95edf2ba 100644 --- a/compiler/sparc/cpubase.pas +++ b/compiler/sparc/cpubase.pas @@ -452,7 +452,6 @@ type function flags_to_cond(const f: TResFlags) : TAsmCond; function cgsize2subreg(s:Tcgsize):Tsubregister; function std_regname(r:Tregister):string; - function gas_regname(r:Tregister):string; function std_regnum_search(const s:string):Tregister; function findreg_by_number(r:Tregister):tregisterindex; @@ -536,21 +535,13 @@ implementation end; - function gas_regname(r:Tregister):string; - var - p : tregisterindex; - begin - p:=findreg_by_number_table(r,regnumber_index); - if p<>0 then - result:=std_regname_table[p] - else - result:=generic_regname(r); - end; - end. { $Log$ - Revision 1.58 2003-12-19 14:38:03 mazen + Revision 1.59 2004-01-12 16:39:40 peter + * sparc updates, mostly float related + + Revision 1.58 2003/12/19 14:38:03 mazen * new TRegister definition applied Revision 1.57 2003/11/10 19:05:50 peter diff --git a/compiler/sparc/cpugas.pas b/compiler/sparc/cpugas.pas index bab824c765..8b3693874f 100644 --- a/compiler/sparc/cpugas.pas +++ b/compiler/sparc/cpugas.pas @@ -1,6 +1,8 @@ -{****************************************************************************** - $Id$ - Copyright (c) 1998-2000 by Florian Klaempfl +{ + $Id$ + Copyright (c) 1999-2003 by Florian Klaempfl + + This unit implements an asmoutput class for SPARC AT&T syntax This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -16,15 +18,13 @@ along with this program; if not, write to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - ****************************************************************************} -{ - This unit implements an asmoutput class for SPARC AT&T syntax + **************************************************************************** } unit cpugas; {$i fpcdefs.inc} - interface +interface uses cpubase, @@ -35,11 +35,12 @@ unit cpugas; procedure WriteInstruction(hp:Tai);override; end; - implementation +implementation uses cutils,systems, - verbose; + verbose,itcpugas; + function GetReferenceString(var ref:TReference):string; begin @@ -160,15 +161,36 @@ unit cpugas; if hp.typ<>ait_instruction then exit; op:=taicpu(hp).opcode; - { call maybe not translated to call } - s:=#9+std_op2str[op]+cond2str[taicpu(hp).condition]; - if taicpu(hp).ops>0 then + { FMOVd does not exist, rewrite it using 2 FMOVs } + if op=A_FMOVD then begin - s:=s+#9+getopstr(taicpu(hp).oper[0]^); - for i:=1 to taicpu(hp).ops-1 do - s:=s+','+getopstr(taicpu(hp).oper[i]^); + if (taicpu(hp).ops<>2) or + (taicpu(hp).oper[0]^.typ<>top_reg) or + (taicpu(hp).oper[1]^.typ<>top_reg) then + internalerror(200401045); + { FMOVs %f,%f } + s:=#9+std_op2str[A_FMOVs]+#9+getopstr(taicpu(hp).oper[0]^)+','+getopstr(taicpu(hp).oper[1]^); + AsmWriteLn(s); + { FMOVs %f,%f } + inc(taicpu(hp).oper[0]^.reg); + inc(taicpu(hp).oper[1]^.reg); + s:=#9+std_op2str[A_FMOVs]+#9+getopstr(taicpu(hp).oper[0]^)+','+getopstr(taicpu(hp).oper[1]^); + dec(taicpu(hp).oper[0]^.reg); + dec(taicpu(hp).oper[1]^.reg); + AsmWriteLn(s); + end + else + begin + { call maybe not translated to call } + s:=#9+std_op2str[op]+cond2str[taicpu(hp).condition]; + if taicpu(hp).ops>0 then + begin + s:=s+#9+getopstr(taicpu(hp).oper[0]^); + for i:=1 to taicpu(hp).ops-1 do + s:=s+','+getopstr(taicpu(hp).oper[i]^); + end; + AsmWriteLn(s); end; - AsmWriteLn(s); end; @@ -184,7 +206,7 @@ unit cpugas; needar:true; labelprefix_only_inside_procedure:false; labelprefix:'.L'; - comment:';#'; + comment:';# '; secnames:({sec_none}'', {no section} {sec_code}'.text', {executable code} {sec_data}'.data', {initialized R/W data} @@ -205,7 +227,10 @@ begin end. { $Log$ - Revision 1.23 2003-10-24 11:22:50 mazen + Revision 1.24 2004-01-12 16:39:41 peter + * sparc updates, mostly float related + + Revision 1.23 2003/10/24 11:22:50 mazen *fix related to toper==>poper Revision 1.22 2003/09/03 15:55:01 peter diff --git a/compiler/sparc/cpuswtch.pas b/compiler/sparc/cpuswtch.pas index 6e0ae71b48..ccb19b9fae 100644 --- a/compiler/sparc/cpuswtch.pas +++ b/compiler/sparc/cpuswtch.pas @@ -112,9 +112,6 @@ begin else if More='INTEL' then initasmmode:=asmmode_i386_intel - else - if More='DIRECT' then - initasmmode:=asmmode_direct else IllegalPara(opt); end; @@ -129,7 +126,10 @@ initialization end. { $Log$ - Revision 1.4 2003-08-09 18:56:54 daniel + Revision 1.5 2004-01-12 16:39:41 peter + * sparc updates, mostly float related + + Revision 1.4 2003/08/09 18:56:54 daniel * cs_regalloc renamed to cs_regvars to avoid confusion with register allocator * Some preventive changes to i386 spillinh code diff --git a/compiler/sparc/itcpugas.pas b/compiler/sparc/itcpugas.pas index d28bb22651..56afc19a42 100644 --- a/compiler/sparc/itcpugas.pas +++ b/compiler/sparc/itcpugas.pas @@ -80,6 +80,9 @@ implementation var p : longint; begin + { Double uses the same table as single } + if getsubreg(r)=R_SUBFD then + setsubreg(r,R_SUBFS); p:=findreg_by_number(r); if p<>0 then result:=gas_regname_table[p] @@ -90,7 +93,10 @@ implementation end. { $Log$ - Revision 1.1 2003-12-08 13:03:06 mazen + Revision 1.2 2004-01-12 16:39:41 peter + * sparc updates, mostly float related + + Revision 1.1 2003/12/08 13:03:06 mazen + support for native sparc assembler reader Revision 1.2 2003/11/15 19:00:10 florian diff --git a/compiler/sparc/ncpuadd.pas b/compiler/sparc/ncpuadd.pas index 5cf3d7839a..d25ac3e641 100644 --- a/compiler/sparc/ncpuadd.pas +++ b/compiler/sparc/ncpuadd.pas @@ -128,19 +128,6 @@ interface if (nf_swaped in flags) then swapleftright; - case nodetype of - addn : - op:=A_FADDs; - muln : - op:=A_FMULs; - subn : - op:=A_FSUBs; - slashn : - op:=A_FDIVs; - else - internalerror(200306014); - end; - { force fpureg as location, left right doesn't matter as both will be in a fpureg } location_force_fpureg(exprasmlist,left.location,true); @@ -152,6 +139,39 @@ interface else location.register:=right.location.register; + case nodetype of + addn : + begin + if location.size=OS_F64 then + op:=A_FADDd + else + op:=A_FADDs; + end; + muln : + begin + if location.size=OS_F64 then + op:=A_FMULd + else + op:=A_FMULs; + end; + subn : + begin + if location.size=OS_F64 then + op:=A_FSUBd + else + op:=A_FSUBs; + end; + slashn : + begin + if location.size=OS_F64 then + op:=A_FDIVd + else + op:=A_FDIVs; + end; + else + internalerror(200306014); + end; + exprasmlist.concat(taicpu.op_reg_reg_reg(op, left.location.register,right.location.register,location.register)); @@ -257,7 +277,10 @@ begin end. { $Log$ - Revision 1.21 2003-10-24 11:28:35 mazen + Revision 1.22 2004-01-12 16:39:41 peter + * sparc updates, mostly float related + + Revision 1.21 2003/10/24 11:28:35 mazen -unused units removed from uses clause Revision 1.20 2003/10/01 20:34:50 peter diff --git a/compiler/sparc/opcode.inc b/compiler/sparc/opcode.inc index d7239bae55..c2d8136dfb 100644 --- a/compiler/sparc/opcode.inc +++ b/compiler/sparc/opcode.inc @@ -67,10 +67,16 @@ A_NEG, A_not, A_set, A_skipz,A_skipnz, -A_tst +A_tst, +{ Internal instructions } +A_FMOVD + { $Log$ - Revision 1.10 2003-12-08 13:02:21 mazen + Revision 1.11 2004-01-12 16:39:41 peter + * sparc updates, mostly float related + + Revision 1.10 2003/12/08 13:02:21 mazen + support for native sparc assembler reader Revision 1.9 2003/07/02 22:18:04 peter diff --git a/compiler/sparc/racpugas.pas b/compiler/sparc/racpugas.pas index 7769fa8584..54b62265e3 100644 --- a/compiler/sparc/racpugas.pas +++ b/compiler/sparc/racpugas.pas @@ -612,7 +612,7 @@ const asmmode_Sparc_standard_info : tasmmodeinfo = ( id : asmmode_standard; - idtxt : 'DIRECT'; + idtxt : 'STANDARD'; casmreader : tSparcReader; ); @@ -622,7 +622,10 @@ initialization end. { $Log$ - Revision 1.4 2003-12-26 14:02:30 peter + Revision 1.5 2004-01-12 16:39:41 peter + * sparc updates, mostly float related + + Revision 1.4 2003/12/26 14:02:30 peter * sparc updates * use registertype in spill_register diff --git a/compiler/sparc/radirect.pas b/compiler/sparc/radirect.pas deleted file mode 100644 index f79b3fff24..0000000000 --- a/compiler/sparc/radirect.pas +++ /dev/null @@ -1,445 +0,0 @@ -{ - $Id$ - Copyright (c) 1998-2002 by Florian Klaempfl, Mazen NEIFER - - Reads inline assembler and writes the lines direct to the output - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - - ****************************************************************************} -unit radirect; -{$MACRO ON}{$i fpcdefs.inc} -interface - - uses - node; - - function assemble : tnode; - - implementation - - uses - { common } - cutils, - { global } - globals,verbose, - systems, - { aasm } - aasmbase,aasmtai,aasmcpu, - { symtable } - symconst,symbase,symtype,symsym,symtable,defutil,paramgr, - { pass 1 } - nbas, - { parser } - scanner, - rautils, - { codegen } - procinfo,cgbase, - { constants } - aggas,cpubase,globtype - ; - - function assemble : tnode; - - var - uhs, - retstr,s,hs : string; - c : char; - ende : boolean; - srsym,sym : tsym; - srsymtable : tsymtable; - code : TAAsmoutput; - i,l : longint; - - procedure writeasmline; - var - i : longint; - begin - i:=length(s); - while (i>0) and (s[i] in [' ',#9]) do - dec(i); - s[0]:=chr(i); - if s<>'' then - code.concat(Tai_direct.Create(strpnew(s))); - { consider it set function set if the offset was loaded } - if assigned(current_procinfo.procdef.funcretsym) and - (pos(retstr,upper(s))>0) then - tvarsym(current_procinfo.procdef.funcretsym).varstate:=vs_assigned; - s:=''; - end; - - begin - ende:=false; - s:=''; - if assigned(current_procinfo.procdef.funcretsym) and - is_fpu(current_procinfo.procdef.rettype.def) then - tvarsym(current_procinfo.procdef.funcretsym).varstate:=vs_assigned; - - c:=current_scanner.asmgetchar; - code:=TAAsmoutput.Create; - while not(ende) do - begin - { wrong placement - current_scanner.gettokenpos; } - case c of - 'A'..'Z','a'..'z','_': - begin - current_scanner.gettokenpos; - i:=0; - hs:=''; - while ((ord(c)>=ord('A')) and (ord(c)<=ord('Z'))) - or ((ord(c)>=ord('a')) and (ord(c)<=ord('z'))) - or ((ord(c)>=ord('0')) and (ord(c)<=ord('9'))) - or (c='_') do - begin - inc(i); - hs[i]:=c; - c:=current_scanner.asmgetchar; - end; - hs[0]:=chr(i); - if upper(hs)='END' then - ende:=true - else - begin - if c=':' then - begin - searchsym(upper(hs),srsym,srsymtable); - if srsym<>nil then - if (srsym.typ = labelsym) then - begin - hs:=tlabelsym(srsym).lab.name; - tlabelsym(srsym).lab.is_set:=true; - end - else - Message(asmr_w_using_defined_as_local); - end - else - { access to local variables } - if assigned(current_procinfo.procdef) then - begin - { is the last written character an special } - { char ? } - if (s[length(s)]<>'%') and - (s[length(s)]<>'$') and - ((s[length(s)]<>'0') or (hs[1]<>'x')) then - begin - if assigned(current_procinfo.procdef.localst) and - (current_procinfo.procdef.localst.symtablelevel >= normal_function_level) then - sym:=tsym(current_procinfo.procdef.localst.search(upper(hs))) - else - sym:=nil; - if assigned(sym) then - begin - if (sym.typ = labelsym) then - Begin - hs:=tlabelsym(sym).lab.name; - end - else if sym.typ=varsym then - begin - {variables set are after a comma } - {like in movl %eax,I } - if pos(',',s) > 0 then - tvarsym(sym).varstate:=vs_used - else - if (pos('MOV',upper(s)) > 0) and (tvarsym(sym).varstate=vs_declared) then - Message1(sym_n_uninitialized_local_variable,hs); - if (vo_is_external in tvarsym(sym).varoptions) then - hs:=tvarsym(sym).mangledname - else - hs:='%%'+tvarsym(sym).name; - end - else - { call to local function } - if (sym.typ=procsym) and ((pos('CALL',upper(s))>0) or - (pos('LEA',upper(s))>0)) then - begin - hs:=tprocsym(sym).first_procdef.mangledname; - end; - end - else - begin - if assigned(current_procinfo.procdef.parast) then - sym:=tsym(current_procinfo.procdef.parast.search(upper(hs))) - else - sym:=nil; - if assigned(sym) then - begin - if sym.typ=varsym then - begin - hs:='%%'+tvarsym(sym).name; - if pos(',',s) > 0 then - tvarsym(sym).varstate:=vs_used; - end; - end - end - end - else - begin - uhs:=upper(hs); - if (uhs='__SELF') then - begin - if assigned(current_procinfo.procdef._class) then - uhs:='self' - else - begin - Message(asmr_e_cannot_use_SELF_outside_a_method); - uhs:=''; - end; - end - else - if (uhs='__OLDEBP') then - begin - if current_procinfo.procdef.parast.symtablelevel>normal_function_level then - uhs:='parentframe' - else - begin - Message(asmr_e_cannot_use_OLDEBP_outside_nested_procedure); - uhs:=''; - end; - end - else - if uhs='__RESULT' then - begin - if (not is_void(current_procinfo.procdef.rettype.def)) then - uhs:='result' - else - begin - Message(asmr_e_void_function); - uhs:=''; - end; - end; - - if uhs<>'' then - searchsym(upper(hs),sym,srsymtable) - else - sym:=nil; - - if assigned(sym) then - begin - case sym.owner.symtabletype of - globalsymtable, - staticsymtable : - begin - case sym.typ of - varsym : - begin - Message2(asmr_h_direct_global_to_mangled,hs,tvarsym(sym).mangledname); - hs:=tvarsym(sym).mangledname; - inc(tvarsym(sym).refs); - end; - typedconstsym : - begin - Message2(asmr_h_direct_global_to_mangled,hs,ttypedconstsym(sym).mangledname); - hs:=ttypedconstsym(sym).mangledname; - end; - procsym : - begin - { procs can be called or the address can be loaded } - if ((pos('CALL',upper(s))>0) or (pos('LEA',upper(s))>0)) then - begin - if tprocsym(sym).procdef_count>1 then - Message1(asmr_w_direct_global_is_overloaded_func,hs); - Message2(asmr_h_direct_global_to_mangled,hs,tprocsym(sym).first_procdef.mangledname); - hs:=tprocsym(sym).first_procdef.mangledname; - end; - end; - else - Message(asmr_e_wrong_sym_type); - end; - end; - parasymtable, - localsymtable : - begin - case sym.typ of - varsym : - begin - hs:='%%'+tvarsym(sym).name; - inc(tvarsym(sym).refs); - end; - typedconstsym : - begin - Message2(asmr_h_direct_global_to_mangled,hs,ttypedconstsym(sym).mangledname); - hs:=ttypedconstsym(sym).mangledname; - end; - else - Message(asmr_e_wrong_sym_type); - end; - end; - end; - end; - end; - end; - s:=s+hs; - end; - end; - '{',';',#10,#13: - begin - if pos(retstr,s) > 0 then - tvarsym(current_procinfo.procdef.funcretsym).varstate:=vs_assigned; - writeasmline; - c:=current_scanner.asmgetchar; - end; - #26: - Message(scan_f_end_of_file); - else - begin - current_scanner.gettokenpos; - inc(byte(s[0])); - s[length(s)]:=c; - c:=current_scanner.asmgetchar; - end; - end; - end; - writeasmline; - assemble:=casmnode.create(code); - end; - -{***************************************************************************** - Initialize -*****************************************************************************} - -const - asmmode_sparc_direct_info : tasmmodeinfo = - ( - id : asmmode_direct; - idtxt : 'DIRECT' - ); - -initialization - RegisterAsmMode(asmmode_sparc_direct_info); -end. -{ - $Log$ - Revision 1.15 2003-10-01 20:34:50 peter - * procinfo unit contains tprocinfo - * cginfo renamed to cgbase - * moved cgmessage to verbose - * fixed ppc and sparc compiles - - Revision 1.14 2003/09/03 15:55:01 peter - * NEWRA branch merged - - Revision 1.13.2.1 2003/09/01 21:02:55 peter - * sparc updates for new tregister - - Revision 1.13 2003/08/11 09:15:53 mazen - - removed uncommon file header! - - Revision 1.12 2003/06/13 21:19:32 peter - * current_procdef removed, use current_procinfo.procdef instead - - Revision 1.11 2003/06/02 21:42:05 jonas - * function results can now also be regvars - - removed tprocinfo.return_offset, never use it again since it's invalid - if the result is a regvar - - Revision 1.10 2003/05/23 22:33:48 florian - * fix some small flaws which prevent sparc linux system unit from compiling - * some reformatting done - - Revision 1.9 2003/05/23 21:10:50 florian - * fixed sparc compiler compilation - - Revision 1.8 2003/05/22 16:11:22 florian - * fixed sparc compilation partially - - Revision 1.7 2003/04/27 11:21:36 peter - * aktprocdef renamed to current_procinfo.procdef - * procinfo renamed to current_procinfo - * procinfo will now be stored in current_module so it can be - cleaned up properly - * gen_main_procsym changed to create_main_proc and release_main_proc - to also generate a tprocinfo structure - * fixed unit implicit initfinal - - Revision 1.6 2003/04/27 07:48:05 peter - * updated for removed lexlevel - - Revision 1.5 2003/01/08 18:43:58 daniel - * Tregister changed into a record - - Revision 1.4 2002/11/25 17:43:29 peter - * splitted defbase in defutil,symutil,defcmp - * merged isconvertable and is_equal into compare_defs(_ext) - * made operator search faster by walking the list only once - - Revision 1.3 2002/11/18 17:32:01 peter - * pass proccalloption to ret_in_xxx and push_xxx functions - - Revision 1.2 2002/09/19 20:24:47 mazen - + call support - - Revision 1.1 2002/08/23 10:08:28 mazen - *** empty log message *** - - Revision 1.2 2002/08/17 09:23:47 florian - * first part of procinfo rewrite - - Revision 1.1 2002/08/10 14:47:50 carl - + moved target_cpu_string to cpuinfo - * renamed asmmode enum. - * assembler reader has now less ifdef's - * move from nppcmem.pas -> ncgmem.pas vec. node. - - Revision 1.21 2002/07/20 11:58:05 florian - * types.pas renamed to defbase.pas because D6 contains a types - unit so this would conflicts if D6 programms are compiled - + Willamette/SSE2 instructions to assembler added - - Revision 1.20 2002/07/11 14:41:34 florian - * start of the new generic parameter handling - - Revision 1.19 2002/07/01 18:46:34 peter - * internal linker - * reorganized aasm layer - - Revision 1.18 2002/05/18 13:34:26 peter - * readded missing revisions - - Revision 1.17 2002/05/16 19:46:52 carl - + defines.inc -> fpcdefs.inc to avoid conflicts if compiling by hand - + try to fix temp allocation (still in ifdef) - + generic constructor calls - + start of tassembler / tmodulebase class cleanup - - Revision 1.15 2002/05/12 16:53:18 peter - * moved entry and exitcode to ncgutil and cgobj - * foreach gets extra argument for passing local data to the - iterator function - * -CR checks also class typecasts at runtime by changing them - into as - * fixed compiler to cycle with the -CR option - * fixed stabs with elf writer, finally the global variables can - be watched - * removed a lot of routines from cga unit and replaced them by - calls to cgobj - * u32bit-s32bit updates for and,or,xor nodes. When one element is - u32bit then the other is typecasted also to u32bit without giving - a rangecheck warning/error. - * fixed pascal calling method with reversing also the high tree in - the parast, detected by tcalcst3 test - - Revision 1.14 2002/04/15 19:12:09 carl - + target_info.size_of_pointer -> pointer_size - + some cleanup of unused types/variables - * move several constants from cpubase to their specific units - (where they are used) - + att_Reg2str -> std_reg2str - + int_reg2str -> std_reg2str - - Revision 1.13 2002/04/14 17:01:52 carl - + att_reg2str -> std_reg2str - -} diff --git a/compiler/sparc/rspcon.inc b/compiler/sparc/rspcon.inc index d6c8a06bd8..371895aa88 100644 --- a/compiler/sparc/rspcon.inc +++ b/compiler/sparc/rspcon.inc @@ -1,138 +1,140 @@ { don't edit, this file is generated from spreg.dat } -NR_NO = TRegister($00000000); -NR_G0 = TRegister($01000000); -NR_G1 = TRegister($01000001); -NR_G2 = TRegister($01000002); -NR_G3 = TRegister($01000003); -NR_G4 = TRegister($01000004); -NR_G5 = TRegister($01000005); -NR_G6 = TRegister($01000006); -NR_G7 = TRegister($01000007); -NR_O0 = TRegister($01000008); -NR_O1 = TRegister($01000009); -NR_O2 = TRegister($0100000a); -NR_O3 = TRegister($0100000b); -NR_O4 = TRegister($0100000c); -NR_O5 = TRegister($0100000d); -NR_O6 = TRegister($0100000e); -NR_O7 = TRegister($0100000f); -NR_L0 = TRegister($01000010); -NR_L1 = TRegister($01000011); -NR_L2 = TRegister($01000012); -NR_L3 = TRegister($01000013); -NR_L4 = TRegister($01000014); -NR_L5 = TRegister($01000015); -NR_L6 = TRegister($01000016); -NR_L7 = TRegister($01000017); -NR_I0 = TRegister($01000018); -NR_I1 = TRegister($01000019); -NR_I2 = TRegister($0100001a); -NR_I3 = TRegister($0100001b); -NR_I4 = TRegister($0100001c); -NR_I5 = TRegister($0100001d); -NR_I6 = TRegister($0100001e); -NR_I7 = TRegister($0100001f); -NR_F0 = TRegister($02000000); -NR_F1 = TRegister($02000001); -NR_F2 = TRegister($02000002); -NR_F3 = TRegister($02000003); -NR_F4 = TRegister($02000004); -NR_F5 = TRegister($02000005); -NR_F6 = TRegister($02000006); -NR_F7 = TRegister($02000007); -NR_F8 = TRegister($02000008); -NR_F9 = TRegister($02000009); -NR_F10 = TRegister($0200000a); -NR_F11 = TRegister($0200000b); -NR_F12 = TRegister($0200000c); -NR_F13 = TRegister($0200000d); -NR_F14 = TRegister($0200000e); -NR_F15 = TRegister($0200000f); -NR_F16 = TRegister($02000010); -NR_F17 = TRegister($02000011); -NR_F18 = TRegister($02000012); -NR_F19 = TRegister($02000013); -NR_F20 = TRegister($02000014); -NR_F21 = TRegister($02000015); -NR_F22 = TRegister($02000016); -NR_F23 = TRegister($02000017); -NR_F24 = TRegister($02000018); -NR_F25 = TRegister($02000019); -NR_F26 = TRegister($0200001a); -NR_F27 = TRegister($0200001b); -NR_F28 = TRegister($0200001c); -NR_F29 = TRegister($0200001d); -NR_F30 = TRegister($0200001e); -NR_F31 = TRegister($0200001f); -NR_C0 = TRegister($03000000); -NR_C1 = TRegister($03000001); -NR_C2 = TRegister($03000002); -NR_C3 = TRegister($03000003); -NR_C4 = TRegister($03000004); -NR_C5 = TRegister($03000005); -NR_C6 = TRegister($03000006); -NR_C7 = TRegister($03000007); -NR_C8 = TRegister($03000008); -NR_C9 = TRegister($03000009); -NR_C10 = TRegister($0300000a); -NR_C11 = TRegister($0300000b); -NR_C12 = TRegister($0300000c); -NR_C13 = TRegister($0300000d); -NR_C14 = TRegister($0300000e); -NR_C15 = TRegister($0300000f); -NR_C16 = TRegister($03000010); -NR_C17 = TRegister($03000011); -NR_C18 = TRegister($03000012); -NR_C19 = TRegister($03000013); -NR_C20 = TRegister($03000014); -NR_C21 = TRegister($03000015); -NR_C22 = TRegister($03000016); -NR_C23 = TRegister($03000017); -NR_C24 = TRegister($03000018); -NR_C25 = TRegister($03000019); -NR_C26 = TRegister($0300001a); -NR_C27 = TRegister($0300001b); -NR_C28 = TRegister($0300001c); -NR_C29 = TRegister($0300001d); -NR_C30 = TRegister($0300001e); -NR_C31 = TRegister($0300001f); -NR_FSR = TRegister($05000000); -NR_FQ = TRegister($05000001); -NR_CSR = TRegister($05000002); -NR_CQ = TRegister($05000003); -NR_PSR = TRegister($05000004); -NR_TBR = TRegister($05000005); -NR_WIM = TRegister($05000006); -NR_Y = TRegister($05000007); -NR_ASR0 = TRegister($04000000); -NR_ASR1 = TRegister($04000001); -NR_ASR2 = TRegister($04000002); -NR_ASR3 = TRegister($04000003); -NR_ASR4 = TRegister($04000004); -NR_ASR5 = TRegister($04000005); -NR_ASR6 = TRegister($04000006); -NR_ASR7 = TRegister($04000007); -NR_ASR8 = TRegister($04000008); -NR_ASR9 = TRegister($04000009); -NR_ASR10 = TRegister($0400000a); -NR_ASR11 = TRegister($0400000b); -NR_ASR12 = TRegister($0400000c); -NR_ASR13 = TRegister($0400000d); -NR_ASR14 = TRegister($0400000e); -NR_ASR15 = TRegister($0400000f); -NR_ASR16 = TRegister($04000010); -NR_ASR17 = TRegister($04000011); -NR_ASR18 = TRegister($04000012); -NR_ASR19 = TRegister($04000013); -NR_ASR20 = TRegister($04000014); -NR_ASR21 = TRegister($04000015); -NR_ASR22 = TRegister($04000016); -NR_ASR23 = TRegister($04000017); -NR_ASR24 = TRegister($04000018); -NR_ASR25 = TRegister($04000019); -NR_ASR26 = TRegister($0400001a); -NR_ASR27 = TRegister($0400001b); -NR_ASR28 = TRegister($0400001c); -NR_ASR29 = TRegister($0400001d); -NR_ASR30 = TRegister($0400001e); -NR_ASR31 = TRegister($0400001f); +NR_NO = tregister($00000000); +NR_G0 = tregister($01000000); +NR_G1 = tregister($01000001); +NR_G2 = tregister($01000002); +NR_G3 = tregister($01000003); +NR_G4 = tregister($01000004); +NR_G5 = tregister($01000005); +NR_G6 = tregister($01000006); +NR_G7 = tregister($01000007); +NR_O0 = tregister($01000008); +NR_O1 = tregister($01000009); +NR_O2 = tregister($0100000a); +NR_O3 = tregister($0100000b); +NR_O4 = tregister($0100000c); +NR_O5 = tregister($0100000d); +NR_O6 = tregister($0100000e); +NR_O7 = tregister($0100000f); +NR_L0 = tregister($01000010); +NR_L1 = tregister($01000011); +NR_L2 = tregister($01000012); +NR_L3 = tregister($01000013); +NR_L4 = tregister($01000014); +NR_L5 = tregister($01000015); +NR_L6 = tregister($01000016); +NR_L7 = tregister($01000017); +NR_I0 = tregister($01000018); +NR_I1 = tregister($01000019); +NR_I2 = tregister($0100001a); +NR_I3 = tregister($0100001b); +NR_I4 = tregister($0100001c); +NR_I5 = tregister($0100001d); +NR_I6 = tregister($0100001e); +NR_I7 = tregister($0100001f); +NR_FP = tregister($0100001e); +NR_SP = tregister($0100000e); +NR_F0 = tregister($02060000); +NR_F1 = tregister($02060001); +NR_F2 = tregister($02060002); +NR_F3 = tregister($02060003); +NR_F4 = tregister($02060004); +NR_F5 = tregister($02060005); +NR_F6 = tregister($02060006); +NR_F7 = tregister($02060007); +NR_F8 = tregister($02060008); +NR_F9 = tregister($02060009); +NR_F10 = tregister($0206000a); +NR_F11 = tregister($0206000b); +NR_F12 = tregister($0206000c); +NR_F13 = tregister($0206000d); +NR_F14 = tregister($0206000e); +NR_F15 = tregister($0206000f); +NR_F16 = tregister($02060010); +NR_F17 = tregister($02060011); +NR_F18 = tregister($02060012); +NR_F19 = tregister($02060013); +NR_F20 = tregister($02060014); +NR_F21 = tregister($02060015); +NR_F22 = tregister($02060016); +NR_F23 = tregister($02060017); +NR_F24 = tregister($02060018); +NR_F25 = tregister($02060019); +NR_F26 = tregister($0206001a); +NR_F27 = tregister($0206001b); +NR_F28 = tregister($0206001c); +NR_F29 = tregister($0206001d); +NR_F30 = tregister($0206001e); +NR_F31 = tregister($0206001f); +NR_C0 = tregister($03000000); +NR_C1 = tregister($03000001); +NR_C2 = tregister($03000002); +NR_C3 = tregister($03000003); +NR_C4 = tregister($03000004); +NR_C5 = tregister($03000005); +NR_C6 = tregister($03000006); +NR_C7 = tregister($03000007); +NR_C8 = tregister($03000008); +NR_C9 = tregister($03000009); +NR_C10 = tregister($0300000a); +NR_C11 = tregister($0300000b); +NR_C12 = tregister($0300000c); +NR_C13 = tregister($0300000d); +NR_C14 = tregister($0300000e); +NR_C15 = tregister($0300000f); +NR_C16 = tregister($03000010); +NR_C17 = tregister($03000011); +NR_C18 = tregister($03000012); +NR_C19 = tregister($03000013); +NR_C20 = tregister($03000014); +NR_C21 = tregister($03000015); +NR_C22 = tregister($03000016); +NR_C23 = tregister($03000017); +NR_C24 = tregister($03000018); +NR_C25 = tregister($03000019); +NR_C26 = tregister($0300001a); +NR_C27 = tregister($0300001b); +NR_C28 = tregister($0300001c); +NR_C29 = tregister($0300001d); +NR_C30 = tregister($0300001e); +NR_C31 = tregister($0300001f); +NR_FSR = tregister($05000000); +NR_FQ = tregister($05000001); +NR_CSR = tregister($05000002); +NR_CQ = tregister($05000003); +NR_PSR = tregister($05000004); +NR_TBR = tregister($05000005); +NR_WIM = tregister($05000006); +NR_Y = tregister($05000007); +NR_ASR0 = tregister($04000000); +NR_ASR1 = tregister($04000001); +NR_ASR2 = tregister($04000002); +NR_ASR3 = tregister($04000003); +NR_ASR4 = tregister($04000004); +NR_ASR5 = tregister($04000005); +NR_ASR6 = tregister($04000006); +NR_ASR7 = tregister($04000007); +NR_ASR8 = tregister($04000008); +NR_ASR9 = tregister($04000009); +NR_ASR10 = tregister($0400000a); +NR_ASR11 = tregister($0400000b); +NR_ASR12 = tregister($0400000c); +NR_ASR13 = tregister($0400000d); +NR_ASR14 = tregister($0400000e); +NR_ASR15 = tregister($0400000f); +NR_ASR16 = tregister($04000010); +NR_ASR17 = tregister($04000011); +NR_ASR18 = tregister($04000012); +NR_ASR19 = tregister($04000013); +NR_ASR20 = tregister($04000014); +NR_ASR21 = tregister($04000015); +NR_ASR22 = tregister($04000016); +NR_ASR23 = tregister($04000017); +NR_ASR24 = tregister($04000018); +NR_ASR25 = tregister($04000019); +NR_ASR26 = tregister($0400001a); +NR_ASR27 = tregister($0400001b); +NR_ASR28 = tregister($0400001c); +NR_ASR29 = tregister($0400001d); +NR_ASR30 = tregister($0400001e); +NR_ASR31 = tregister($0400001f); diff --git a/compiler/sparc/rspnor.inc b/compiler/sparc/rspnor.inc index efcd4c3cdc..b6f96d936f 100644 --- a/compiler/sparc/rspnor.inc +++ b/compiler/sparc/rspnor.inc @@ -1,2 +1,2 @@ { don't edit, this file is generated from spreg.dat } -137 +139 diff --git a/compiler/sparc/rspnum.inc b/compiler/sparc/rspnum.inc index 7e47fcdfa5..b268537c8b 100644 --- a/compiler/sparc/rspnum.inc +++ b/compiler/sparc/rspnum.inc @@ -32,6 +32,8 @@ NR_I4, NR_I5, NR_I6, NR_I7, +NR_FP, +NR_SP, NR_F0, NR_F1, NR_F2, diff --git a/compiler/sparc/rsprni.inc b/compiler/sparc/rsprni.inc index 5576ff5011..578709e2a8 100644 --- a/compiler/sparc/rsprni.inc +++ b/compiler/sparc/rsprni.inc @@ -15,6 +15,7 @@ 13, 14, 15, +34, 16, 17, 18, @@ -31,9 +32,8 @@ 29, 30, 31, -32, 33, -34, +32, 35, 36, 37, @@ -96,8 +96,8 @@ 94, 95, 96, -105, -106, +97, +98, 107, 108, 109, @@ -128,11 +128,13 @@ 134, 135, 136, -97, -98, +137, +138, 99, 100, 101, 102, 103, -104 +104, +105, +106 diff --git a/compiler/sparc/rspsri.inc b/compiler/sparc/rspsri.inc index 14704055b9..da5ec0a078 100644 --- a/compiler/sparc/rspsri.inc +++ b/compiler/sparc/rspsri.inc @@ -1,8 +1,6 @@ { don't edit, this file is generated from spreg.dat } -105, -106, -115, -116, +107, +108, 117, 118, 119, @@ -11,9 +9,9 @@ 122, 123, 124, -107, 125, 126, +109, 127, 128, 129, @@ -22,19 +20,19 @@ 132, 133, 134, -108, 135, 136, -109, 110, +137, +138, 111, 112, 113, 114, -65, -66, -75, -76, +115, +116, +67, +68, 77, 78, 79, @@ -43,9 +41,9 @@ 82, 83, 84, -67, 85, 86, +69, 87, 88, 89, @@ -54,21 +52,21 @@ 92, 93, 94, -68, 95, 96, -69, 70, +97, +98, 71, 72, 73, 74, -100, -99, -33, -34, -43, -44, +75, +76, +102, +101, +35, +36, 45, 46, 47, @@ -77,9 +75,9 @@ 50, 51, 52, -35, 53, 54, +37, 55, 56, 57, @@ -88,17 +86,20 @@ 60, 61, 62, -36, 63, 64, -37, 38, +65, +66, 39, 40, 41, 42, -98, -97, +43, +44, +33, +100, +99, 1, 2, 3, @@ -131,8 +132,9 @@ 14, 15, 16, -101, -102, 103, +34, 104, +105, +106, 0 diff --git a/compiler/sparc/rspstab.inc b/compiler/sparc/rspstab.inc index 01d5fc49f8..b470be1e1d 100644 --- a/compiler/sparc/rspstab.inc +++ b/compiler/sparc/rspstab.inc @@ -32,6 +32,8 @@ 30, 31, 32, +31, +15, 32, 32, 32, diff --git a/compiler/sparc/rspstd.inc b/compiler/sparc/rspstd.inc index 411905425f..189ed36a2f 100644 --- a/compiler/sparc/rspstd.inc +++ b/compiler/sparc/rspstd.inc @@ -32,6 +32,8 @@ '%i5', '%i6', '%i7', +'%fp', +'%sp', '%f0', '%f1', '%f2', diff --git a/compiler/sparc/rspsup.inc b/compiler/sparc/rspsup.inc index df1c4fb69b..68600f52a6 100644 --- a/compiler/sparc/rspsup.inc +++ b/compiler/sparc/rspsup.inc @@ -32,6 +32,8 @@ RS_I4 = $1c; RS_I5 = $1d; RS_I6 = $1e; RS_I7 = $1f; +RS_FP = $1e; +RS_SP = $0e; RS_F0 = $00; RS_F1 = $01; RS_F2 = $02; diff --git a/compiler/sparc/spreg.dat b/compiler/sparc/spreg.dat index 0184749b9f..07ca110984 100644 --- a/compiler/sparc/spreg.dat +++ b/compiler/sparc/spreg.dat @@ -6,155 +6,161 @@ ; layout ; ,,,,, ; -NO,$00,$00,INVALID,-1 +NO,$00,$00,$00,INVALID,-1 ; Integer registers -G0,$01,$00,%g0,1 -G1,$01,$01,%g1,2 -G2,$01,$02,%g2,3 -G3,$01,$03,%g3,4 -G4,$01,$04,%g4,5 -G5,$01,$05,%g5,6 -G6,$01,$06,%g6,7 -G7,$01,$07,%g7,8 -O0,$01,$08,%o0,9 -O1,$01,$09,%o1,10 -O2,$01,$0a,%o2,11 -O3,$01,$0b,%o3,12 -O4,$01,$0c,%o4,13 -O5,$01,$0d,%o5,14 -O6,$01,$0e,%o6,15 -O7,$01,$0f,%o7,16 -L0,$01,$10,%l0,17 -L1,$01,$11,%l1,18 -L2,$01,$12,%l2,19 -L3,$01,$13,%l3,20 -L4,$01,$14,%l4,21 -L5,$01,$15,%l5,22 -L6,$01,$16,%l6,23 -L7,$01,$17,%l7,24 -I0,$01,$18,%i0,25 -I1,$01,$19,%i1,26 -I2,$01,$1a,%i2,27 -I3,$01,$1b,%i3,28 -I4,$01,$1c,%i4,29 -I5,$01,$1d,%i5,30 -I6,$01,$1e,%i6,31 -I7,$01,$1f,%i7,32 -; Float registers -F0,$02,$00,%f0,32 -F1,$02,$01,%f1,32 -F2,$02,$02,%f2,32 -F3,$02,$03,%f3,32 -F4,$02,$04,%f4,32 -F5,$02,$05,%f5,32 -F6,$02,$06,%f6,32 -F7,$02,$07,%f7,32 -F8,$02,$08,%f8,32 -F9,$02,$09,%f9,32 -F10,$02,$0a,%f10,32 -F11,$02,$0b,%f11,32 -F12,$02,$0c,%f12,32 -F13,$02,$0d,%f13,32 -F14,$02,$0e,%f14,32 -F15,$02,$0f,%f15,32 -F16,$02,$10,%f16,32 -F17,$02,$11,%f17,32 -F18,$02,$12,%f18,32 -F19,$02,$13,%f19,32 -F20,$02,$14,%f20,32 -F21,$02,$15,%f21,32 -F22,$02,$16,%f22,32 -F23,$02,$17,%f23,32 -F24,$02,$18,%f24,32 -F25,$02,$19,%f25,32 -F26,$02,$1a,%f26,32 -F27,$02,$1b,%f27,32 -F28,$02,$1c,%f28,32 -F29,$02,$1d,%f29,32 -F30,$02,$1e,%f30,32 -F31,$02,$1f,%f31,32 +G0,$01,$00,$00,%g0,1 +G1,$01,$00,$01,%g1,2 +G2,$01,$00,$02,%g2,3 +G3,$01,$00,$03,%g3,4 +G4,$01,$00,$04,%g4,5 +G5,$01,$00,$05,%g5,6 +G6,$01,$00,$06,%g6,7 +G7,$01,$00,$07,%g7,8 +O0,$01,$00,$08,%o0,9 +O1,$01,$00,$09,%o1,10 +O2,$01,$00,$0a,%o2,11 +O3,$01,$00,$0b,%o3,12 +O4,$01,$00,$0c,%o4,13 +O5,$01,$00,$0d,%o5,14 +O6,$01,$00,$0e,%o6,15 +O7,$01,$00,$0f,%o7,16 +L0,$01,$00,$10,%l0,17 +L1,$01,$00,$11,%l1,18 +L2,$01,$00,$12,%l2,19 +L3,$01,$00,$13,%l3,20 +L4,$01,$00,$14,%l4,21 +L5,$01,$00,$15,%l5,22 +L6,$01,$00,$16,%l6,23 +L7,$01,$00,$17,%l7,24 +I0,$01,$00,$18,%i0,25 +I1,$01,$00,$19,%i1,26 +I2,$01,$00,$1a,%i2,27 +I3,$01,$00,$1b,%i3,28 +I4,$01,$00,$1c,%i4,29 +I5,$01,$00,$1d,%i5,30 +I6,$01,$00,$1e,%i6,31 +I7,$01,$00,$1f,%i7,32 +; Aliases for stackpointer (%o6) and framepointer (%i6) +FP,$01,$00,$1e,%fp,31 +SP,$01,$00,$0e,%sp,15 +; Float registers, single use +F0,$02,$06,$00,%f0,32 +F1,$02,$06,$01,%f1,32 +F2,$02,$06,$02,%f2,32 +F3,$02,$06,$03,%f3,32 +F4,$02,$06,$04,%f4,32 +F5,$02,$06,$05,%f5,32 +F6,$02,$06,$06,%f6,32 +F7,$02,$06,$07,%f7,32 +F8,$02,$06,$08,%f8,32 +F9,$02,$06,$09,%f9,32 +F10,$02,$06,$0a,%f10,32 +F11,$02,$06,$0b,%f11,32 +F12,$02,$06,$0c,%f12,32 +F13,$02,$06,$0d,%f13,32 +F14,$02,$06,$0e,%f14,32 +F15,$02,$06,$0f,%f15,32 +F16,$02,$06,$10,%f16,32 +F17,$02,$06,$11,%f17,32 +F18,$02,$06,$12,%f18,32 +F19,$02,$06,$13,%f19,32 +F20,$02,$06,$14,%f20,32 +F21,$02,$06,$15,%f21,32 +F22,$02,$06,$16,%f22,32 +F23,$02,$06,$17,%f23,32 +F24,$02,$06,$18,%f24,32 +F25,$02,$06,$19,%f25,32 +F26,$02,$06,$1a,%f26,32 +F27,$02,$06,$1b,%f27,32 +F28,$02,$06,$1c,%f28,32 +F29,$02,$06,$1d,%f29,32 +F30,$02,$06,$1e,%f30,32 +F31,$02,$06,$1f,%f31,32 ; Coprocessor registers -C0,$03,$00,%c0,32 -C1,$03,$01,%c1,32 -C2,$03,$02,%c2,32 -C3,$03,$03,%c3,32 -C4,$03,$04,%c4,32 -C5,$03,$05,%c5,32 -C6,$03,$06,%c6,32 -C7,$03,$07,%c7,32 -C8,$03,$08,%c8,32 -C9,$03,$09,%c9,32 -C10,$03,$0a,%c10,32 -C11,$03,$0b,%c11,32 -C12,$03,$0c,%c12,32 -C13,$03,$0d,%c13,32 -C14,$03,$0e,%c14,32 -C15,$03,$0f,%c15,32 -C16,$03,$10,%c16,32 -C17,$03,$11,%c17,32 -C18,$03,$12,%c18,32 -C19,$03,$13,%c19,32 -C20,$03,$14,%c20,32 -C21,$03,$15,%c21,32 -C22,$03,$16,%c22,32 -C23,$03,$17,%c23,32 -C24,$03,$18,%c24,32 -C25,$03,$19,%c25,32 -C26,$03,$1a,%c26,32 -C27,$03,$1b,%c27,32 -C28,$03,$1c,%c28,32 -C29,$03,$1d,%c29,32 -C30,$03,$1e,%c30,32 -C31,$03,$1f,%c31,32 +C0,$03,$00,$00,%c0,32 +C1,$03,$00,$01,%c1,32 +C2,$03,$00,$02,%c2,32 +C3,$03,$00,$03,%c3,32 +C4,$03,$00,$04,%c4,32 +C5,$03,$00,$05,%c5,32 +C6,$03,$00,$06,%c6,32 +C7,$03,$00,$07,%c7,32 +C8,$03,$00,$08,%c8,32 +C9,$03,$00,$09,%c9,32 +C10,$03,$00,$0a,%c10,32 +C11,$03,$00,$0b,%c11,32 +C12,$03,$00,$0c,%c12,32 +C13,$03,$00,$0d,%c13,32 +C14,$03,$00,$0e,%c14,32 +C15,$03,$00,$0f,%c15,32 +C16,$03,$00,$10,%c16,32 +C17,$03,$00,$11,%c17,32 +C18,$03,$00,$12,%c18,32 +C19,$03,$00,$13,%c19,32 +C20,$03,$00,$14,%c20,32 +C21,$03,$00,$15,%c21,32 +C22,$03,$00,$16,%c22,32 +C23,$03,$00,$17,%c23,32 +C24,$03,$00,$18,%c24,32 +C25,$03,$00,$19,%c25,32 +C26,$03,$00,$1a,%c26,32 +C27,$03,$00,$1b,%c27,32 +C28,$03,$00,$1c,%c28,32 +C29,$03,$00,$1d,%c29,32 +C30,$03,$00,$1e,%c30,32 +C31,$03,$00,$1f,%c31,32 ; Special registers -FSR,$05,$00,%fsr,64 -FQ,$05,$01,%fq,65 -CSR,$05,$02,%csr,64 -CQ,$05,$03,%cq,65 -PSR,$05,$04,%psr,64 -TBR,$05,$05,%tbr,64 -WIM,$05,$06,%wim,64 -Y,$05,$07,%y,64 +FSR,$05,$00,$00,%fsr,64 +FQ,$05,$00,$01,%fq,65 +CSR,$05,$00,$02,%csr,64 +CQ,$05,$00,$03,%cq,65 +PSR,$05,$00,$04,%psr,64 +TBR,$05,$00,$05,%tbr,64 +WIM,$05,$00,$06,%wim,64 +Y,$05,$00,$07,%y,64 ; Ancillary State Registers -ASR0,$04,$00,%asr0,32 -ASR1,$04,$01,%asr1,32 -ASR2,$04,$02,%asr2,32 -ASR3,$04,$03,%asr3,32 -ASR4,$04,$04,%asr4,32 -ASR5,$04,$05,%asr5,32 -ASR6,$04,$06,%asr6,32 -ASR7,$04,$07,%asr7,32 -ASR8,$04,$08,%asr8,32 -ASR9,$04,$09,%asr9,32 -ASR10,$04,$0a,%asr10,32 -ASR11,$04,$0b,%asr11,32 -ASR12,$04,$0c,%asr12,32 -ASR13,$04,$0d,%asr13,32 -ASR14,$04,$0e,%asr14,32 -ASR15,$04,$0f,%asr15,32 -ASR16,$04,$10,%asr16,32 -ASR17,$04,$11,%asr17,32 -ASR18,$04,$12,%asr18,32 -ASR19,$04,$13,%asr19,32 -ASR20,$04,$14,%asr20,32 -ASR21,$04,$15,%asr21,32 -ASR22,$04,$16,%asr22,32 -ASR23,$04,$17,%asr23,32 -ASR24,$04,$18,%asr24,32 -ASR25,$04,$19,%asr25,32 -ASR26,$04,$1a,%asr26,32 -ASR27,$04,$1b,%asr27,32 -ASR28,$04,$1c,%asr28,32 -ASR29,$04,$1d,%asr29,32 -ASR30,$04,$1e,%asr30,32 -ASR31,$04,$1f,%asr31,32 +ASR0,$04,$00,$00,%asr0,32 +ASR1,$04,$00,$01,%asr1,32 +ASR2,$04,$00,$02,%asr2,32 +ASR3,$04,$00,$03,%asr3,32 +ASR4,$04,$00,$04,%asr4,32 +ASR5,$04,$00,$05,%asr5,32 +ASR6,$04,$00,$06,%asr6,32 +ASR7,$04,$00,$07,%asr7,32 +ASR8,$04,$00,$08,%asr8,32 +ASR9,$04,$00,$09,%asr9,32 +ASR10,$04,$00,$0a,%asr10,32 +ASR11,$04,$00,$0b,%asr11,32 +ASR12,$04,$00,$0c,%asr12,32 +ASR13,$04,$00,$0d,%asr13,32 +ASR14,$04,$00,$0e,%asr14,32 +ASR15,$04,$00,$0f,%asr15,32 +ASR16,$04,$00,$10,%asr16,32 +ASR17,$04,$00,$11,%asr17,32 +ASR18,$04,$00,$12,%asr18,32 +ASR19,$04,$00,$13,%asr19,32 +ASR20,$04,$00,$14,%asr20,32 +ASR21,$04,$00,$15,%asr21,32 +ASR22,$04,$00,$16,%asr22,32 +ASR23,$04,$00,$17,%asr23,32 +ASR24,$04,$00,$18,%asr24,32 +ASR25,$04,$00,$19,%asr25,32 +ASR26,$04,$00,$1a,%asr26,32 +ASR27,$04,$00,$1b,%asr27,32 +ASR28,$04,$00,$1c,%asr28,32 +ASR29,$04,$00,$1d,%asr29,32 +ASR30,$04,$00,$1e,%asr30,32 +ASR31,$04,$00,$1f,%asr31,32 ; ; $Log$ -; Revision 1.3 2003-09-03 16:29:37 peter +; Revision 1.4 2004-01-12 16:39:41 peter +; * sparc updates, mostly float related +; +; Revision 1.3 2003/09/03 16:29:37 peter ; * superregisters also from .dat file ; ; Revision 1.2 2003/09/03 15:55:01 peter diff --git a/compiler/sparc/strinst.inc b/compiler/sparc/strinst.inc index 10c4a27858..133aa14780 100644 --- a/compiler/sparc/strinst.inc +++ b/compiler/sparc/strinst.inc @@ -65,10 +65,15 @@ 'not', 'set', 'skipz','skipnz', - 'tst' + 'tst', + { internal instructions } + 'fmovd' { $Log$ - Revision 1.9 2003-12-08 13:02:21 mazen + Revision 1.10 2004-01-12 16:39:41 peter + * sparc updates, mostly float related + + Revision 1.9 2003/12/08 13:02:21 mazen + support for native sparc assembler reader Revision 1.8 2003/07/02 22:18:04 peter diff --git a/compiler/systems.pas b/compiler/systems.pas index 17be6b6edd..054c5cc1e0 100644 --- a/compiler/systems.pas +++ b/compiler/systems.pas @@ -62,8 +62,6 @@ interface ); tasmmode= (asmmode_none - { direct output with minimal parsing } - ,asmmode_direct { standard assembler (cpu dependant) with full parsing } ,asmmode_standard ,asmmode_i386_att @@ -208,7 +206,7 @@ interface needar, labelprefix_only_inside_procedure : boolean; labelprefix : string[3]; - comment : string[2]; + comment : string[3]; secnames : array[TSection] of string[20]; end; @@ -651,7 +649,10 @@ finalization end. { $Log$ - Revision 1.77 2004-01-04 21:17:51 jonas + Revision 1.78 2004-01-12 16:39:40 peter + * sparc updates, mostly float related + + Revision 1.77 2004/01/04 21:17:51 jonas + added log message for last commit Revision 1.76 2004/01/04 21:12:47 jonas diff --git a/compiler/systems/i_linux.pas b/compiler/systems/i_linux.pas index 17052d151a..1642f2421f 100644 --- a/compiler/systems/i_linux.pas +++ b/compiler/systems/i_linux.pas @@ -391,14 +391,14 @@ unit i_linux; loopalign : 4; jumpalign : 0; constalignmin : 0; - constalignmax : 4; + constalignmax : 8; varalignmin : 0; - varalignmax : 4; + varalignmax : 8; localalignmin : 0; - localalignmax : 4; + localalignmax : 8; recordalignmin : 0; - recordalignmax : 4; - maxCrecordalign : 4 + recordalignmax : 8; + maxCrecordalign : 8 ); first_parm_offset : (16+1)*4; heapsize : 256*1024; @@ -514,7 +514,10 @@ initialization end. { $Log$ - Revision 1.18 2003-12-31 17:28:19 jonas + Revision 1.19 2004-01-12 16:39:41 peter + * sparc updates, mostly float related + + Revision 1.18 2003/12/31 17:28:19 jonas * fixed C record max alignment Revision 1.17 2003/12/21 21:20:58 florian diff --git a/compiler/utils/mkspreg.pp b/compiler/utils/mkspreg.pp index f8e9feb2cd..2117ce2215 100644 --- a/compiler/utils/mkspreg.pp +++ b/compiler/utils/mkspreg.pp @@ -24,6 +24,7 @@ var s : string; regcount:byte; regcount_bsstart:byte; supregs, + subregs, names, regtypes, numbers, @@ -175,9 +176,8 @@ end; procedure read_spreg_file; - -var infile:text; - +var + infile:text; begin { open dat file } assign(infile,'spreg.dat'); @@ -197,6 +197,8 @@ begin readcomma; regtypes[regcount]:=readstr; readcomma; + subregs[regcount]:=readstr; + readcomma; supregs[regcount]:=readstr; readcomma; stdnames[regcount]:=readstr; @@ -209,7 +211,7 @@ begin writeln('Line: "',s,'"'); halt(1); end; - numbers[regcount]:=regtypes[regcount]+'0000'+copy(supregs[regcount],2,255); + numbers[regcount]:=regtypes[regcount]+copy(subregs[regcount],2,255)+'00'+copy(supregs[regcount],2,255); if i