+ Darwin/AArch64 support for handling hardware exceptions

git-svn-id: trunk@29900 -

.gitattributes

@@ -8078,6 +8078,8 @@ rtl/charmaps/cp8859_5.pas svneol=native#text/pascal
 rtl/charmaps/cpall.pas svneol=native#text/pascal
 rtl/darwin/Makefile svneol=native#text/plain
 rtl/darwin/Makefile.fpc svneol=native#text/plain
+rtl/darwin/aarch64/sig_cpu.inc svneol=native#text/plain
+rtl/darwin/aarch64/sighnd.inc svneol=native#text/plain
 rtl/darwin/arm/sig_cpu.inc svneol=native#text/plain
 rtl/darwin/arm/sighnd.inc svneol=native#text/plain
 rtl/darwin/console.pp svneol=native#text/plain

rtl/darwin/aarch64/sig_cpu.inc

@@ -0,0 +1,47 @@
+
+{$IFDEF FPC}
+{$PACKRECORDS C}
+{$ENDIF}
+
+
+
+  type
+     __darwin_arm_exception_state64 = record
+          __far : cuint64;
+          __esr : cuint32;
+          __exception : cuint32;
+       end;
+
+     __darwin_arm_thread_state64 = record
+          __r : array[0..28] of cuint64;
+          __fp : cuint64;
+          __lr : cuint64;
+          __sp : cuint64;
+          __pc : cuint64;
+          __cpsr : cuint32;
+       end;
+
+     __darwin_arm_neon_state64 = record
+          { actually an array of cuint128 }
+          __r : array[0..31] of record l1,l2: cuint64; end;
+          __fpsr : cuint32;
+          __fpcr : cuint32;
+          { array of cuint128 is aligned/padded to multiple of 16 bytes }
+          pad: cuint64;
+       end;
+
+     __darwin_arm_debug_state64 = record
+          __bvr : array[0..15] of cuint64;
+          __bcr : array[0..15] of cuint64;
+          __wvr : array[0..15] of cuint64;
+          __wcr : array[0..15] of cuint64;
+          __mdscr_el1: cuint64;
+       end;
+
+     mcontext_t = record
+          __es : __darwin_arm_exception_state64;
+          __ss : __darwin_arm_thread_state64;
+          __fs : __darwin_arm_neon_state64;
+       end;
+
+

rtl/darwin/aarch64/sighnd.inc

@@ -0,0 +1,61 @@
+{
+   This file is part of the Free Pascal run time library.
+   (c) 2008 by Jonas Maebe
+   member of the Free Pascal development team.
+
+   See the file COPYING.FPC, included in this distribution,
+   for details about the copyright.
+
+   Signalhandler for Darwin/arm
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY;without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+}
+
+
+procedure SignalToRunerror(Sig: cint; info : PSigInfo; SigContext:PSigContext); public name '_FPC_DEFAULTSIGHANDLER'; cdecl;
+var
+  res : word;
+begin
+  res:=0;
+  case sig of
+    SIGFPE :
+      begin
+        Case Info^.si_code Of
+          FPE_FLTDIV,
+          FPE_INTDIV : Res:=200;  { floating point divide by zero }
+          FPE_FLTOVF : Res:=205;  { floating point overflow }
+          FPE_FLTUND : Res:=206;  { floating point underflow }
+          FPE_FLTRES,             { floating point inexact result }
+          FPE_FLTINV : Res:=207;  { invalid floating point operation }
+          Else
+            Res:=207; {coprocessor error}
+        end;
+        { clear "exception happened" flags }
+        SigContext^.uc_mcontext^.__fs.__fpsr:=SigContext^.uc_mcontext^.__fs.__fpsr and not(fpu_exception_mask shr fpu_exception_mask_to_status_mask_shift);
+      end;
+    SIGBUS:
+        res:=214;
+    SIGILL,
+    SIGSEGV :
+        res:=216;
+    SIGINT:
+        res:=217;
+    SIGQUIT:
+        res:=233;
+  end;
+  {$ifdef FPC_USE_SIGPROCMASK}
+   reenable_signal(sig);
+  {$endif }
+
+  { return to trampoline }
+  if res <> 0 then
+    begin
+      SigContext^.uc_mcontext^.__ss.__r[0] := res;
+      SigContext^.uc_mcontext^.__ss.__r[1] := SigContext^.uc_mcontext^.__ss.__pc;
+      SigContext^.uc_mcontext^.__ss.__r[2] := SigContext^.uc_mcontext^.__ss.__fp;
+      pointer(SigContext^.uc_mcontext^.__ss.__pc) := @HandleErrorAddrFrame;
+    end;
+end;
+

rtl/darwin/signal.inc

@@ -193,7 +193,11 @@
 {$ifdef cpuarm}
     {$include arm/sig_cpu.inc}
 {$else cpuarm}
+{$ifdef cpuaarch64}
+    {$include aarch64/sig_cpu.inc}
+{$else cpuaarch64}
     {$error Unsupported cpu type!}
+{$endif cpuaarch64}
 {$endif cpuarm}
 {$endif cpux86_64}
 {$endif cpui386}