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* MIPS: 3-operand forms of DIV and DIVU are not macros if first operand is $zero.

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git-svn-id: trunk@24918 -
This commit is contained in:
sergei 2013-06-20 13:14:38 +00:00
parent 6e9489c41e
commit 456f991c51
1 changed files with 3 additions and 1 deletions
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4
compiler/mips/cpugas.pas
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@ -241,7 +241,9 @@ unit cpugas;
or (op=A_LA) or ((op=A_BC) and or (op=A_LA) or ((op=A_BC) and
not (ai.condition in [C_EQ,C_NE,C_GTZ,C_GEZ,C_LTZ,C_LEZ,C_COP1TRUE,C_COP1FALSE])) {or (op=A_JAL)} not (ai.condition in [C_EQ,C_NE,C_GTZ,C_GEZ,C_LTZ,C_LEZ,C_COP1TRUE,C_COP1FALSE])) {or (op=A_JAL)}
or (op=A_REM) or (op=A_REMU) or (op=A_REM) or (op=A_REMU)
or (op=A_DIV) or (op=A_DIVU) { DIV and DIVU are normally macros, but use $zero as first arg to generate a CPU instruction. }
or ((op=A_DIV) or (op=A_DIVU) and
((ai.ops<>3) or (ai.oper[0]^.typ<>top_reg) or (ai.oper[0]^.reg<>NR_R0)))
or (op=A_MULO) or (op=A_MULOU) or (op=A_MULO) or (op=A_MULOU)
{ A_LI is only a macro if the immediate is not in thez 16-bit range } { A_LI is only a macro if the immediate is not in thez 16-bit range }
or (op=A_LI); or (op=A_LI);