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* keep track of the temp position separately from the offset in references,

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so that they can still be freed after the reference has been changed
    (e.g. in case of array indexing or record field accesses) (mantis #33628)

git-svn-id: trunk@38814 -
This commit is contained in:
Jonas Maebe 2018-04-22 17:03:16 +00:00
parent 3e8cd7d4c9
commit 4686f61002
71 changed files with 382 additions and 381 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
compiler/aarch64/cgcpu.pas
View File

@ -185,7 +185,7 @@ implementation
href.refaddr:=addr_gotpage;
list.concat(taicpu.op_reg_ref(A_ADRP,preferred_newbasereg,href));
{ load the GOT entry (= address of the variable) }
reference_reset_base(href,preferred_newbasereg,0,sizeof(pint),[]);
reference_reset_base(href,preferred_newbasereg,0,ctempposinvalid,sizeof(pint),[]);
href.symbol:=ref.symbol;
{ code symbols defined in the current compilation unit do not
have to be accessed via the GOT }
@ -245,7 +245,7 @@ implementation
so.shiftmode:=ref.shiftmode;
so.shiftimm:=ref.shiftimm;
list.concat(taicpu.op_reg_reg_reg_shifterop(A_ADD,preferred_newbasereg,ref.base,ref.index,so));
reference_reset_base(ref,preferred_newbasereg,ref.offset,ref.alignment,ref.volatility);
reference_reset_base(ref,preferred_newbasereg,ref.offset,ref.temppos,ref.alignment,ref.volatility);
{ possibly still an invalid offset -> fall through }
end
else if ref.offset<>0 then
@ -291,7 +291,7 @@ implementation
end
else
a_op_reg_reg_reg(list,OP_ADD,OS_ADDR,ref.index,ref.base,preferred_newbasereg);
reference_reset_base(ref,preferred_newbasereg,ref.offset,ref.alignment,ref.volatility);
reference_reset_base(ref,preferred_newbasereg,ref.offset,ref.temppos,ref.alignment,ref.volatility);
{ fall through to the handling of base + offset, since the
offset may still be too big }
end;
@ -379,7 +379,7 @@ implementation
a_op_const_reg_reg(list,OP_ADD,OS_ADDR,ref.offset,ref.base,preferred_newbasereg);
ref.offset:=0;
end;
reference_reset_base(ref,preferred_newbasereg,ref.offset,ref.alignment,ref.volatility);
reference_reset_base(ref,preferred_newbasereg,ref.offset,ref.temppos,ref.alignment,ref.volatility);
end;
end
else
@ -407,7 +407,7 @@ implementation
preferred_newbasereg:=getaddressregister(list);
end;
a_op_const_reg_reg(list,OP_ADD,OS_ADDR,ref.offset,ref.base,preferred_newbasereg);
reference_reset_base(ref,preferred_newbasereg,0,ref.alignment,ref.volatility);
reference_reset_base(ref,preferred_newbasereg,0,ref.temppos,ref.alignment,ref.volatility);
end
end;
A_LDUR,A_STUR:
@ -429,7 +429,7 @@ implementation
if preferred_newbasereg=NR_NO then
preferred_newbasereg:=getaddressregister(list);
a_load_const_reg(list,OS_ADDR,ref.offset,preferred_newbasereg);
reference_reset_base(ref,preferred_newbasereg,0,newalignment(8,ref.offset),ref.volatility);
reference_reset_base(ref,preferred_newbasereg,0,ref.temppos,newalignment(8,ref.offset),ref.volatility);
end;
@ -1525,7 +1525,7 @@ implementation
pairreg: tregister;
begin
result:=0;
reference_reset_base(ref,NR_SP,-16,16,[]);
reference_reset_base(ref,NR_SP,-16,ctempposinvalid,16,[]);
ref.addressmode:=AM_PREINDEXED;
pairreg:=NR_NO;
{ store all used registers pairwise }
@ -1573,7 +1573,7 @@ implementation
localsize:=align(localsize,16);
{ save stack pointer and return address }
reference_reset_base(ref,NR_SP,-16,16,[]);
reference_reset_base(ref,NR_SP,-16,ctempposinvalid,16,[]);
ref.addressmode:=AM_PREINDEXED;
list.concat(taicpu.op_reg_reg_ref(A_STP,NR_FP,NR_LR,ref));
{ initialise frame pointer }
@ -1649,7 +1649,7 @@ implementation
pairreg: tregister;
regcount: longint;
begin
reference_reset_base(ref,NR_SP,16,16,[]);
reference_reset_base(ref,NR_SP,16,ctempposinvalid,16,[]);
ref.addressmode:=AM_POSTINDEXED;
{ highest reg stored twice? }
regcount:=0;
@ -1720,7 +1720,7 @@ implementation
a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FP,NR_SP);
{ restore framepointer and return address }
reference_reset_base(ref,NR_SP,16,16,[]);
reference_reset_base(ref,NR_SP,16,ctempposinvalid,16,[]);
ref.addressmode:=AM_POSTINDEXED;
list.concat(taicpu.op_reg_reg_ref(A_LDP,NR_FP,NR_LR,ref));
end;
@ -1921,12 +1921,12 @@ implementation
basereplaced:=true;
if forcepostindexing then
begin
reference_reset_base(ref,tmpreg,scaledoffset,ref.alignment,ref.volatility);
reference_reset_base(ref,tmpreg,scaledoffset,ref.temppos,ref.alignment,ref.volatility);
ref.addressmode:=AM_POSTINDEXED;
end
else
begin
reference_reset_base(ref,tmpreg,0,ref.alignment,ref.volatility);
reference_reset_base(ref,tmpreg,0,ref.temppos,ref.alignment,ref.volatility);
ref.addressmode:=AM_OFFSET;
end
end;

4
compiler/aarch64/hlcgcpu.pas
View File

@ -185,11 +185,11 @@ implementation
if (procdef.extnumber=$ffff) then
Internalerror(200006139);
{ mov 0(%rdi),%rax ; load vmt}
reference_reset_base(href,voidpointertype,paraloc^.register,0,sizeof(pint),[]);
reference_reset_base(href,voidpointertype,paraloc^.register,0,ctempposinvalid,sizeof(pint),[]);
getcpuregister(list,NR_IP0);
a_load_ref_reg(list,voidpointertype,voidpointertype,href,NR_IP0);
{ jmp *vmtoffs(%eax) ; method offs }
reference_reset_base(href,voidpointertype,NR_IP0,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),sizeof(pint),[]);
reference_reset_base(href,voidpointertype,NR_IP0,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),ctempposinvalid,sizeof(pint),[]);
op:=A_LDR;
tcgaarch64(cg).make_simple_ref(list,op,OS_ADDR,PF_None,href,NR_IP0);
list.concat(taicpu.op_reg_ref(op,NR_IP0,href));

2
compiler/aarch64/ncpumem.pas
View File

@ -113,7 +113,7 @@ implementation
location.reference.offset:=0;
base:=cg.getaddressregister(current_asmdata.CurrAsmList);
cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,base);
reference_reset_base(location.reference,base,oldoffset,location.reference.alignment,location.reference.volatility);
reference_reset_base(location.reference,base,oldoffset,location.reference.temppos,location.reference.alignment,location.reference.volatility);
end;
shift:=BsfDWord(l);
location.reference.index:=maybe_const_reg;

2
compiler/aarch64/ncpuset.pas
View File

@ -128,7 +128,7 @@ implementation
basereg:=cg.getaddressregister(current_asmdata.CurrAsmList);
cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,href,basereg);
{ load table slot, 32-bit sign extended }
reference_reset_base(href,basereg,0,4,[]);
reference_reset_base(href,basereg,0,href.temppos,4,[]);
href.index:=indexreg;
href.shiftmode:=SM_LSL;
href.shiftimm:=2;

2
compiler/aarch64/rgcpu.pas
View File

@ -83,7 +83,7 @@ implementation
hreg:=cg.getaddressregister(helplist);
cg.a_load_const_reg(helplist,OS_ADDR,spilltemp.offset,hreg);
reference_reset_base(tmpref,spilltemp.base,0,sizeof(pint),[]);
reference_reset_base(tmpref,spilltemp.base,0,spilltemp.temppos,sizeof(pint),[]);
tmpref.index:=hreg;
if isload then
helpins:=spilling_create_load(tmpref,tempreg)

34
compiler/arm/cgcpu.pas
View File

@ -405,7 +405,7 @@ unit cgcpu;
begin
tmpreg2:=getintregister(list,OS_INT);
a_loadaddr_ref_reg(list,ref,tmpreg2);
reference_reset_base(usedtmpref,tmpreg2,0,ref.alignment,ref.volatility);
reference_reset_base(usedtmpref,tmpreg2,0,ref.temppos,ref.alignment,ref.volatility);
end
else
usedtmpref:=ref;
@ -437,7 +437,7 @@ unit cgcpu;
begin
tmpreg2:=getintregister(list,OS_INT);
a_loadaddr_ref_reg(list,ref,tmpreg2);
reference_reset_base(usedtmpref,tmpreg2,0,ref.alignment,ref.volatility);
reference_reset_base(usedtmpref,tmpreg2,0,ref.temppos,ref.alignment,ref.volatility);
end
else
usedtmpref:=ref;
@ -526,7 +526,7 @@ unit cgcpu;
begin
{ offset in the wrapper needs to be adjusted for the stored
return address }
reference_reset_base(href,reference.index,reference.offset+sizeof(aint),sizeof(pint),[]);
reference_reset_base(href,reference.index,reference.offset+sizeof(aint),reference.temppos,sizeof(pint),[]);
if is_shifter_const(ioffset,shift) then
a_op_const_ref(list,OP_SUB,size,ioffset,href)
else
@ -582,7 +582,7 @@ unit cgcpu;
a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
LOC_REFERENCE:
begin
reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment,[]);
reference_reset_base(ref,location^.reference.index,location^.reference.offset,location^.reference.temppos,paraloc.alignment,[]);
{ doubles in softemu mode have a strange order of registers and references }
if location^.size=OS_32 then
g_concatcopy(list,tmpref,ref,4)
@ -1683,7 +1683,7 @@ unit cgcpu;
end;
LOC_REFERENCE :
begin
reference_reset_base(href2,hloc^.reference.index,hloc^.reference.offset,paraloc.alignment,[]);
reference_reset_base(href2,hloc^.reference.index,hloc^.reference.offset,hloc^.reference.temppos,paraloc.alignment,[]);
{ concatcopy should choose the best way to copy the data }
g_concatcopy(list,href,href2,tcgsize2size[hloc^.size]);
end;
@ -2796,7 +2796,7 @@ unit cgcpu;
else
begin
a_loadaddr_ref_reg(list,source,srcreg);
reference_reset_base(srcref,srcreg,0,source.alignment,source.volatility);
reference_reset_base(srcref,srcreg,0,source.temppos,source.alignment,source.volatility);
end;
while (len div 4 <> 0) and (tmpregi<maxtmpreg) do
@ -2810,7 +2810,7 @@ unit cgcpu;
destreg:=getintregister(list,OS_ADDR);
a_loadaddr_ref_reg(list,dest,destreg);
reference_reset_base(dstref,destreg,0,dest.alignment,dest.volatility);
reference_reset_base(dstref,destreg,0,dest.temppos,dest.alignment,dest.volatility);
tmpregi2:=1;
while (tmpregi2<=tmpregi) do
begin
@ -2878,11 +2878,11 @@ unit cgcpu;
begin{unaligned & 4<len<helpsize **or** aligned/unaligned & len>helpsize}
destreg:=getintregister(list,OS_ADDR);
a_loadaddr_ref_reg(list,dest,destreg);
reference_reset_base(dstref,destreg,0,dest.alignment,dest.volatility);
reference_reset_base(dstref,destreg,0,dest.temppos,dest.alignment,dest.volatility);
srcreg:=getintregister(list,OS_ADDR);
a_loadaddr_ref_reg(list,source,srcreg);
reference_reset_base(srcref,srcreg,0,source.alignment,source.volatility);
reference_reset_base(srcref,srcreg,0,dest.temppos,source.alignment,source.volatility);
countreg:=getintregister(list,OS_32);
@ -3788,7 +3788,7 @@ unit cgcpu;
begin
tmpreg2:=getintregister(list,OS_INT);
a_loadaddr_ref_reg(list,ref,tmpreg2);
reference_reset_base(usedtmpref,tmpreg2,0,ref.alignment,ref.volatility);
reference_reset_base(usedtmpref,tmpreg2,0,ref.temppos,ref.alignment,ref.volatility);
end
else
usedtmpref:=ref;
@ -3821,7 +3821,7 @@ unit cgcpu;
begin
tmpreg2:=getintregister(list,OS_INT);
a_loadaddr_ref_reg(list,ref,tmpreg2);
reference_reset_base(usedtmpref,tmpreg2,0,ref.alignment,ref.volatility);
reference_reset_base(usedtmpref,tmpreg2,0,ref.temppos,ref.alignment,ref.volatility);
end
else
usedtmpref:=ref;
@ -3935,7 +3935,7 @@ unit cgcpu;
begin
{ offset in the wrapper needs to be adjusted for the stored
return address }
reference_reset_base(href,reference.index,reference.offset+sizeof(aint),sizeof(pint),[]);
reference_reset_base(href,reference.index,reference.offset+sizeof(aint),reference.temppos,sizeof(pint),[]);
if is_thumb_imm(ioffset) then
a_op_const_ref(list,OP_SUB,size,ioffset,href)
else
@ -4002,7 +4002,7 @@ unit cgcpu;
tmpreg:=getintregister(list,OS_ADDR);
a_loadaddr_ref_reg(list,ref,tmpreg);
reference_reset_base(href,tmpreg,0,ref.alignment,ref.volatility);
reference_reset_base(href,tmpreg,0,ref.temppos,ref.alignment,ref.volatility);
end
else if (op=A_LDR) and
(oppostfix in [PF_None]) and
@ -4012,7 +4012,7 @@ unit cgcpu;
tmpreg:=getintregister(list,OS_ADDR);
a_loadaddr_ref_reg(list,ref,tmpreg);
reference_reset_base(href,tmpreg,0,ref.alignment,ref.volatility);
reference_reset_base(href,tmpreg,0,ref.temppos,ref.alignment,ref.volatility);
end
else if (op=A_LDR) and
((oppostfix in [PF_SH,PF_SB]) or
@ -4021,7 +4021,7 @@ unit cgcpu;
tmpreg:=getintregister(list,OS_ADDR);
a_loadaddr_ref_reg(list,ref,tmpreg);
reference_reset_base(href,tmpreg,0,ref.alignment,ref.volatility);
reference_reset_base(href,tmpreg,0,ref.temppos,ref.alignment,ref.volatility);
end;
Result:=inherited handle_load_store(list, op, oppostfix, reg, href);
@ -4339,7 +4339,7 @@ unit cgcpu;
begin
tmpreg2:=getintregister(list,OS_INT);
a_loadaddr_ref_reg(list,ref,tmpreg2);
reference_reset_base(usedtmpref,tmpreg2,0,ref.alignment,ref.volatility);
reference_reset_base(usedtmpref,tmpreg2,0,ref.temppos,ref.alignment,ref.volatility);
end
else
usedtmpref:=ref;
@ -4371,7 +4371,7 @@ unit cgcpu;
begin
tmpreg2:=getintregister(list,OS_INT);
a_loadaddr_ref_reg(list,ref,tmpreg2);
reference_reset_base(usedtmpref,tmpreg2,0,ref.alignment,ref.volatility);
reference_reset_base(usedtmpref,tmpreg2,0,ref.temppos,ref.alignment,ref.volatility);
end
else
usedtmpref:=ref;

6
compiler/arm/hlcgcpu.pas
View File

@ -66,7 +66,7 @@ implementation
href : treference;
l : TAsmLabel;
begin
reference_reset_base(href,voidpointertype,NR_R0,0,sizeof(pint),[]);
reference_reset_base(href,voidpointertype,NR_R0,0,ctempposinvalid,sizeof(pint),[]);
if GenerateThumbCode then
begin
if (href.offset in [0..124]) and ((href.offset mod 4)=0) then
@ -111,7 +111,7 @@ implementation
Internalerror(200006139);
if GenerateThumbCode then
begin
reference_reset_base(href,voidpointertype,NR_R0,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),sizeof(pint),[]);
reference_reset_base(href,voidpointertype,NR_R0,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),ctempposinvalid,sizeof(pint),[]);
if (href.offset in [0..124]) and ((href.offset mod 4)=0) then
begin
list.concat(taicpu.op_regset(A_PUSH,R_INTREGISTER,R_SUBWHOLE,[RS_R0]));
@ -144,7 +144,7 @@ implementation
end
else
begin
reference_reset_base(href,voidpointertype,NR_R12,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),sizeof(pint),[]);
reference_reset_base(href,voidpointertype,NR_R12,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),ctempposinvalid,sizeof(pint),[]);
cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_R12);
end;
if not(CPUARM_HAS_BX in cpu_capabilities[current_settings.cputype]) then

2
compiler/arm/narminl.pas
View File

@ -397,7 +397,7 @@ implementation
begin
r:=cg.getintregister(current_asmdata.CurrAsmList,OS_ADDR);
cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,r);
reference_reset_base(ref,r,0,left.location.reference.alignment,location.reference.volatility);
reference_reset_base(ref,r,0,location.reference.temppos,left.location.reference.alignment,location.reference.volatility);
{ since the address might be nil we can't use ldr for older cpus }
current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_PLD,ref));
end;

12
compiler/arm/rgcpu.pas
View File

@ -195,7 +195,7 @@ unit rgcpu;
{$endif}
cg.a_load_const_reg(helplist,OS_ADDR,spilltemp.offset,hreg);
cg.a_op_reg_reg(helplist,OP_ADD,OS_ADDR,current_procinfo.framepointer,hreg);
reference_reset_base(tmpref,hreg,0,sizeof(aint),[]);
reference_reset_base(tmpref,hreg,0,spilltemp.temppos,sizeof(aint),[]);
end
else if is_shifter_const(a and not($FFF), immshift) then
if spilltemp.offset > 0 then
@ -205,7 +205,7 @@ unit rgcpu;
{$endif}
helplist.concat(taicpu.op_reg_reg_const(A_ADD, hreg, current_procinfo.framepointer,
a and not($FFF)));
reference_reset_base(tmpref, hreg, a and $FFF, sizeof(aint),[]);
reference_reset_base(tmpref, hreg, a and $FFF, spilltemp.temppos, sizeof(aint),[]);
end
else
begin
@ -214,7 +214,7 @@ unit rgcpu;
{$endif}
helplist.concat(taicpu.op_reg_reg_const(A_SUB, hreg, current_procinfo.framepointer,
a and not($FFF)));
reference_reset_base(tmpref, hreg, -(a and $FFF), sizeof(aint),[]);
reference_reset_base(tmpref, hreg, -(a and $FFF), spilltemp.temppos, sizeof(aint),[]);
end
else
begin
@ -222,7 +222,7 @@ unit rgcpu;
helplist.concat(tai_comment.create(strpnew('Spilling: Use a_load_const_reg to fix spill offset')));
{$endif}
cg.a_load_const_reg(helplist,OS_ADDR,spilltemp.offset,hreg);
reference_reset_base(tmpref,current_procinfo.framepointer,0,sizeof(aint),[]);
reference_reset_base(tmpref,current_procinfo.framepointer,0,spilltemp.temppos,sizeof(aint),[]);
tmpref.index:=hreg;
end;
@ -483,7 +483,7 @@ unit rgcpu;
tmpref.base:=NR_R15;
helplist.concat(taicpu.op_reg_ref(A_LDR,hreg,tmpref));
reference_reset_base(tmpref,current_procinfo.framepointer,0,sizeof(aint),[]);
reference_reset_base(tmpref,current_procinfo.framepointer,0,ctempposinvalid,sizeof(aint),[]);
tmpref.index:=hreg;
if spilltemp.index<>NR_NO then
@ -543,7 +543,7 @@ unit rgcpu;
if spilltemp.index<>NR_NO then
internalerror(200401263);
reference_reset_base(tmpref,current_procinfo.framepointer,0,sizeof(pint),[]);
reference_reset_base(tmpref,current_procinfo.framepointer,0,ctempposinvalid,sizeof(pint),[]);
tmpref.index:=hreg;
helplist.concat(spilling_create_store(tempreg,tmpref));

4
compiler/avr/cgcpu.pas
View File

@ -194,7 +194,7 @@ unit cgcpu;
a_load_reg_reg(list,paraloc^.size,paraloc^.size,r,paraloc^.register);
LOC_REFERENCE,LOC_CREFERENCE:
begin
reference_reset_base(ref,paraloc^.reference.index,paraloc^.reference.offset,2,[]);
reference_reset_base(ref,paraloc^.reference.index,paraloc^.reference.offset,paraloc^.reference.temppos,2,[]);
a_load_reg_ref(list,paraloc^.size,paraloc^.size,r,ref);
end;
else
@ -348,7 +348,7 @@ unit cgcpu;
a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
LOC_REFERENCE:
begin
reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment,[]);
reference_reset_base(ref,location^.reference.index,location^.reference.offset,location^.reference.temppos,paraloc.alignment,[]);
{ doubles in softemu mode have a strange order of registers and references }
if location^.size=OS_32 then
g_concatcopy(list,tmpref,ref,4)

2
compiler/avr/raavrgas.pas
View File

@ -518,7 +518,7 @@ Unit raavrgas;
begin
oper.opr.typ:=OPR_REFERENCE;
reference_reset_base(oper.opr.ref,tempreg,0,1,[]);
reference_reset_base(oper.opr.ref,tempreg,0,ctempposinvalid,1,[]);
{ add a constant expression? }
if actasmtoken=AS_PLUS then

4
compiler/avr/rgcpu.pas
View File

@ -104,7 +104,7 @@ unit rgcpu;
helplist.concat(taicpu.op_reg_reg(A_ADD,NR_R26,spilltemp.base));
helplist.concat(taicpu.op_reg_reg(A_ADC,NR_R27,cg.GetNextReg(spilltemp.base)));
reference_reset_base(tmpref,NR_R26,0,1,[]);
reference_reset_base(tmpref,NR_R26,0,spilltemp.temppos,1,[]);
helpins:=spilling_create_load(tmpref,tempreg);
helplist.concat(helpins);
list.insertlistafter(pos,helplist);
@ -130,7 +130,7 @@ unit rgcpu;
helplist.concat(taicpu.op_reg_reg(A_ADD,NR_R26,spilltemp.base));
helplist.concat(taicpu.op_reg_reg(A_ADC,NR_R27,cg.GetNextReg(spilltemp.base)));
reference_reset_base(tmpref,NR_R26,0,1,[]);
reference_reset_base(tmpref,NR_R26,0,spilltemp.temppos,1,[]);
helplist.concat(spilling_create_store(tempreg,tmpref));
list.insertlistafter(pos,helplist);
helplist.free;

20
compiler/cgobj.pas
View File

@ -965,7 +965,7 @@ implementation
a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
LOC_REFERENCE,LOC_CREFERENCE:
begin
reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment,[]);
reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.location^.reference.temppos,cgpara.alignment,[]);
a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
end;
LOC_MMREGISTER,LOC_CMMREGISTER:
@ -996,7 +996,7 @@ implementation
a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
LOC_REFERENCE,LOC_CREFERENCE:
begin
reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment,[]);
reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.location^.reference.temppos,cgpara.alignment,[]);
a_load_const_ref(list,cgpara.location^.size,a,ref);
end
else
@ -1125,7 +1125,7 @@ implementation
begin
if assigned(location^.next) then
internalerror(2010052906);
reference_reset_base(ref,location^.reference.index,location^.reference.offset,newalignment(cgpara.alignment,cgpara.intsize-sizeleft),[]);
reference_reset_base(ref,location^.reference.index,location^.reference.offset,location^.reference.temppos,newalignment(cgpara.alignment,cgpara.intsize-sizeleft),[]);
if (size <> OS_NO) and
(tcgsize2size[size] <= sizeof(aint)) then
a_load_ref_ref(list,size,location^.size,tmpref,ref)
@ -1341,7 +1341,7 @@ implementation
a_loadfpu_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref);
LOC_REFERENCE :
begin
reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset,align,[]);
reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset,paraloc.reference.temppos,align,[]);
{ use concatcopy, because it can also be a float which fails when
load_ref_ref is used. Don't copy data when the references are equal }
if not((href.base=ref.base) and (href.offset=ref.offset)) then
@ -1409,7 +1409,7 @@ implementation
end;
LOC_REFERENCE :
begin
reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset,align,[]);
reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset,paraloc.reference.temppos,align,[]);
case getregtype(reg) of
R_ADDRESSREGISTER,
R_INTREGISTER :
@ -1838,7 +1838,7 @@ implementation
LOC_REFERENCE,LOC_CREFERENCE:
begin
cgpara.check_simple_location;
reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment,[]);
reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.location^.reference.temppos,cgpara.alignment,[]);
a_loadfpu_reg_ref(list,size,size,r,ref);
end;
LOC_REGISTER,LOC_CREGISTER:
@ -1879,7 +1879,7 @@ implementation
LOC_REFERENCE,LOC_CREFERENCE:
begin
cgpara.check_simple_location;
reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment,[]);
reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.location^.reference.temppos,cgpara.alignment,[]);
{ concatcopy should choose the best way to copy the data }
g_concatcopy(list,ref,href,tcgsize2size[size]);
end;
@ -2293,7 +2293,7 @@ implementation
a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
LOC_REFERENCE,LOC_CREFERENCE:
begin
reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment,[]);
reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.location^.reference.temppos,cgpara.alignment,[]);
a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
end;
LOC_REGISTER,LOC_CREGISTER:
@ -2334,7 +2334,7 @@ implementation
begin
if not(cgpara.location^.next^.size in [OS_32,OS_S32]) then
internalerror(2009112911);
reference_reset_base(href,cgpara.location^.next^.reference.index,cgpara.location^.next^.reference.offset,cgpara.alignment,[]);
reference_reset_base(href,cgpara.location^.next^.reference.index,cgpara.location^.next^.reference.offset,cgpara.location^.next^.reference.temppos,cgpara.alignment,[]);
a_load_reg_ref(list,OS_32,cgpara.location^.next^.size,tmpreg,href);
end;
end
@ -2693,7 +2693,7 @@ implementation
begin
{ offset in the wrapper needs to be adjusted for the stored
return address }
reference_reset_base(href,reference.index,reference.offset+sizeof(pint),sizeof(pint),[]);
reference_reset_base(href,reference.index,reference.offset+sizeof(pint),reference.temppos,sizeof(pint),[]);
a_op_const_ref(list,OP_SUB,size,ioffset,href);
end
else

19
compiler/cgutils.pas
View File

@ -44,6 +44,12 @@ unit cgutils;
tcpuregisterset = set of 0..maxcpuregister;
tcpuregisterarray = array of tsuperregister;
{ use record for type-safety; should only be accessed directly by temp
manager }
treftemppos = record
val: asizeint;
end;
{$packset 1}
{ a reference may be volatile for reading, writing, or both. E.g., local variables
inside try-blocks are volatile for writes (writes must not be removed, because at
@ -61,6 +67,7 @@ unit cgutils;
offset : asizeint;
symbol,
relsymbol : tasmsymbol;
temppos : treftemppos;
{$if defined(x86)}
segment,
{$endif defined(x86)}
@ -100,6 +107,10 @@ unit cgutils;
alignment : byte;
end;
const
ctempposinvalid: treftemppos = (val: low(treftemppos.val));
type
tsubsetregister = record
subsetreg : tregister;
startbit, bitlen: byte;
@ -178,7 +189,7 @@ unit cgutils;
{# Clear to zero a treference, and set is base address
to base register.
}
procedure reference_reset_base(var ref : treference;base : tregister;offset, alignment : longint; volatility: tvolatilityset);
procedure reference_reset_base(var ref : treference;base : tregister;offset : longint; temppos : treftemppos; alignment : longint; volatility: tvolatilityset);
procedure reference_reset_symbol(var ref : treference;sym : tasmsymbol;offset, alignment : longint; volatility: tvolatilityset);
{ This routine verifies if two references are the same, and
if so, returns TRUE, otherwise returns false.
@ -226,14 +237,16 @@ uses
{$endif arm}
ref.alignment:=alignment;
ref.volatility:=volatility;
ref.temppos:=ctempposinvalid;
end;
procedure reference_reset_base(var ref: treference; base: tregister; offset, alignment: longint; volatility: tvolatilityset);
procedure reference_reset_base(var ref: treference; base: tregister; offset : longint; temppos : treftemppos ; alignment : longint; volatility: tvolatilityset);
begin
reference_reset(ref,alignment,volatility);
ref.base:=base;
ref.offset:=offset;
ref.temppos:=temppos;
end;
@ -242,6 +255,7 @@ uses
reference_reset(ref,alignment,volatility);
ref.symbol:=sym;
ref.offset:=offset;
ref.temppos:=ctempposinvalid;
end;
@ -282,6 +296,7 @@ uses
{$endif arm}
l.reference.alignment:=alignment;
l.reference.volatility:=volatility;
l.reference.temppos:=ctempposinvalid;
end;

42
compiler/hlcgobj.pas
View File

@ -122,10 +122,7 @@ unit hlcgobj;
@param(regsize the type of the pointer, contained in the reg parameter)
@param(reg register containing the value of a pointer)
}
procedure reference_reset_base(var ref: treference; regsize: tdef; reg: tregister; offset, alignment: longint; volatility: tvolatilityset); virtual;
{# Returns a reference corresponding to a temp }
procedure temp_to_ref(p: ptemprecord; out ref: treference); virtual;
procedure reference_reset_base(var ref: treference; regsize: tdef; reg: tregister; offset: longint; temppos: treftemppos; alignment: longint; volatility: tvolatilityset); virtual;
{# Emit a label to the instruction stream. }
procedure a_label(list : TAsmList;l : tasmlabel); inline;
@ -842,16 +839,12 @@ implementation
end;
procedure thlcgobj.reference_reset_base(var ref: treference; regsize: tdef;
reg: tregister; offset, alignment: longint; volatility: tvolatilityset);
reg: tregister; offset: longint; temppos: treftemppos; alignment: longint; volatility: tvolatilityset);
begin
reference_reset(ref,alignment,volatility);
ref.base:=reg;
ref.offset:=offset;
end;
procedure thlcgobj.temp_to_ref(p: ptemprecord; out ref: treference);
begin
reference_reset_base(ref,voidstackpointertype,current_procinfo.framepointer,p^.pos,p^.alignment,[]);
ref.temppos:=temppos;
end;
procedure thlcgobj.a_label(list: TAsmList; l: tasmlabel); inline;
@ -892,7 +885,7 @@ implementation
a_load_reg_reg(list,size,cgpara.location^.def,r,cgpara.location^.register);
LOC_REFERENCE,LOC_CREFERENCE:
begin
reference_reset_base(ref,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment,[]);
reference_reset_base(ref,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.location^.reference.temppos,cgpara.alignment,[]);
a_load_reg_ref(list,size,cgpara.location^.def,r,ref);
end;
LOC_MMREGISTER,LOC_CMMREGISTER:
@ -922,7 +915,7 @@ implementation
a_load_const_reg(list,cgpara.location^.def,a,cgpara.location^.register);
LOC_REFERENCE,LOC_CREFERENCE:
begin
reference_reset_base(ref,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment,[]);
reference_reset_base(ref,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.location^.reference.temppos,cgpara.alignment,[]);
a_load_const_ref(list,cgpara.location^.def,a,ref);
end
else
@ -1053,7 +1046,7 @@ implementation
begin
if assigned(location^.next) then
internalerror(2017073001);
reference_reset_base(ref,voidstackpointertype,location^.reference.index,location^.reference.offset,newalignment(cgpara.alignment,cgpara.intsize-sizeleft),[]);
reference_reset_base(ref,voidstackpointertype,location^.reference.index,location^.reference.offset,location^.reference.temppos,newalignment(cgpara.alignment,cgpara.intsize-sizeleft),[]);
if (def_cgsize(size)<>OS_NO) and
(size.size=sizeleft) and
(sizeleft<=sizeof(aint)) then
@ -2467,7 +2460,7 @@ implementation
refptrdef:=cpointerdef.getreusable(refsize);
newbase:=getaddressregister(list,refptrdef);
a_loadaddr_ref_reg(list,refsize,refptrdef,ref,newbase);
reference_reset_base(result.ref,refptrdef,newbase,0,result.ref.alignment,[]);
reference_reset_base(result.ref,refptrdef,newbase,0,result.ref.temppos,result.ref.alignment,[]);
end;
result.ref.index:=tmpreg;
tmpreg:=getintregister(list,ptruinttype);
@ -2548,7 +2541,7 @@ implementation
LOC_REFERENCE,LOC_CREFERENCE:
begin
cgpara.check_simple_location;
reference_reset_base(ref,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment,[]);
reference_reset_base(ref,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.location^.reference.temppos,cgpara.alignment,[]);
a_loadfpu_reg_ref(list,fromsize,cgpara.def,r,ref);
end;
LOC_REGISTER,LOC_CREGISTER:
@ -2580,7 +2573,7 @@ implementation
LOC_REFERENCE,LOC_CREFERENCE:
begin
cgpara.check_simple_location;
reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment,[]);
reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.location^.reference.temppos,cgpara.alignment,[]);
{ concatcopy should choose the best way to copy the data }
g_concatcopy(list,fromsize,ref,href);
end;
@ -2594,7 +2587,7 @@ implementation
intptrdef:=cpointerdef.getreusable(cgpara.location^.def);
hreg:=getaddressregister(list,intptrdef);
a_loadaddr_ref_reg(list,fromsize,intptrdef,ref,hreg);
reference_reset_base(href,intptrdef,hreg,0,ref.alignment,[]);
reference_reset_base(href,intptrdef,hreg,0,ref.temppos,ref.alignment,[]);
a_load_ref_cgpara(list,cgpara.location^.def,ref,cgpara);
end
else
@ -2690,7 +2683,7 @@ implementation
a_loadmm_reg_reg(list,fromsize,cgpara.def,reg,cgpara.location^.register,shuffle);
LOC_REFERENCE,LOC_CREFERENCE:
begin
reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment,[]);
reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.location^.reference.temppos,cgpara.alignment,[]);
a_loadmm_reg_ref(list,fromsize,cgpara.def,reg,href,shuffle);
end;
LOC_REGISTER,LOC_CREGISTER:
@ -4155,7 +4148,7 @@ implementation
begin
if not loadref then
internalerror(200410231);
reference_reset_base(ref,cpointerdef.getreusable(def),l.register,0,alignment,[]);
reference_reset_base(ref,cpointerdef.getreusable(def),l.register,0,ctempposinvalid,alignment,[]);
end;
LOC_REFERENCE,
LOC_CREFERENCE :
@ -4163,7 +4156,7 @@ implementation
if loadref then
begin
pdef:=cpointerdef.getreusable(def);
reference_reset_base(ref,pdef,getaddressregister(list,voidpointertype),0,alignment,[]);
reference_reset_base(ref,pdef,getaddressregister(list,voidpointertype),0,ctempposinvalid,alignment,[]);
{ it's a pointer to def }
a_load_ref_reg(list,pdef,pdef,l.reference,ref.base);
end
@ -4604,7 +4597,8 @@ implementation
procedure thlcgobj.paravarsym_set_initialloc_to_paraloc(vs: tparavarsym);
begin
reference_reset_base(vs.initialloc.reference,voidstackpointertype,tparavarsym(vs).paraloc[calleeside].location^.reference.index,
tparavarsym(vs).paraloc[calleeside].location^.reference.offset,tparavarsym(vs).paraloc[calleeside].alignment,[]);
tparavarsym(vs).paraloc[calleeside].location^.reference.offset,tparavarsym(vs).paraloc[calleeside].location^.reference.temppos,
tparavarsym(vs).paraloc[calleeside].alignment,[]);
end;
procedure thlcgobj.gen_entry_code(list: TAsmList);
@ -4668,7 +4662,7 @@ implementation
assigned(hp^.def) and
is_managed_type(hp^.def) then
begin
temp_to_ref(hp,href);
tg.temp_to_ref(hp,href);
g_initialize(list,hp^.def,href);
end;
hp:=hp^.next;
@ -4688,7 +4682,7 @@ implementation
is_managed_type(hp^.def) then
begin
include(current_procinfo.flags,pi_needs_implicit_finally);
temp_to_ref(hp,href);
tg.temp_to_ref(hp,href);
g_finalize(list,hp^.def,href);
end;
hp:=hp^.next;
@ -5161,7 +5155,7 @@ implementation
case para.location^.loc of
LOC_REFERENCE,LOC_CREFERENCE:
begin
reference_reset_base(href,voidstackpointertype,para.location^.reference.index,para.location^.reference.offset,para.alignment,[]);
reference_reset_base(href,voidstackpointertype,para.location^.reference.index,para.location^.reference.offset,para.location^.reference.temppos,para.alignment,[]);
a_load_ref_ref(list,para.def,para.def,href,destloc.reference);
end;
else

4
compiler/i386/cgcpu.pas
View File

@ -187,7 +187,7 @@ unit cgcpu;
cgpara.check_simple_location;
len:=align(cgpara.intsize,cgpara.alignment);
g_stackpointer_alloc(list,len);
reference_reset_base(href,NR_STACK_POINTER_REG,0,4,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,0,ctempposinvalid,4,[]);
g_concatcopy(list,r,href,len);
end
else
@ -300,7 +300,7 @@ unit cgcpu;
var
href : treference;
begin
reference_reset_base(href,NR_STACK_POINTER_REG,a,0,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,a,ctempposinvalid,0,[]);
{ normally, lea is a better choice than an add }
list.concat(Taicpu.op_ref_reg(A_LEA,TCGSize2OpSize[OS_ADDR],href,NR_STACK_POINTER_REG));
end;

20
compiler/i386/hlcgcpu.pas
View File

@ -90,10 +90,10 @@ implementation
(cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
begin
cg.g_stackpointer_alloc(list,stacksize);
reference_reset_base(href,voidstackpointertype,NR_STACK_POINTER_REG,0,voidstackpointertype.size,[]);
reference_reset_base(href,voidstackpointertype,NR_STACK_POINTER_REG,0,ctempposinvalid,voidstackpointertype.size,[]);
end
else
reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment,[]);
reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.location^.reference.temppos,cgpara.alignment,[]);
cg.a_loadfpu_reg_ref(list,locsize,locsize,l.register,href);
end;
LOC_FPUREGISTER:
@ -135,10 +135,10 @@ implementation
(cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
begin
cg.g_stackpointer_alloc(list,stacksize);
reference_reset_base(href,voidstackpointertype,NR_STACK_POINTER_REG,0,voidstackpointertype.size,[]);
reference_reset_base(href,voidstackpointertype,NR_STACK_POINTER_REG,0,ctempposinvalid,voidstackpointertype.size,[]);
end
else
reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment,[]);
reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.location^.reference.temppos,cgpara.alignment,[]);
cg.a_loadmm_reg_ref(list,locsize,locsize,l.register,href,mms_movescalar);
end;
LOC_FPUREGISTER:
@ -164,7 +164,7 @@ implementation
cg.a_load_ref_cgpara(list,locsize,l.reference,cgpara)
else
begin
reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment,[]);
reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.location^.reference.temppos,cgpara.alignment,[]);
cg.g_concatcopy(list,l.reference,href,stacksize);
end;
end;
@ -334,7 +334,7 @@ implementation
selfoffsetfromsp:=2*sizeof(aint)
else
selfoffsetfromsp:=sizeof(aint);
reference_reset_base(href,voidstackpointertype,NR_ESP,selfoffsetfromsp+offs,4,[]);
reference_reset_base(href,voidstackpointertype,NR_ESP,selfoffsetfromsp+offs,ctempposinvalid,4,[]);
cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_EAX);
end;
end;
@ -344,7 +344,7 @@ implementation
href : treference;
begin
{ mov 0(%eax),%reg ; load vmt}
reference_reset_base(href,voidpointertype,NR_EAX,0,4,[]);
reference_reset_base(href,voidpointertype,NR_EAX,0,ctempposinvalid,4,[]);
cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,reg);
end;
@ -355,7 +355,7 @@ implementation
if (procdef.extnumber=$ffff) then
Internalerror(200006139);
{ call/jmp vmtoffs(%reg) ; method offs }
reference_reset_base(href,voidpointertype,reg,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),4,[]);
reference_reset_base(href,voidpointertype,reg,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),ctempposinvalid,4,[]);
list.concat(taicpu.op_ref(op,S_L,href));
end;
@ -367,7 +367,7 @@ implementation
if (procdef.extnumber=$ffff) then
Internalerror(200006139);
{ mov vmtoffs(%eax),%eax ; method offs }
reference_reset_base(href,voidpointertype,NR_EAX,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),4,[]);
reference_reset_base(href,voidpointertype,NR_EAX,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),ctempposinvalid,4,[]);
cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_EAX);
end;
@ -412,7 +412,7 @@ implementation
loadvmtto(NR_EAX);
loadmethodoffstoeax;
{ mov %eax,4(%esp) }
reference_reset_base(href,voidstackpointertype,NR_ESP,4,4,[]);
reference_reset_base(href,voidstackpointertype,NR_ESP,4,ctempposinvalid,4,[]);
list.concat(taicpu.op_reg_ref(A_MOV,S_L,NR_EAX,href));
{ pop %eax }
list.concat(taicpu.op_reg(A_POP,S_L,NR_EAX));

4
compiler/i386/n386flw.pas
View File

@ -260,7 +260,7 @@ procedure emit_scope_start(handler,data: TAsmSymbol);
hreg: tregister;
begin
hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_ADDR);
reference_reset_base(href,hreg,0,sizeof(pint),[]);
reference_reset_base(href,hreg,0,ctempposinvalid,sizeof(pint),[]);
href.segment:=NR_FS;
emit_reg_reg(A_XOR,S_L,hreg,hreg);
emit_sym(A_PUSH,S_L,data);
@ -277,7 +277,7 @@ procedure emit_scope_end;
begin
hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_ADDR);
hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_ADDR);
reference_reset_base(href,hreg,0,sizeof(pint),[]);
reference_reset_base(href,hreg,0,ctempposinvalid,sizeof(pint),[]);
href.segment:=NR_FS;
emit_reg_reg(A_XOR,S_L,hreg,hreg);
emit_reg(A_POP,S_L,hreg2);

12
compiler/i8086/cgcpu.pas
View File

@ -1285,7 +1285,7 @@ unit cgcpu;
a_load_reg_reg(list,paraloc^.size,paraloc^.size,r,paraloc^.register);
LOC_REFERENCE,LOC_CREFERENCE:
begin
reference_reset_base(ref,paraloc^.reference.index,paraloc^.reference.offset,2,[]);
reference_reset_base(ref,paraloc^.reference.index,paraloc^.reference.offset,paraloc^.reference.temppos,2,[]);
a_load_reg_ref(list,paraloc^.size,paraloc^.size,r,ref);
end;
else
@ -1478,7 +1478,7 @@ unit cgcpu;
cgpara.check_simple_location;
len:=align(cgpara.intsize,cgpara.alignment);
g_stackpointer_alloc(list,len);
reference_reset_base(href,NR_STACK_POINTER_REG,0,4,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,0,ctempposinvalid,4,[]);
g_concatcopy(list,r,href,len);
end
else
@ -2354,7 +2354,7 @@ unit cgcpu;
{ Restore SP position before SP change }
if current_settings.x86memorymodel=mm_huge then
stacksize:=stacksize + 2;
reference_reset_base(ref,NR_BP,-stacksize,2,[]);
reference_reset_base(ref,NR_BP,-stacksize,ctempposinvalid,2,[]);
list.concat(Taicpu.op_ref_reg(A_LEA,S_W,ref,NR_SP));
sp_moved:=true;
end;
@ -2722,16 +2722,16 @@ unit cgcpu;
list.concat(taicpu.op_reg_reg(A_MOV,S_W,reference.index,NR_DI));
if reference.index=NR_SP then
reference_reset_base(href,NR_DI,reference.offset+return_address_size+2,sizeof(pint),[])
reference_reset_base(href,NR_DI,reference.offset+return_address_size+2,reference.temppos,sizeof(pint),[])
else
reference_reset_base(href,NR_DI,reference.offset+return_address_size,sizeof(pint),[]);
reference_reset_base(href,NR_DI,reference.offset+return_address_size,reference.temppos,sizeof(pint),[]);
href.segment:=NR_SS;
a_op_const_ref(list,OP_SUB,size,ioffset,href);
list.concat(taicpu.op_reg(A_POP,S_W,NR_DI));
end
else
begin
reference_reset_base(href,reference.index,reference.offset+return_address_size,sizeof(pint),[]);
reference_reset_base(href,reference.index,reference.offset+return_address_size,reference.temppos,sizeof(pint),[]);
href.segment:=NR_SS;
a_op_const_ref(list,OP_SUB,size,ioffset,href);
end;

29
compiler/i8086/hlcgcpu.pas
View File

@ -67,7 +67,7 @@ interface
public
function getaddressregister(list:TAsmList;size:tdef):Tregister;override;
procedure reference_reset_base(var ref: treference; regsize: tdef; reg: tregister; offset, alignment: longint; volatility: tvolatilityset); override;
procedure reference_reset_base(var ref: treference; regsize: tdef; reg: tregister; offset: longint; temppos: treftemppos; alignment: longint; volatility: tvolatilityset); override;
function a_call_name(list : TAsmList;pd : tprocdef;const s : TSymStr; const paras: array of pcgpara; forceresdef: tdef; weak: boolean): tcgpara;override;
@ -149,10 +149,10 @@ implementation
(cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
begin
cg.g_stackpointer_alloc(list,stacksize);
reference_reset_base(href,voidstackpointertype,NR_STACK_POINTER_REG,0,voidstackpointertype.size,[]);
reference_reset_base(href,voidstackpointertype,NR_STACK_POINTER_REG,0,ctempposinvalid,voidstackpointertype.size,[]);
end
else
reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment,[]);
reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.location^.reference.temppos,cgpara.alignment,[]);
cg.a_loadfpu_reg_ref(list,locsize,locsize,l.register,href);
end;
LOC_FPUREGISTER:
@ -194,10 +194,10 @@ implementation
(cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
begin
cg.g_stackpointer_alloc(list,stacksize);
reference_reset_base(href,voidstackpointertype,NR_STACK_POINTER_REG,0,voidstackpointertype.size,[]);
reference_reset_base(href,voidstackpointertype,NR_STACK_POINTER_REG,0,ctempposinvalid,voidstackpointertype.size,[]);
end
else
reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment,[]);
reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.location^.reference.temppos,cgpara.alignment,[]);
cg.a_loadmm_reg_ref(list,locsize,locsize,l.register,href,mms_movescalar);
end;
LOC_FPUREGISTER:
@ -223,7 +223,7 @@ implementation
cg.a_load_ref_cgpara(list,locsize,l.reference,cgpara)
else
begin
reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment,[]);
reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.Location^.reference.temppos,cgpara.alignment,[]);
cg.g_concatcopy(list,l.reference,href,stacksize);
end;
end;
@ -266,7 +266,8 @@ implementation
procedure thlcgcpu.reference_reset_base(var ref: treference; regsize: tdef;
reg: tregister; offset, alignment: longint; volatility: tvolatilityset);
reg: tregister; offset: longint; temppos: treftemppos; alignment: longint;
volatility: tvolatilityset);
begin
inherited;
@ -519,7 +520,7 @@ implementation
if current_settings.x86memorymodel in x86_far_code_models then
inc(selfoffsetfromsp,2);
list.concat(taicpu.op_reg_reg(A_mov,S_W,NR_SP,NR_DI));
reference_reset_base(href,voidnearpointertype,NR_DI,selfoffsetfromsp+offs+2,2,[]);
reference_reset_base(href,voidnearpointertype,NR_DI,selfoffsetfromsp+offs+2,ctempposinvalid,2,[]);
if not segment_regs_equal(NR_SS,NR_DS) then
href.segment:=NR_SS;
if current_settings.x86memorymodel in x86_near_data_models then
@ -540,12 +541,12 @@ implementation
{ mov 0(%bx),%bx ; load vmt}
if current_settings.x86memorymodel in x86_near_data_models then
begin
reference_reset_base(href,voidnearpointertype,NR_BX,0,2,[]);
reference_reset_base(href,voidnearpointertype,NR_BX,0,ctempposinvalid,2,[]);
cg.a_load_ref_reg(list,OS_16,OS_16,href,NR_BX);
end
else
begin
reference_reset_base(href,voidnearpointertype,NR_BX,0,2,[]);
reference_reset_base(href,voidnearpointertype,NR_BX,0,ctempposinvalid,2,[]);
href.segment:=NR_ES;
list.concat(taicpu.op_ref_reg(A_LES,S_W,href,NR_BX));
end;
@ -566,12 +567,12 @@ implementation
if current_settings.x86memorymodel in x86_far_code_models then
begin
{ mov vmtseg(%bx),%si ; method seg }
reference_reset_base(href,voidnearpointertype,NR_BX,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber)+2,2,[]);
reference_reset_base(href,voidnearpointertype,NR_BX,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber)+2,ctempposinvalid,2,[]);
href.segment:=srcseg;
cg.a_load_ref_reg(list,OS_16,OS_16,href,NR_SI);
end;
{ mov vmtoffs(%bx),%bx ; method offs }
reference_reset_base(href,voidnearpointertype,NR_BX,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),2,[]);
reference_reset_base(href,voidnearpointertype,NR_BX,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),ctempposinvalid,2,[]);
href.segment:=srcseg;
cg.a_load_ref_reg(list,OS_16,OS_16,href,NR_BX);
end;
@ -625,9 +626,9 @@ implementation
{ set target address
"mov %bx,4(%sp)" }
if current_settings.x86memorymodel in x86_far_code_models then
reference_reset_base(href,voidnearpointertype,NR_DI,6,2,[])
reference_reset_base(href,voidnearpointertype,NR_DI,6,ctempposinvalid,2,[])
else
reference_reset_base(href,voidnearpointertype,NR_DI,4,2,[]);
reference_reset_base(href,voidnearpointertype,NR_DI,4,ctempposinvalid,2,[]);
if not segment_regs_equal(NR_DS,NR_SS) then
href.segment:=NR_SS;
list.concat(taicpu.op_reg_reg(A_MOV,S_W,NR_SP,NR_DI));

2
compiler/i8086/n8086ld.pas
View File

@ -173,7 +173,7 @@ implementation
reference_reset_symbol(href,current_asmdata.WeakRefAsmSymbol(gvs.mangledname,AT_DATA),sizeof(pint),2,[]);
hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,resultdef,voidpointertype,href,hregister);
cg.a_label(current_asmdata.CurrAsmList,endrelocatelab);
hlcg.reference_reset_base(location.reference,voidpointertype,hregister,0,location.reference.alignment,[]);
hlcg.reference_reset_base(location.reference,voidpointertype,hregister,0,ctempposinvalid,location.reference.alignment,[]);
end
else
inherited generate_threadvar_access(gvs);

10
compiler/jvm/hlcgcpu.pas
View File

@ -1033,7 +1033,7 @@ implementation
end;
art_indexref:
begin
cgutils.reference_reset_base(href,ref.indexbase,ref.indexoffset,4,ref.volatility);
cgutils.reference_reset_base(href,ref.indexbase,ref.indexoffset,ref.temppos,4,ref.volatility);
href.symbol:=ref.indexsymbol;
a_load_ref_stack(list,s32inttype,href,prepare_stack_for_ref(list,href,false));
end;
@ -1791,7 +1791,7 @@ implementation
{ passed by reference in array of single element; l contains the
base address of the array }
location_reset_ref(tmploc,LOC_REFERENCE,OS_ADDR,4,ref.volatility);
cgutils.reference_reset_base(tmploc.reference,getaddressregister(list,java_jlobject),0,4,ref.volatility);
cgutils.reference_reset_base(tmploc.reference,getaddressregister(list,java_jlobject),0,tmploc.reference.temppos,4,ref.volatility);
tmploc.reference.arrayreftype:=art_indexconst;
tmploc.reference.indexoffset:=0;
a_load_loc_reg(list,java_jlobject,java_jlobject,l,tmploc.reference.base);
@ -1858,7 +1858,7 @@ implementation
case current_procinfo.procdef.proctypeoption of
potype_unitinit:
begin
cgutils.reference_reset_base(ref,NR_NO,0,1,[]);
cgutils.reference_reset_base(ref,NR_NO,0,ctempposinvalid,1,[]);
if assigned(current_module.globalsymtable) then
allocate_implicit_structs_for_st_with_base_ref(list,current_module.globalsymtable,ref,staticvarsym);
allocate_implicit_structs_for_st_with_base_ref(list,current_module.localsymtable,ref,staticvarsym);
@ -1868,7 +1868,7 @@ implementation
{ also initialise local variables, if any }
inherited;
{ initialise class fields }
cgutils.reference_reset_base(ref,NR_NO,0,1,[]);
cgutils.reference_reset_base(ref,NR_NO,0,ctempposinvalid,1,[]);
allocate_implicit_structs_for_st_with_base_ref(list,tabstractrecorddef(current_procinfo.procdef.owner.defowner).symtable,ref,staticvarsym);
end
else
@ -2418,7 +2418,7 @@ implementation
internalerror(2011033001);
selfreg:=getaddressregister(list,selfpara.vardef);
a_load_loc_reg(list,obj,obj,selfpara.localloc,selfreg);
cgutils.reference_reset_base(ref,selfreg,0,1,[]);
cgutils.reference_reset_base(ref,selfreg,0,ctempposinvalid,1,[]);
allocate_implicit_structs_for_st_with_base_ref(list,obj.symtable,ref,fieldvarsym);
end;

2
compiler/jvm/njvmcnv.pas
View File

@ -831,7 +831,7 @@ implementation
{ store the data in the newly created array }
basereg:=hlcg.getaddressregister(current_asmdata.CurrAsmList,java_jlobject);
thlcgjvm(hlcg).a_load_stack_reg(current_asmdata.CurrAsmList,java_jlobject,basereg);
reference_reset_base(arrayref,basereg,0,4,[]);
reference_reset_base(arrayref,basereg,0,ctempposinvalid,4,[]);
arrayref.arrayreftype:=art_indexconst;
arrayref.indexoffset:=0;
hlcg.a_load_loc_ref(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,arrayref);

2
compiler/jvm/njvmld.pas
View File

@ -288,7 +288,7 @@ procedure tjvmarrayconstructornode.makearrayref(var ref: treference; eledef: tde
{ arrays are implicitly dereferenced }
basereg:=hlcg.getaddressregister(current_asmdata.CurrAsmList,java_jlobject);
hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,java_jlobject,java_jlobject,ref,basereg);
reference_reset_base(ref,basereg,0,1,[]);
reference_reset_base(ref,basereg,0,ctempposinvalid,1,[]);
ref.arrayreftype:=art_indexconst;
ref.indexoffset:=0;
end;

2
compiler/jvm/njvmmem.pas
View File

@ -121,7 +121,7 @@ implementation
kind of pointers) }
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),4,[]);
reference_reset_base(location.reference,left.location.register,0,4,[]);
reference_reset_base(location.reference,left.location.register,0,ctempposinvalid,4,[]);
location.reference.arrayreftype:=art_indexconst;
if (left.nodetype<>addrn) and
not(resultdef.typ in [orddef,floatdef]) and

34
compiler/llvm/hlcgllvm.pas
View File

@ -39,8 +39,6 @@ uses
thlcgllvm = class(thlcgobj)
constructor create;
procedure temp_to_ref(p: ptemprecord; out ref: treference); override;
procedure a_load_ref_cgpara(list: TAsmList; size: tdef; const r: treference; const cgpara: TCGPara); override;
procedure a_load_const_cgpara(list: TAsmList; tosize: tdef; a: tcgint; const cgpara: TCGPara); override;
protected
@ -188,14 +186,6 @@ implementation
end;
procedure thlcgllvm.temp_to_ref(p: ptemprecord; out ref: treference);
begin
{ on the LLVM target, every temp is independent and encoded via a
separate temp register whose superregister number is stored in p^.pos }
reference_reset_base(ref,voidstackpointertype,newreg(R_TEMPREGISTER,p^.pos,R_SUBWHOLE),0,p^.alignment,[]);
end;
procedure thlcgllvm.a_load_ref_cgpara(list: TAsmList; size: tdef; const r: treference; const cgpara: TCGPara);
var
tmpref, initialref, ref: treference;
@ -252,7 +242,7 @@ implementation
begin
if assigned(location^.next) then
internalerror(2010052906);
reference_reset_base(ref,cpointerdef.getreusable(size),location^.reference.index,location^.reference.offset,newalignment(cgpara.alignment,cgpara.intsize-sizeleft),[]);
reference_reset_base(ref,cpointerdef.getreusable(size),location^.reference.index,location^.reference.offset,location^.reference.temppos,newalignment(cgpara.alignment,cgpara.intsize-sizeleft),[]);
if (def_cgsize(size)<>OS_NO) and
(size.size=sizeleft) and
(sizeleft<=sizeof(aint)) then
@ -317,7 +307,7 @@ implementation
begin
reg:=getaddressregister(list,cpointerdef.getreusable(newrefsize));
a_loadaddr_ref_reg(list,refsize,cpointerdef.getreusable(newrefsize),initialref,reg);
reference_reset_base(newref,cpointerdef.getreusable(newrefsize),reg,0,initialref.alignment,initialref.volatility);
reference_reset_base(newref,cpointerdef.getreusable(newrefsize),reg,0,initialref.temppos,initialref.alignment,initialref.volatility);
refsize:=newrefsize;
end
else
@ -468,7 +458,7 @@ implementation
internalerror(2014012307)
else
begin
reference_reset_base(href, cpointerdef.getreusable(callpara^.def), paraloc^.reference.index, paraloc^.reference.offset, paraloc^.def.alignment, []);
reference_reset_base(href, cpointerdef.getreusable(callpara^.def), paraloc^.reference.index, paraloc^.reference.offset, paraloc^.reference.temppos, paraloc^.def.alignment, []);
res:=getregisterfordef(list, paraloc^.def);
load_ref_anyreg(callpara^.def, href, res, callpara);
end;
@ -621,7 +611,7 @@ implementation
{ typecast pointer to memory into pointer to integer type }
hreg:=getaddressregister(list,cpointerdef.getreusable(tosize));
a_loadaddr_ref_reg(list,fromsize,cpointerdef.getreusable(tosize),tmpref,hreg);
reference_reset_base(sref,cpointerdef.getreusable(tosize),hreg,0,tmpref.alignment,tmpref.volatility);
reference_reset_base(sref,cpointerdef.getreusable(tosize),hreg,0,tmpref.temppos,tmpref.alignment,tmpref.volatility);
{ load the integer from the temp into the destination }
a_load_ref_ref(list,tosize,tosize,sref,ref);
tg.ungettemp(list,tmpref);
@ -643,7 +633,7 @@ implementation
begin
hreg2:=getaddressregister(list,cpointerdef.getreusable(fromsize));
a_loadaddr_ref_reg(list,tosize,cpointerdef.getreusable(fromsize),sref,hreg2);
reference_reset_base(sref,cpointerdef.getreusable(fromsize),hreg2,0,sref.alignment,sref.volatility);
reference_reset_base(sref,cpointerdef.getreusable(fromsize),hreg2,0,sref.temppos,sref.alignment,sref.volatility);
tosize:=fromsize;
end;
end
@ -1418,7 +1408,7 @@ implementation
begin
hreg:=getaddressregister(list,todef);
a_loadaddr_ref_reg_intern(list,fromdef,todef,ref,hreg,false);
reference_reset_base(ref,todef,hreg,0,ref.alignment,ref.volatility);
reference_reset_base(ref,todef,hreg,0,ref.temppos,ref.alignment,ref.volatility);
end;
@ -1455,7 +1445,7 @@ implementation
subscriptdef:=cpointerdef.getreusable(currentstructdef);
{ recurse into the first field }
list.concat(taillvm.getelementptr_reg_size_ref_size_const(newbase,subscriptdef,recref,s32inttype,0,true));
reference_reset_base(recref,subscriptdef,newbase,field.offsetfromllvmfield,newalignment(recref.alignment,field.fieldoffset),recref.volatility);
reference_reset_base(recref,subscriptdef,newbase,field.offsetfromllvmfield,recref.temppos,newalignment(recref.alignment,field.fieldoffset),recref.volatility);
{ go to the parent }
currentstructdef:=parentdef;
end;
@ -1469,7 +1459,7 @@ implementation
newbase:=getaddressregister(list,cpointerdef.getreusable(llvmfield.def));
recref:=make_simple_ref(list,recref,recdef);
list.concat(taillvm.getelementptr_reg_size_ref_size_const(newbase,subscriptdef,recref,s32inttype,field.llvmfieldnr,true));
reference_reset_base(recref,subscriptdef,newbase,field.offsetfromllvmfield,newalignment(recref.alignment,llvmfield.fieldoffset+field.offsetfromllvmfield),recref.volatility);
reference_reset_base(recref,subscriptdef,newbase,field.offsetfromllvmfield,recref.temppos,newalignment(recref.alignment,llvmfield.fieldoffset+field.offsetfromllvmfield),recref.volatility);
{ in case of an 80 bits extended type, typecast from an array of 10
bytes (used because otherwise llvm will allocate the ABI-defined
size for extended, which is usually larger) into an extended }
@ -1676,7 +1666,7 @@ implementation
begin
hreg:=getaddressregister(list,cpointerdef.getreusable(llvmparadef));
a_loadaddr_ref_reg(list,vardef,cpointerdef.getreusable(llvmparadef),destloc.reference,hreg);
reference_reset_base(href,cpointerdef.getreusable(llvmparadef),hreg,0,destloc.reference.alignment,destloc.reference.volatility);
reference_reset_base(href,cpointerdef.getreusable(llvmparadef),hreg,0,destloc.reference.temppos,destloc.reference.alignment,destloc.reference.volatility);
end;
index:=0;
ploc:=para.location;
@ -1848,9 +1838,9 @@ implementation
if assigned(ref.symbol) then
reference_reset_symbol(tmpref,ref.symbol,0,ref.alignment,ref.volatility)
else
reference_reset_base(tmpref,ptrdef,ref.base,0,ref.alignment,ref.volatility);
reference_reset_base(tmpref,ptrdef,ref.base,0,ref.temppos,ref.alignment,ref.volatility);
list.concat(taillvm.getelementptr_reg_size_ref_size_const(hreg2,ptrdef,tmpref,ptruinttype,ptrindex,assigned(ref.symbol)));
reference_reset_base(result,ptrdef,hreg2,0,ref.alignment,ref.volatility);
reference_reset_base(result,ptrdef,hreg2,0,ref.temppos,ref.alignment,ref.volatility);
exit;
end;
{ for now, perform all calculations using plain pointer arithmetic. Later
@ -1890,7 +1880,7 @@ implementation
end;
hreg2:=getaddressregister(list,ptrdef);
a_load_reg_reg(list,ptruinttype,ptrdef,hreg1,hreg2);
reference_reset_base(result,ptrdef,hreg2,0,ref.alignment,ref.volatility);
reference_reset_base(result,ptrdef,hreg2,0,ref.temppos,ref.alignment,ref.volatility);
end;

4
compiler/llvm/nllvmcnv.pas
View File

@ -146,7 +146,7 @@ procedure tllvmtypeconvnode.second_pointer_to_array;
{ insert type conversion }
hreg:=hlcg.getaddressregister(current_asmdata.CurrAsmList,cpointerdef.getreusable(resultdef));
hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,tpointerdef(left.resultdef).pointeddef,cpointerdef.getreusable(resultdef),location.reference,hreg);
reference_reset_base(location.reference,hreg,0,location.reference.alignment,location.reference.volatility);
reference_reset_base(location.reference,hreg,0,location.reference.temppos,location.reference.alignment,location.reference.volatility);
end;
@ -284,7 +284,7 @@ procedure tllvmtypeconvnode.second_nothing;
hreg:=hlcg.getaddressregister(current_asmdata.CurrAsmList,cpointerdef.getreusable(resultdef));
hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.resultdef,cpointerdef.getreusable(resultdef),left.location.reference,hreg);
location_reset_ref(location,left.location.loc,left.location.size,left.location.reference.alignment,left.location.reference.volatility);
reference_reset_base(location.reference,hreg,0,location.reference.alignment,location.reference.volatility);
reference_reset_base(location.reference,hreg,0,location.reference.temppos,location.reference.alignment,location.reference.volatility);
end
else
location_copy(location,left.location);

2
compiler/llvm/nllvmcon.pas
View File

@ -86,7 +86,7 @@ implementation
resptrdef:=cpointerdef.getreusable(resultdef);
hreg:=hlcg.getaddressregister(current_asmdata.CurrAsmList,resptrdef);
hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,datadef,resptrdef,location.reference,hreg);
hlcg.reference_reset_base(location.reference,resptrdef,hreg,0,location.reference.alignment,location.reference.volatility);
hlcg.reference_reset_base(location.reference,resptrdef,hreg,0,location.reference.temppos,location.reference.alignment,location.reference.volatility);
end;
end;

4
compiler/llvm/nllvminl.pas
View File

@ -187,7 +187,7 @@ implementation
location_reset_ref(location,left.location.loc,def_cgsize(resultdef),left.location.reference.alignment,left.location.reference.volatility);
hregister:=hlcg.getaddressregister(current_asmdata.CurrAsmList,cpointerdef.getreusable(resultdef));
hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.resultdef,cpointerdef.getreusable(resultdef),left.location.reference,hregister);
hlcg.reference_reset_base(location.reference,cpointerdef.getreusable(resultdef),hregister,0,left.location.reference.alignment,left.location.reference.volatility);
hlcg.reference_reset_base(location.reference,cpointerdef.getreusable(resultdef),hregister,0,left.location.reference.temppos,left.location.reference.alignment,left.location.reference.volatility);
end
else
begin
@ -205,7 +205,7 @@ implementation
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,cpointerdef.getreusable(lendef),OC_EQ,0,left.location.register,nillab);
{ volatility of the ansistring/widestring refers to the volatility of the
string pointer, not of the string data }
hlcg.reference_reset_base(href,cpointerdef.getreusable(lendef),left.location.register,-lendef.size,lendef.alignment,[]);
hlcg.reference_reset_base(href,cpointerdef.getreusable(lendef),left.location.register,-lendef.size,ctempposinvalid,lendef.alignment,[]);
hregister:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,lendef,resultdef,href,hregister);
if is_widestring(left.resultdef) then

2
compiler/llvm/nllvmld.pas
View File

@ -131,7 +131,7 @@ procedure tllvmloadnode.pass_generate_code;
current_asmdata.CurrAsmList.concat(
taillvm.op_reg_tai_size(la_bitcast,selfreg,ai,voidcodepointertype)
);
reference_reset_base(location.reference,selfreg,0,location.reference.alignment,location.reference.volatility);
reference_reset_base(location.reference,selfreg,0,ctempposinvalid,location.reference.alignment,location.reference.volatility);
end;
end;
end;

8
compiler/llvm/nllvmmem.pas
View File

@ -88,7 +88,7 @@ implementation
left.resultdef,
cpointerdef.getreusable(fielddef),
location.reference,newbase);
reference_reset_base(location.reference,newbase,0,location.reference.alignment,location.reference.volatility);
reference_reset_base(location.reference,newbase,0,location.reference.temppos,location.reference.alignment,location.reference.volatility);
result:=false;
end
else
@ -157,7 +157,7 @@ implementation
else
current_asmdata.CurrAsmList.Concat(taillvm.getelementptr_reg_size_ref_size_const(hreg,left.resultdef,
locref^,ptruinttype,constarrayoffset,false));
reference_reset_base(locref^,hreg,0,locref^.alignment,locref^.volatility);
reference_reset_base(locref^,hreg,0,locref^.temppos,locref^.alignment,locref^.volatility);
end;
{ see comment in getarrelementptrdef }
@ -216,7 +216,7 @@ implementation
{ the array is already a pointer -> just index }
current_asmdata.CurrAsmList.Concat(taillvm.getelementptr_reg_size_ref_size_reg(hreg,left.resultdef,
location.reference,ptruinttype,maybe_const_reg,false));
reference_reset_base(location.reference,hreg,0,location.reference.alignment,location.reference.volatility);
reference_reset_base(location.reference,hreg,0,location.reference.temppos,location.reference.alignment,location.reference.volatility);
location.reference.alignment:=newalignment(location.reference.alignment,l);
end;
@ -278,7 +278,7 @@ implementation
current_asmdata.CurrAsmList.Concat(taillvm.getelementptr_reg_size_ref_size_reg(basereg,cpointerdef.getreusable(left.resultdef),
sref.ref,ptruinttype,offsetreg,true));
arraytopointerconverted:=true;
reference_reset_base(sref.ref,basereg,0,sref.ref.alignment,sref.ref.volatility);
reference_reset_base(sref.ref,basereg,0,sref.ref.temppos,sref.ref.alignment,sref.ref.volatility);
{ calculate the bit index inside that chunk: mask out
the chunk index part }
hreg2:=hlcg.getintregister(current_asmdata.CurrAsmList,ptruinttype);

13
compiler/llvm/tgllvm.pas
View File

@ -64,6 +64,7 @@ unit tgllvm;
destructor destroy; override;
procedure setfirsttemp(l: asizeint); override;
function istemp(const ref: treference): boolean; override;
procedure temp_to_ref(p: ptemprecord; out ref: treference); override;
procedure getlocal(list: TAsmList; size: asizeint; alignment: shortint; def: tdef; var ref: treference); override;
procedure gethltemp(list: TAsmList; def: tdef; forcesize: asizeint; temptype: ttemptype; out ref: treference); override;
procedure ungetiftemp(list: TAsmList; const ref: treference); override;
@ -90,9 +91,10 @@ implementation
procedure ttgllvm.alloctemp(list: TAsmList; size: asizeint; alignment: shortint; temptype: ttemptype; def: tdef; fini: boolean; out ref: treference);
var
tl: ptemprecord;
reg: tregister;
oldfileinfo: tfileposinfo;
begin
reference_reset_base(ref,cg.gettempregister(list),0,alignment,[]);
reg:=cg.gettempregister(list);
new(tl);
tl^.temptype:=temptype;
@ -104,6 +106,7 @@ implementation
tl^.next:=templist;
tl^.nextfree:=nil;
templist:=tl;
temp_to_ref(tl,ref);
list.concat(tai_tempalloc.alloc(tl^.pos,tl^.size));
{ TODO: add llvm.lifetime.start() for this allocation and afterwards
llvm.lifetime.end() for freetemp (if the llvm version supports it) }
@ -141,6 +144,14 @@ implementation
end;
procedure ttgllvm.temp_to_ref(p: ptemprecord; out ref: treference);
begin
{ on the LLVM target, every temp is independent and encoded via a
separate temp register whose superregister number is stored in p^.pos }
reference_reset_base(ref,voidstackpointertype,newreg(R_TEMPREGISTER,p^.pos,R_SUBWHOLE),0,p^.alignment,[]);
end;
constructor ttgllvm.create;
begin
inherited create;

4
compiler/m68k/aoptcpu.pas
View File

@ -291,9 +291,9 @@ unit aoptcpu;
begin
DebugMsg('Optimizer: SUB/ADD #val,Ax to LEA val(Ax),Ax',p);
if taicpu(p).opcode in [A_SUB,A_SUBA] then
reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,-taicpu(p).oper[0]^.val,0,[])
reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,-taicpu(p).oper[0]^.val,ctempposinvalid,0,[])
else
reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,taicpu(p).oper[0]^.val,0,[]);
reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,taicpu(p).oper[0]^.val,ctempposinvalid,0,[]);
taicpu(p).opcode:=A_LEA;
taicpu(p).loadref(0,tmpref);
result:=true;

40
compiler/m68k/cgcpu.pas
View File

@ -302,7 +302,7 @@ unit cgcpu;
else
pushsize:=int_cgsize(cgpara.alignment);
reference_reset_base(ref, NR_STACK_POINTER_REG, 0, cgpara.alignment, []);
reference_reset_base(ref, NR_STACK_POINTER_REG, 0, ctempposinvalid ,cgpara.alignment, []);
ref.direction := dir_dec;
list.concat(taicpu.op_reg_ref(A_MOVE,tcgsize2opsize[pushsize],makeregsize(list,r,pushsize),ref));
end
@ -324,7 +324,7 @@ unit cgcpu;
else
pushsize:=int_cgsize(cgpara.alignment);
reference_reset_base(ref, NR_STACK_POINTER_REG, 0, cgpara.alignment, []);
reference_reset_base(ref, NR_STACK_POINTER_REG, 0, ctempposinvalid, cgpara.alignment, []);
ref.direction := dir_dec;
a_load_const_ref(list, pushsize, a, ref);
end
@ -365,7 +365,7 @@ unit cgcpu;
else
pushsize:=int_cgsize(cgpara.alignment);
reference_reset_base(ref, NR_STACK_POINTER_REG, 0, tcgsize2size[pushsize], []);
reference_reset_base(ref, NR_STACK_POINTER_REG, 0, ctempposinvalid, tcgsize2size[pushsize], []);
ref.direction := dir_dec;
a_load_ref_ref(list,int_cgsize(tcgsize2size[paraloc^.size]),pushsize,href,ref);
@ -389,7 +389,7 @@ unit cgcpu;
ofs:=0;
if (cgpara.intsize<cgpara.alignment) then
ofs:=cgpara.alignment-cgpara.intsize;
reference_reset_base(href,NR_STACK_POINTER_REG,ofs,cgpara.alignment,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,ofs,ctempposinvalid,cgpara.alignment,[]);
g_concatcopy(list,r,href,cgpara.intsize);
end
else
@ -485,7 +485,7 @@ unit cgcpu;
begin
//list.concat(tai_comment.create(strpnew('fixref: base is dX, resolving with reverse regs')));
reference_reset_base(href,ref.index,0,ref.alignment,ref.volatility);
reference_reset_base(href,ref.index,0,ref.temppos,ref.alignment,ref.volatility);
href.index:=ref.base;
{ we can fold in an 8 bit offset "for free" }
if isvalue8bit(ref.offset) then
@ -523,7 +523,7 @@ unit cgcpu;
if isvalue16bit(ref.offset) then
begin
reference_reset_base(href,ref.base,ref.offset,ref.alignment,ref.volatility);
reference_reset_base(href,ref.base,ref.offset,ref.temppos,ref.alignment,ref.volatility);
list.concat(taicpu.op_ref_reg(A_LEA,S_L,href,hreg));
end
else
@ -637,13 +637,13 @@ unit cgcpu;
if isaddressregister(reg) then
begin
{ if we have an address register, we can jump to the address directly }
reference_reset_base(tmpref,reg,0,4,[]);
reference_reset_base(tmpref,reg,0,ctempposinvalid,4,[]);
end
else
begin
{ if we have a data register, we need to move it to an address register first }
tmpreg:=getaddressregister(list);
reference_reset_base(tmpref,tmpreg,0,4,[]);
reference_reset_base(tmpref,tmpreg,0,ctempposinvalid,4,[]);
instr:=taicpu.op_reg_reg(A_MOVE,S_L,reg,tmpreg);
add_move_instruction(instr);
list.concat(instr);
@ -812,7 +812,7 @@ unit cgcpu;
tmpref:=ref;
inc(tmpref.offset,tcgsize2size[tosize]-1);
a_loadaddr_ref_reg(list,tmpref,tmpreg2);
reference_reset_base(tmpref,tmpreg2,0,1,ref.volatility);
reference_reset_base(tmpref,tmpreg2,0,ctempposinvalid,1,ref.volatility);
tmpref.direction:=dir_none;
tmpreg:=getintregister(list,tosize);
@ -991,7 +991,7 @@ unit cgcpu;
tmpreg2:=getaddressregister(list);
a_loadaddr_ref_reg(list,ref,tmpreg2);
reference_reset_base(tmpref,tmpreg2,0,1,ref.volatility);
reference_reset_base(tmpref,tmpreg2,0,ctempposinvalid,1,ref.volatility);
tmpref.direction:=dir_inc;
if isaddressregister(register) then
@ -1084,7 +1084,7 @@ unit cgcpu;
if use_push(cgpara) and (current_settings.fputype in [fpu_68881,fpu_coldfire]) then
begin
cgpara.check_simple_location;
reference_reset_base(ref, NR_STACK_POINTER_REG, 0, cgpara.alignment, []);
reference_reset_base(ref, NR_STACK_POINTER_REG, 0, ctempposinvalid, cgpara.alignment, []);
ref.direction := dir_dec;
list.concat(taicpu.op_reg_ref(A_FMOVE,tcgsize2opsize[cgpara.location^.size],reg,ref));
end
@ -1118,7 +1118,7 @@ unit cgcpu;
begin
//list.concat(tai_comment.create(strpnew('a_loadfpu_ref_cgpara copy')));
cgpara.check_simple_location;
reference_reset_base(href, NR_STACK_POINTER_REG, 0, cgpara.alignment, []);
reference_reset_base(href, NR_STACK_POINTER_REG, 0, ctempposinvalid, cgpara.alignment, []);
href.direction := dir_dec;
case size of
OS_F64:
@ -1738,12 +1738,12 @@ unit cgcpu;
hregister := getintregister(list,OS_INT);
iregister:=getaddressregister(list);
reference_reset_base(srcref,iregister,0,source.alignment,source.volatility);
reference_reset_base(srcref,iregister,0,source.temppos,source.alignment,source.volatility);
srcrefp:=srcref;
srcrefp.direction := dir_inc;
jregister:=getaddressregister(list);
reference_reset_base(dstref,jregister,0,dest.alignment,dest.volatility);
reference_reset_base(dstref,jregister,0,dest.temppos,dest.alignment,dest.volatility);
dstrefp:=dstref;
dstrefp.direction := dir_inc;
@ -1900,7 +1900,7 @@ unit cgcpu;
hregister:=NR_A1;
cg.a_reg_alloc(list,hregister);
reference_reset_base(ref,NR_STACK_POINTER_REG,0,4,[]);
reference_reset_base(ref,NR_STACK_POINTER_REG,0,ctempposinvalid,4,[]);
list.concat(taicpu.op_ref_reg(A_MOVE,S_L,ref,hregister));
{ instead of using a postincrement above (which also writes the }
@ -1915,11 +1915,11 @@ unit cgcpu;
list.concat(taicpu.op_const_reg(A_ADDQ,S_L,parasize,r))
else { nope ... }
begin
reference_reset_base(ref2,NR_STACK_POINTER_REG,parasize,4,[]);
reference_reset_base(ref2,NR_STACK_POINTER_REG,parasize,ctempposinvalid,4,[]);
list.concat(taicpu.op_ref_reg(A_LEA,S_NO,ref2,r));
end;
reference_reset_base(ref,hregister,0,4,[]);
reference_reset_base(ref,hregister,0,ctempposinvalid,4,[]);
list.concat(taicpu.op_ref(A_JMP,S_NO,ref));
end;
end
@ -2025,7 +2025,7 @@ unit cgcpu;
begin
list.concat(taicpu.op_reg_reg(A_MOVE,S_L,href.base,NR_A0));
list.concat(taicpu.op_const_reg(A_ADDA,S_L,href.offset,NR_A0));
reference_reset_base(href,NR_A0,0,sizeof(pint),[]);
reference_reset_base(href,NR_A0,0,ctempposinvalid,sizeof(pint),[]);
end;
if size > 0 then
@ -2119,7 +2119,7 @@ unit cgcpu;
begin
list.concat(taicpu.op_reg_reg(A_MOVE,S_L,href.base,NR_A0));
list.concat(taicpu.op_const_reg(A_ADDA,S_L,href.offset,NR_A0));
reference_reset_base(href,NR_A0,0,sizeof(pint),[]);
reference_reset_base(href,NR_A0,0,ctempposinvalid,sizeof(pint),[]);
end;
if size > 0 then
@ -2286,7 +2286,7 @@ unit cgcpu;
begin
{ offset in the wrapper needs to be adjusted for the stored
return address }
reference_reset_base(href,reference.index,reference.offset+sizeof(pint),sizeof(pint),[]);
reference_reset_base(href,reference.index,reference.offset+sizeof(pint),ctempposinvalid,sizeof(pint),[]);
{ plain 68k could use SUBI on href directly, but this way it works on Coldfire too
and it's probably smaller code for the majority of cases (if ioffset small, the
load will use MOVEQ) (KB) }

16
compiler/m68k/hlcgcpu.pas
View File

@ -122,7 +122,7 @@ implementation
href: treference;
begin
{ move a0 which is self out of the way to the stack }
reference_reset_base(href,voidpointertype,NR_STACK_POINTER_REG,offs,4,[]);
reference_reset_base(href,voidpointertype,NR_STACK_POINTER_REG,offs,ctempposinvalid,4,[]);
list.concat(taicpu.op_reg_ref(A_MOVE,S_L,NR_A0,href));
end;
@ -138,7 +138,7 @@ implementation
selfoffsetfromsp:=sizeof(aint)
else
selfoffsetfromsp:=0;
reference_reset_base(href, voidstackpointertype, NR_SP,selfoffsetfromsp+offs,4,[]);
reference_reset_base(href, voidstackpointertype, NR_SP,selfoffsetfromsp+offs,ctempposinvalid,4,[]);
cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_A0);
end;
@ -147,7 +147,7 @@ implementation
href : treference;
begin
{ move.l (%a0),%a0 ; load vmt}
reference_reset_base(href, voidpointertype, NR_A0,0,4,[]);
reference_reset_base(href, voidpointertype, NR_A0,0,ctempposinvalid,4,[]);
cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_A0);
end;
@ -158,7 +158,7 @@ implementation
begin
if (procdef.extnumber=$ffff) then
internalerror(2017061401);
reference_reset_base(href,voidpointertype,NR_A0,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),4,[]);
reference_reset_base(href,voidpointertype,NR_A0,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),ctempposinvalid,4,[]);
{ handle-too-large-for-68k offsets }
{ I'm not even sure this is handled elsewhere in the compiler for VMTs, but lets play safe... (KB) }
@ -169,12 +169,12 @@ implementation
end;
{ push the method address to the stack }
reference_reset_base(href2,voidpointertype,NR_STACK_POINTER_REG,0,4,[]);
reference_reset_base(href2,voidpointertype,NR_STACK_POINTER_REG,0,ctempposinvalid,4,[]);
href2.direction:=dir_dec;
list.concat(taicpu.op_ref_ref(A_MOVE,S_L,href,href2));
{ restore A0 from the stack }
reference_reset_base(href2,voidpointertype,NR_STACK_POINTER_REG,offs+4,4,[]); { offs+4, because we used dir_dec above }
reference_reset_base(href2,voidpointertype,NR_STACK_POINTER_REG,offs+4,ctempposinvalid,4,[]); { offs+4, because we used dir_dec above }
list.concat(taicpu.op_ref_reg(A_MOVE,S_L,href2,NR_A0));
{ pop the method address from the stack, and jump to it }
@ -187,9 +187,9 @@ implementation
begin
if (procdef.extnumber=$ffff) then
Internalerror(2013100701);
reference_reset_base(href,voidpointertype,NR_A0,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),4,[]);
reference_reset_base(href,voidpointertype,NR_A0,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),ctempposinvalid,4,[]);
list.concat(taicpu.op_ref_reg(A_MOVE,S_L,href,NR_A0));
reference_reset_base(href,voidpointertype,NR_A0,0,4,[]);
reference_reset_base(href,voidpointertype,NR_A0,0,ctempposinvalid,4,[]);
list.concat(taicpu.op_ref(A_JMP,S_NO,href));
end;

4
compiler/m68k/n68kcal.pas
View File

@ -74,7 +74,7 @@ implementation
begin
if po_syscall in tprocdef(procdefinition).procoptions then
begin
reference_reset_base(tmpref,NR_SP,0,2,[]);
reference_reset_base(tmpref,NR_SP,0,ctempposinvalid,2,[]);
tmpref.direction:=dir_dec;
current_asmdata.CurrAsmList.concat(taicpu.op_const_ref(A_MOVE,S_W,tprocdef(procdefinition).import_nr,tmpref));
current_asmdata.CurrAsmList.concat(taicpu.op_const(A_TRAP,S_NO,tprocdef(procdefinition).extnumber));
@ -92,7 +92,7 @@ implementation
not used as FP on Amiga any more (we use A5), so we don't need to
save it. (KB)
http://amigadev.elowar.com/read/ADCD_2.1/Libraries_Manual_guide/node0290.html }
reference_reset_base(tmpref,NR_A6,-tprocdef(procdefinition).extnumber,4,[]);
reference_reset_base(tmpref,NR_A6,-tprocdef(procdefinition).extnumber,ctempposinvalid,4,[]);
current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_JSR,S_NO,tmpref));
end
else

2
compiler/m68k/n68kmem.pas
View File

@ -112,7 +112,7 @@ implementation
begin
hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
reference_reset_base(location.reference,hreg,0,location.reference.alignment,location.reference.volatility);
reference_reset_base(location.reference,hreg,0,location.reference.temppos,location.reference.alignment,location.reference.volatility);
{ insert new index register }
location.reference.index:=maybe_const_reg;
if (scaled) then

4
compiler/m68k/rgcpu.pas
View File

@ -73,7 +73,7 @@ unit rgcpu;
{$endif}
helplist.concat(taicpu.op_const_reg(A_MOVE,S_L,spilltemp.offset,hreg));
reference_reset_base(tmpref,spilltemp.base,0,sizeof(aint),[]);
reference_reset_base(tmpref,spilltemp.base,0,spilltemp.temppos,sizeof(aint),[]);
tmpref.index:=hreg;
helpins:=spilling_create_load(tmpref,tempreg);
@ -105,7 +105,7 @@ unit rgcpu;
{$endif}
helplist.concat(taicpu.op_const_reg(A_MOVE,S_L,spilltemp.offset,hreg));
reference_reset_base(tmpref,spilltemp.base,0,sizeof(aint),[]);
reference_reset_base(tmpref,spilltemp.base,0,spilltemp.temppos,sizeof(aint),[]);
tmpref.index:=hreg;
helplist.concat(spilling_create_store(tempreg,tmpref));

2
compiler/mips/cgcpu.pas
View File

@ -320,7 +320,7 @@ begin
LOC_REFERENCE:
begin
paraloc.check_simple_location;
reference_reset_base(href2,paraloc.location^.reference.index,paraloc.location^.reference.offset,paraloc.alignment,[]);
reference_reset_base(href2,paraloc.location^.reference.index,paraloc.location^.reference.offset,paraloc.location^.reference.temppos,paraloc.alignment,[]);
{ concatcopy should choose the best way to copy the data }
g_concatcopy(list,ref,href2,tcgsize2size[size]);
end;

4
compiler/mips/hlcgcpu.pas
View File

@ -245,7 +245,7 @@ implementation
if IsVirtual then
begin
{ load VMT pointer }
reference_reset_base(href,voidpointertype,paraloc^.register,0,sizeof(aint),[]);
reference_reset_base(href,voidpointertype,paraloc^.register,0,ctempposinvalid,sizeof(aint),[]);
list.concat(taicpu.op_reg_ref(A_LW,NR_VMT,href));
if (procdef.extnumber=$ffff) then
@ -253,7 +253,7 @@ implementation
{ TODO: case of large VMT is not handled }
{ We have no reason not to use $t9 even in non-PIC mode. }
reference_reset_base(href, voidpointertype, NR_VMT, tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber), sizeof(aint), []);
reference_reset_base(href, voidpointertype, NR_VMT, tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber), ctempposinvalid, sizeof(aint), []);
list.concat(taicpu.op_reg_ref(A_LW,NR_PIC_FUNC,href));
list.concat(taicpu.op_reg(A_JR, NR_PIC_FUNC));
end

4
compiler/mips/rgcpu.pas
View File

@ -81,7 +81,7 @@ implementation
helplist.concat(taicpu.op_reg_reg_const(A_ORI,hreg,hreg,spilltemp.offset and $FFFF));
helplist.concat(taicpu.op_reg_reg_reg(A_ADDU,hreg,hreg,spilltemp.base));
reference_reset_base(tmpref,hreg,0,sizeof(aint),[]);
reference_reset_base(tmpref,hreg,0,spilltemp.temppos,sizeof(aint),[]);
helpins:=spilling_create_load(tmpref,tempreg);
helplist.concat(helpins);
@ -112,7 +112,7 @@ implementation
helplist.concat(taicpu.op_reg_reg_const(A_ORI,hreg,hreg,spilltemp.offset and $FFFF));
helplist.concat(taicpu.op_reg_reg_reg(A_ADDU,hreg,hreg,spilltemp.base));
reference_reset_base(tmpref,hreg,0,sizeof(aint),[]);
reference_reset_base(tmpref,hreg,0,spilltemp.temppos,sizeof(aint),[]);
helplist.concat(spilling_create_store(tempreg,tmpref));
if getregtype(tempreg)=R_INTREGISTER then

6
compiler/ncgbas.pas
View File

@ -166,7 +166,7 @@ interface
op.typ:=top_ref;
new(op.ref);
reference_reset_base(op.ref^,indexreg,sym.localloc.reference.offset+sofs,
newalignment(sym.localloc.reference.alignment,sofs),[]);
sym.localloc.reference.temppos,newalignment(sym.localloc.reference.alignment,sofs),[]);
{$ifdef x86}
op.ref^.segment:=segment;
{$endif x86}
@ -177,7 +177,7 @@ interface
op.typ:=top_ref;
new(op.ref);
reference_reset_base(op.ref^,sym.localloc.reference.base,sym.localloc.reference.offset+sofs,
newalignment(sym.localloc.reference.alignment,sofs),[]);
sym.localloc.reference.temppos,newalignment(sym.localloc.reference.alignment,sofs),[]);
op.ref^.index:=indexreg;
{$ifdef x86}
op.ref^.segment:=segment;
@ -201,7 +201,7 @@ interface
op.typ:=top_ref;
new(op.ref);
{ no idea about the actual alignment }
reference_reset_base(op.ref^,sym.localloc.register,sofs,1,[]);
reference_reset_base(op.ref^,sym.localloc.register,sofs,ctempposinvalid,1,[]);
op.ref^.index:=indexreg;
{$ifdef x86}
op.ref^.scalefactor:=scale;

12
compiler/ncgcal.pas
View File

@ -457,12 +457,12 @@ implementation
case libparaloc^.loc of
LOC_REGISTER:
reference_reset_base(tmpref,libparaloc^.register,-tprocdef(procdefinition).extnumber,sizeof(pint),[]);
reference_reset_base(tmpref,libparaloc^.register,-tprocdef(procdefinition).extnumber,ctempposinvalid,sizeof(pint),[]);
LOC_REFERENCE:
begin
reference_reset_base(tmpref,libparaloc^.reference.index,libparaloc^.reference.offset,sizeof(pint),[]);
reference_reset_base(tmpref,libparaloc^.reference.index,libparaloc^.reference.offset,ctempposinvalid,sizeof(pint),[]);
cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,tmpref,reg);
reference_reset_base(tmpref,reg,-tprocdef(procdefinition).extnumber,sizeof(pint),[]);
reference_reset_base(tmpref,reg,-tprocdef(procdefinition).extnumber,ctempposinvalid,sizeof(pint),[]);
end;
else
begin
@ -500,7 +500,7 @@ implementation
literaldef:=get_block_literal_type_for_proc(tabstractprocdef(right.resultdef));
hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,cpointerdef.getreusable(literaldef),true);
{ load the invoke pointer }
hlcg.reference_reset_base(href,right.resultdef,right.location.register,0,right.resultdef.alignment,[]);
hlcg.reference_reset_base(href,right.resultdef,right.location.register,0,ctempposinvalid,right.resultdef.alignment,[]);
callprocdef:=cprocvardef.getreusableprocaddr(procdefinition);
toreg:=hlcg.getaddressregister(current_asmdata.CurrAsmList,callprocdef);
hlcg.g_load_field_reg_by_name(current_asmdata.CurrAsmList,literaldef,callprocdef,'INVOKE',href,toreg);
@ -798,12 +798,12 @@ implementation
((tmpparaloc^.loc<>LOC_REFERENCE) or
assigned(tmpparaloc^.next)) then
internalerror(200501281);
reference_reset_base(href,callerparaloc^.reference.index,callerparaloc^.reference.offset,calleralignment,[]);
reference_reset_base(href,callerparaloc^.reference.index,callerparaloc^.reference.offset,callerparaloc^.reference.temppos,calleralignment,[]);
{ copy parameters in case they were moved to a temp. location because we've a fixed stack }
case tmpparaloc^.loc of
LOC_REFERENCE:
begin
reference_reset_base(htempref,tmpparaloc^.reference.index,tmpparaloc^.reference.offset,tmpalignment,[]);
reference_reset_base(htempref,tmpparaloc^.reference.index,tmpparaloc^.reference.offset,tmpparaloc^.reference.temppos,tmpalignment,[]);
{ use concatcopy, because it can also be a float which fails when
load_ref_ref is used }
if (ppn.tempcgpara.size <> OS_NO) then

4
compiler/ncgcnv.pas
View File

@ -388,7 +388,7 @@ interface
end
else
{$endif}
hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment,location.reference.volatility);
hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,ctempposinvalid,location.reference.alignment,location.reference.volatility);
end;
LOC_REFERENCE,
LOC_CREFERENCE,
@ -399,7 +399,7 @@ interface
LOC_CSUBSETREF:
begin
hlcg.reference_reset_base(location.reference,left.resultdef,
hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment,[]);
hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,ctempposinvalid,location.reference.alignment,[]);
hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,
location.reference.base);
if left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then

6
compiler/ncginl.pas
View File

@ -275,7 +275,7 @@ implementation
lendef:=ossinttype;
{ volatility of the ansistring/widestring refers to the volatility of the
string pointer, not of the string data }
hlcg.reference_reset_base(href,left.resultdef,left.location.register,-lendef.size,lendef.alignment,[]);
hlcg.reference_reset_base(href,left.resultdef,left.location.register,-lendef.size,ctempposinvalid,lendef.alignment,[]);
{ if the string pointer is nil, the length is 0 -> reuse the register
that originally held the string pointer for the length, so that we
can keep the original nil/0 as length in that case }
@ -764,14 +764,14 @@ implementation
begin
location_reset(location,LOC_REGISTER,OS_ADDR);
location.register:=cg.getaddressregister(current_asmdata.currasmlist);
reference_reset_base(frame_ref,NR_STACK_POINTER_REG,{current_procinfo.calc_stackframe_size}tg.lasttemp,sizeof(pint),[]);
reference_reset_base(frame_ref,NR_STACK_POINTER_REG,{current_procinfo.calc_stackframe_size}tg.lasttemp,ctempposinvalid,sizeof(pint),[]);
cg.a_load_ref_reg(current_asmdata.currasmlist,OS_ADDR,OS_ADDR,frame_ref,location.register);
end
else
begin
location_reset(location,LOC_REGISTER,OS_ADDR);
location.register:=cg.getaddressregister(current_asmdata.currasmlist);
reference_reset_base(frame_ref,current_procinfo.framepointer,sizeof(pint),sizeof(pint),[]);
reference_reset_base(frame_ref,current_procinfo.framepointer,sizeof(pint),ctempposinvalid,sizeof(pint),[]);
cg.a_load_ref_reg(current_asmdata.currasmlist,OS_ADDR,OS_ADDR,frame_ref,location.register);
end;
end;

18
compiler/ncgld.pas
View File

@ -244,7 +244,7 @@ implementation
internalerror(200309286);
if lvs.localloc.loc<>LOC_REFERENCE then
internalerror(200409241);
hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,lvs.localloc.reference.offset,lvs.localloc.reference.alignment,lvs.localloc.reference.volatility);
hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,lvs.localloc.reference.offset,lvs.localloc.reference.temppos,lvs.localloc.reference.alignment,lvs.localloc.reference.volatility);
end;
@ -345,7 +345,7 @@ implementation
tv_rec,
tfieldvarsym(tv_index_field),href);
if size_opt then
hlcg.reference_reset_base(href,tfieldvarsym(tv_index_field).vardef,hreg_tv_rec,href.offset,href.alignment,[]);
hlcg.reference_reset_base(href,tfieldvarsym(tv_index_field).vardef,hreg_tv_rec,href.offset,href.temppos,href.alignment,[]);
hlcg.a_load_ref_cgpara(current_asmdata.CurrAsmList,tfieldvarsym(tv_index_field).vardef,href,paraloc1);
{ Dealloc the threadvar record register before calling the helper function to allow }
{ the register allocator to assign non-mandatory real registers for hreg_tv_rec. }
@ -378,11 +378,11 @@ implementation
{ load in the same "hregister" as above, so after this sequence
the address of the threadvar is always in hregister }
if size_opt then
hlcg.reference_reset_base(href,fieldptrdef,hreg_tv_rec,href.offset,href.alignment,[]);
hlcg.reference_reset_base(href,fieldptrdef,hreg_tv_rec,href.offset,href.temppos,href.alignment,[]);
hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,resultdef,fieldptrdef,href,hregister);
hlcg.a_label(current_asmdata.CurrAsmList,endrelocatelab);
hlcg.reference_reset_base(location.reference,fieldptrdef,hregister,0,resultdef.alignment,[]);
hlcg.reference_reset_base(location.reference,fieldptrdef,hregister,0,ctempposinvalid,resultdef.alignment,[]);
end;
end;
@ -474,7 +474,7 @@ implementation
else
location.reference.symbol:=current_asmdata.WeakRefAsmSymbol(tstaticvarsym(symtableentry).mangledname,AT_DATA);
cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,location.reference,hregister);
reference_reset_base(location.reference,hregister,0,location.reference.alignment,[]);
reference_reset_base(location.reference,hregister,0,ctempposinvalid,location.reference.alignment,[]);
end
{ Thread variable }
else if (vo_is_thread_var in gvs.varoptions) then
@ -530,7 +530,7 @@ implementation
location_reset_ref(location,LOC_REFERENCE,newsize,resultdef.alignment,[])
else
location_reset_ref(location,LOC_REFERENCE,newsize,1,[]);
hlcg.reference_reset_base(location.reference,voidpointertype,hregister,0,location.reference.alignment,[]);
hlcg.reference_reset_base(location.reference,voidpointertype,hregister,0,ctempposinvalid,location.reference.alignment,[]);
end;
{ make const a LOC_CREFERENCE }
@ -607,7 +607,7 @@ implementation
assigned(tobjectdef(left.resultdef).vmt_field) then
begin
{ vmt pointer is a pointer to the vmt record }
hlcg.reference_reset_base(href,vd,location.registerhi,0,vd.alignment,[]);
hlcg.reference_reset_base(href,vd,location.registerhi,0,ctempposinvalid,vd.alignment,[]);
vmtdef:=cpointerdef.getreusable(tobjectdef(left.resultdef).vmt_def);
hlcg.g_set_addr_nonbitpacked_field_ref(current_asmdata.CurrAsmList,tobjectdef(left.resultdef),tfieldvarsym(tobjectdef(left.resultdef).vmt_field),href);
hregister:=hlcg.getaddressregister(current_asmdata.CurrAsmList,vmtdef);
@ -623,7 +623,7 @@ implementation
else if is_any_interface_kind(left.resultdef) then
begin
{ an interface is a pointer to a pointer to a vmt }
hlcg.reference_reset_base(href,vd,location.registerhi,0,vd.alignment,[]);
hlcg.reference_reset_base(href,vd,location.registerhi,0,ctempposinvalid,vd.alignment,[]);
vmtdef:=cpointerdef.getreusable(tobjectdef(left.resultdef).vmt_def);
hregister:=hlcg.getaddressregister(current_asmdata.CurrAsmList,vmtdef);
hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,vmtdef,vmtdef,href,hregister);
@ -633,7 +633,7 @@ implementation
{ load method address }
vmtentry:=tabstractrecordsymtable(trecorddef(vmtdef.pointeddef).symtable).findfieldbyoffset(
tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber));
hlcg.reference_reset_base(href,vmtdef,hregister,0,vmtdef.alignment,[]);
hlcg.reference_reset_base(href,vmtdef,hregister,0,ctempposinvalid,vmtdef.alignment,[]);
location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,vmtentry.vardef);
hlcg.g_set_addr_nonbitpacked_field_ref(current_asmdata.CurrAsmList,tabstractrecorddef(vmtdef.pointeddef),vmtentry,href);
hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,vmtentry.vardef,vmtentry.vardef,href,location.register);

18
compiler/ncgmem.pas
View File

@ -192,7 +192,7 @@ implementation
if hsym.localloc.loc<>LOC_REFERENCE then
internalerror(200309283);
hlcg.reference_reset_base(href,parentfpvoidpointertype,location.register,hsym.localloc.reference.offset,parentfpvoidpointertype.alignment,[]);
hlcg.reference_reset_base(href,parentfpvoidpointertype,location.register,hsym.localloc.reference.offset,ctempposinvalid,parentfpvoidpointertype.alignment,[]);
hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,href,location.register);
end;
end;
@ -372,7 +372,7 @@ implementation
end
else
{$endif}
hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment,location.reference.volatility);
hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,ctempposinvalid,location.reference.alignment,location.reference.volatility);
end;
LOC_CREFERENCE,
LOC_REFERENCE,
@ -383,7 +383,7 @@ implementation
LOC_CSUBSETREF:
begin
hlcg.reference_reset_base(location.reference,left.resultdef,
hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment,location.reference.volatility);
hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,ctempposinvalid,location.reference.alignment,location.reference.volatility);
hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
end;
LOC_CONSTANT:
@ -667,7 +667,7 @@ implementation
begin
hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
reference_reset_base(location.reference,hreg,0,location.reference.alignment,location.reference.volatility);
reference_reset_base(location.reference,hreg,0,location.reference.temppos,location.reference.alignment,location.reference.volatility);
{ insert new index register }
location.reference.index:=maybe_const_reg;
end;
@ -901,17 +901,17 @@ implementation
LOC_REGISTER,
LOC_CREGISTER :
begin
hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment,[]);
hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,ctempposinvalid,location.reference.alignment,[]);
end;
LOC_CREFERENCE,
LOC_REFERENCE :
begin
hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment,[]);
hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,ctempposinvalid,location.reference.alignment,[]);
hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location.reference,location.reference.base);
end;
LOC_CONSTANT:
begin
hlcg.reference_reset_base(location.reference,left.resultdef,NR_NO,left.location.value,location.reference.alignment,[]);
hlcg.reference_reset_base(location.reference,left.resultdef,NR_NO,left.location.value,ctempposinvalid,location.reference.alignment,[]);
end;
else
internalerror(2002032218);
@ -933,11 +933,11 @@ implementation
case left.location.loc of
LOC_REGISTER,
LOC_CREGISTER :
hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment,[]);
hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,ctempposinvalid,location.reference.alignment,[]);
LOC_REFERENCE,
LOC_CREFERENCE :
begin
hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment,[]);
hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,ctempposinvalid,location.reference.alignment,[]);
hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
left.location.reference,location.reference.base);
end;

4
compiler/ncgutil.pas
View File

@ -805,7 +805,7 @@ implementation
LOC_REFERENCE:
begin
gen_alloc_regloc(list,destloc,vardef);
reference_reset_base(href,paraloc^.reference.index,paraloc^.reference.offset,para.alignment,[]);
reference_reset_base(href,paraloc^.reference.index,paraloc^.reference.offset,paraloc^.reference.temppos,para.alignment,[]);
cg128.a_load128_ref_reg(list,href,destloc.register128);
unget_para(paraloc^);
end;
@ -936,7 +936,7 @@ implementation
LOC_REFERENCE:
begin
gen_alloc_regloc(list,destloc,vardef);
reference_reset_base(href,paraloc^.reference.index,paraloc^.reference.offset,para.alignment,[]);
reference_reset_base(href,paraloc^.reference.index,paraloc^.reference.offset,paraloc^.reference.temppos,para.alignment,[]);
cg64.a_load64_ref_reg(list,href,destloc.register64);
unget_para(paraloc^);
end;

7
compiler/parabase.pas
View File

@ -35,7 +35,12 @@ unit parabase;
type
TCGParaReference = record
index : tregister;
offset : aint;
{ right now, the initial offset and the temppos of a para reference
is always the same; use separate names in case this would ever
change, or be different for a particular platform }
case byte of
0: (offset : asizeint);
1: (temppos : treftemppos);
end;
PCGParaLocation = ^TCGParaLocation;

1
compiler/paramgr.pas
View File

@ -425,6 +425,7 @@ implementation
fillchar(href,sizeof(href),0);
href.base:=paraloc^.reference.index;
href.offset:=paraloc^.reference.offset;
href.temppos:=paraloc^.reference.temppos;
tg.ungetiftemp(list,href);
end;
end;

52
compiler/powerpc/cgcpu.pas
View File

@ -804,9 +804,9 @@ const
case target_info.abi of
abi_powerpc_aix,
abi_powerpc_darwin:
reference_reset_base(href,NR_STACK_POINTER_REG,LA_LR_AIX,4,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,LA_LR_AIX,ctempposinvalid,4,[]);
abi_powerpc_sysv:
reference_reset_base(href,NR_STACK_POINTER_REG,LA_LR_SYSV,4,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,LA_LR_SYSV,ctempposinvalid,4,[]);
end;
list.concat(taicpu.op_reg_ref(A_STW,NR_R0,href));
if not(cs_profile in current_settings.moduleswitches) then
@ -820,7 +820,7 @@ const
begin
a_reg_alloc(list,NR_R0);
list.concat(taicpu.op_reg_reg(A_MFSPR,NR_R0,NR_CR));
reference_reset_base(href,NR_STACK_POINTER_REG,LA_CR_AIX,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,LA_CR_AIX,ctempposinvalid,4,[]);
list.concat(taicpu.op_reg_ref(A_STW,NR_R0,href));
a_reg_dealloc(list,NR_R0);
end;
@ -837,7 +837,7 @@ const
if usesfpr then
begin
reference_reset_base(href,NR_R1,-8,8,[]);
reference_reset_base(href,NR_R1,-8,ctempposinvalid,8,[]);
for regcounter:=firstregfpu to RS_F31 do
begin
a_loadfpu_reg_ref(list,OS_F64,OS_F64,newreg(R_FPUREGISTER,regcounter,R_SUBNONE),href);
@ -848,7 +848,7 @@ const
end
else
{ compute start of gpr save area }
reference_reset_base(href,NR_R1,-4,4,[]);
reference_reset_base(href,NR_R1,-4,ctempposinvalid,4,[]);
{ save gprs and fetch GOT pointer }
if usesgpr then
@ -881,12 +881,12 @@ const
begin
if (localsize <= high(smallint)) then
begin
reference_reset_base(href,NR_STACK_POINTER_REG,-localsize,8,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,-localsize,ctempposinvalid,8,[]);
a_load_store(list,A_STWU,NR_STACK_POINTER_REG,href);
end
else
begin
reference_reset_base(href,NR_STACK_POINTER_REG,0,4,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,0,ctempposinvalid,4,[]);
{ can't use getregisterint here, the register colouring }
{ is already done when we get here }
{ R12 may hold previous stack pointer, R11 may be in }
@ -958,7 +958,7 @@ const
genret:=true;
if usesfpr then
begin
reference_reset_base(href,NR_R1,-8,8,[]);
reference_reset_base(href,NR_R1,-8,ctempposinvalid,8,[]);
for regcounter := firstregfpu to RS_F31 do
begin
a_loadfpu_ref_reg(list,OS_F64,OS_F64,href,newreg(R_FPUREGISTER,regcounter,R_SUBNONE));
@ -967,7 +967,7 @@ const
inc(href.offset,4);
end
else
reference_reset_base(href,NR_R1,-4,4,[]);
reference_reset_base(href,NR_R1,-4,ctempposinvalid,4,[]);
if (usesgpr) then
begin
@ -1017,9 +1017,9 @@ const
case target_info.abi of
abi_powerpc_aix,
abi_powerpc_darwin:
reference_reset_base(href,NR_STACK_POINTER_REG,LA_LR_AIX,4,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,LA_LR_AIX,ctempposinvalid,4,[]);
abi_powerpc_sysv:
reference_reset_base(href,NR_STACK_POINTER_REG,LA_LR_SYSV,4,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,LA_LR_SYSV,ctempposinvalid,4,[]);
end;
a_reg_alloc(list,NR_R0);
list.concat(taicpu.op_reg_ref(A_LWZ,NR_R0,href));
@ -1032,7 +1032,7 @@ const
if target_info.abi in [abi_powerpc_aix,abi_powerpc_darwin] then
if false then { Not needed at the moment. }
begin
reference_reset_base(href,NR_STACK_POINTER_REG,LA_CR_AIX,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,LA_CR_AIX,ctempposinvalid,4,[]);
list.concat(taicpu.op_reg_ref(A_LWZ,NR_R0,href));
list.concat(taicpu.op_reg_reg(A_MTSPR,NR_R0,NR_CR));
a_reg_dealloc(list,NR_R0);
@ -1099,7 +1099,7 @@ const
for regcounter := firstregfpu to RS_F31 do
begin
offset:= offset - 8;
reference_reset_base(href, NR_STACK_POINTER_REG, offset, 8, []);
reference_reset_base(href, NR_STACK_POINTER_REG, offset, ctempposinvalid, 8, []);
list.concat(taicpu.op_reg_ref(A_STFD, tregister(regcounter), href));
end;
(* Optimiztion in the future: a_call_name(list,'_savefXX'); *)
@ -1109,7 +1109,7 @@ const
if firstreggpr < RS_R30 then
begin
offset:= offset - 4 * (RS_R31 - firstreggpr + 1);
reference_reset_base(href,NR_STACK_POINTER_REG,offset,4,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,offset,ctempposinvalid,4,[]);
list.concat(taicpu.op_reg_ref(A_STMW,tregister(firstreggpr),href));
{STMW stores multiple registers}
end
@ -1118,7 +1118,7 @@ const
for regcounter := firstreggpr to RS_R31 do
begin
offset:= offset - 4;
reference_reset_base(href, NR_STACK_POINTER_REG, offset, 4, []);
reference_reset_base(href, NR_STACK_POINTER_REG, offset, ctempposinvalid, 4, []);
list.concat(taicpu.op_reg_ref(A_STW, newreg(R_INTREGISTER,regcounter,R_SUBWHOLE), href));
end;
end;
@ -1185,7 +1185,7 @@ const
for regcounter := firstregfpu to RS_F31 do
begin
offset:= offset - 8;
reference_reset_base(href, NR_STACK_POINTER_REG, offset, 8, []);
reference_reset_base(href, NR_STACK_POINTER_REG, offset, ctempposinvalid, 8, []);
list.concat(taicpu.op_reg_ref(A_LFD, newreg(R_FPUREGISTER,regcounter,R_SUBWHOLE), href));
end;
(* Optimiztion in the future: a_call_name(list,'_restfXX'); *)
@ -1195,7 +1195,7 @@ const
if firstreggpr < RS_R30 then
begin
offset:= offset - 4 * (RS_R31 - firstreggpr + 1);
reference_reset_base(href,NR_STACK_POINTER_REG,offset,4,[]); //-220
reference_reset_base(href,NR_STACK_POINTER_REG,offset,ctempposinvalid,4,[]); //-220
list.concat(taicpu.op_reg_ref(A_LMW,tregister(firstreggpr),href));
{LMW loads multiple registers}
end
@ -1204,7 +1204,7 @@ const
for regcounter := firstreggpr to RS_R31 do
begin
offset:= offset - 4;
reference_reset_base(href, NR_STACK_POINTER_REG, offset, 4, []);
reference_reset_base(href, NR_STACK_POINTER_REG, offset, ctempposinvalid, 4, []);
list.concat(taicpu.op_reg_ref(A_LWZ, newreg(R_INTREGISTER,regcounter,R_SUBWHOLE), href));
end;
end;
@ -1241,7 +1241,7 @@ const
{ save return address in callers frame}
list.concat(taicpu.op_reg_reg(A_MFSPR,NR_R0,NR_LR));
{ ... in caller's frame }
reference_reset_base(href,NR_STACK_POINTER_REG,8,8,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,8,ctempposinvalid,8,[]);
list.concat(taicpu.op_reg_ref(A_STW,NR_R0,href));
a_reg_dealloc(list,NR_R0);
@ -1251,7 +1251,7 @@ const
{ save the CR if necessary in callers frame ( !!! always done currently ) }
a_reg_alloc(list,NR_R0);
list.concat(taicpu.op_reg_reg(A_MFSPR,NR_R0,NR_CR));
reference_reset_base(href,NR_STACK_POINTER_REG,LA_CR_AIX,4,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,LA_CR_AIX,ctempposinvalid,4,[]);
list.concat(taicpu.op_reg_ref(A_STW,NR_R0,href));
a_reg_dealloc(list,NR_R0);
@ -1285,12 +1285,12 @@ const
begin
if (localsize <= high(smallint)) then
begin
reference_reset_base(href,NR_STACK_POINTER_REG,-localsize,8,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,-localsize,ctempposinvalid,8,[]);
a_load_store(list,A_STWU,NR_STACK_POINTER_REG,href);
end
else
begin
reference_reset_base(href,NR_STACK_POINTER_REG,0,8,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,0,ctempposinvalid,8,[]);
href.index := NR_R11;
a_reg_alloc(list,href.index);
a_load_const_reg(list,OS_S32,-localsize,href.index);
@ -1309,7 +1309,7 @@ const
a_reg_alloc(list,NR_R0);
{ restore stack pointer }
reference_reset_base(href,NR_STACK_POINTER_REG,LA_SP,4,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,LA_SP,ctempposinvalid,4,[]);
list.concat(taicpu.op_reg_ref(A_LWZ,NR_STACK_POINTER_REG,href));
(*
list.concat(taicpu.op_reg_reg_const(A_ORI,NR_STACK_POINTER_REG,R_31,0));
@ -1317,14 +1317,14 @@ const
{ restore the CR if necessary from callers frame
( !!! always done currently ) }
reference_reset_base(href,NR_STACK_POINTER_REG,LA_CR_AIX,4,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,LA_CR_AIX,ctempposinvalid,4,[]);
list.concat(taicpu.op_reg_ref(A_LWZ,NR_R0,href));
list.concat(taicpu.op_reg_reg(A_MTSPR,NR_R0,NR_CR));
a_reg_dealloc(list,NR_R0);
(*
{ restore return address from callers frame }
reference_reset_base(href,STACK_POINTER_REG,8,[]);
reference_reset_base(href,STACK_POINTER_REG,8,ctempposinvalid,8,[]);
list.concat(taicpu.op_reg_ref(A_LWZ,R_0,href));
*)
@ -1338,7 +1338,7 @@ const
*)
{ restore return address from callers frame }
reference_reset_base(href,NR_STACK_POINTER_REG,8,8,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,8,ctempposinvalid,8,[]);
list.concat(taicpu.op_reg_ref(A_LWZ,NR_R0,href));
{ return to caller }

4
compiler/powerpc/nppccal.pas
View File

@ -89,7 +89,7 @@ implementation
begin
{ one syscall convention for AmigaOS/PowerPC
which is very similar to basesysv (a.k.a basefirst) on MorphOS }
reference_reset_base(tmpref,NR_R3,tprocdef(procdefinition).extnumber,sizeof(pint),[]);
reference_reset_base(tmpref,NR_R3,tprocdef(procdefinition).extnumber,ctempposinvalid,sizeof(pint),[]);
do_call_ref(tmpref);
end;
system_powerpc_morphos:
@ -110,7 +110,7 @@ implementation
{ R3 must contain the call offset }
current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_LI,NR_R3,-tprocdef(procdefinition).extnumber));
reference_reset_base(tmpref,NR_R2,100,4,[]); { 100 ($64) is EmulDirectCallOS offset }
reference_reset_base(tmpref,NR_R2,100,ctempposinvalid,4,[]); { 100 ($64) is EmulDirectCallOS offset }
do_call_ref(tmpref);
cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_R3);

24
compiler/powerpc64/cgcpu.pas
View File

@ -334,22 +334,22 @@ begin
tempreg := getintregister(list, OS_INT);
{ load actual function entry (reg contains the reference to the function descriptor)
into tempreg }
reference_reset_base(tmpref, reg, 0, sizeof(pint), []);
reference_reset_base(tmpref, reg, 0, ctempposinvalid, sizeof(pint), []);
a_load_ref_reg(list, OS_ADDR, OS_ADDR, tmpref, tempreg);
{ save TOC pointer in stackframe }
reference_reset_base(tmpref, NR_STACK_POINTER_REG, get_rtoc_offset, 8, []);
reference_reset_base(tmpref, NR_STACK_POINTER_REG, get_rtoc_offset, ctempposinvalid, 8, []);
a_load_reg_ref(list, OS_ADDR, OS_ADDR, NR_RTOC, tmpref);
{ move actual function pointer to CTR register }
list.concat(taicpu.op_reg(A_MTCTR, tempreg));
{ load new TOC pointer from function descriptor into RTOC register }
reference_reset_base(tmpref, reg, tcgsize2size[OS_ADDR], 8, []);
reference_reset_base(tmpref, reg, tcgsize2size[OS_ADDR], ctempposinvalid, 8, []);
a_load_ref_reg(list, OS_ADDR, OS_ADDR, tmpref, NR_RTOC);
{ load new environment pointer from function descriptor into R11 register }
reference_reset_base(tmpref, reg, 2*tcgsize2size[OS_ADDR], 8, []);
reference_reset_base(tmpref, reg, 2*tcgsize2size[OS_ADDR], ctempposinvalid, 8, []);
a_reg_alloc(list, NR_R11);
a_load_ref_reg(list, OS_ADDR, OS_ADDR, tmpref, NR_R11);
{ call function }
@ -365,7 +365,7 @@ begin
end;
{ we need to load the old RTOC from stackframe because we changed it}
reference_reset_base(tmpref, NR_STACK_POINTER_REG, get_rtoc_offset, 8, []);
reference_reset_base(tmpref, NR_STACK_POINTER_REG, get_rtoc_offset, ctempposinvalid, 8, []);
a_load_ref_reg(list, OS_ADDR, OS_ADDR, tmpref, NR_RTOC);
include(current_procinfo.flags, pi_do_call);
@ -1155,7 +1155,7 @@ var
mayNeedLRStore := true;
end else begin
{ save registers, FPU first, then GPR }
reference_reset_base(href, NR_STACK_POINTER_REG, -8, 8, []);
reference_reset_base(href, NR_STACK_POINTER_REG, -8, ctempposinvalid, 8, []);
if (fprcount > 0) then
for regcount := RS_F31 downto firstregfpu do begin
a_loadfpu_reg_ref(list, OS_FLOAT, OS_FLOAT, newreg(R_FPUREGISTER,
@ -1176,7 +1176,7 @@ var
{ we may need to store R0 (=LR) ourselves }
if ((cs_profile in init_settings.moduleswitches) or (mayNeedLRStore)) and (needslinkreg) then begin
reference_reset_base(href, NR_STACK_POINTER_REG, LA_LR_SYSV, 8, []);
reference_reset_base(href, NR_STACK_POINTER_REG, LA_LR_SYSV, ctempposinvalid, 8, []);
list.concat(taicpu.op_reg_ref(A_STD, NR_R0, href));
end;
end;
@ -1242,10 +1242,10 @@ begin
if (not nostackframe) and (localsize > 0) and
tcpuprocinfo(current_procinfo).needstackframe then begin
if (localsize <= high(smallint)) then begin
reference_reset_base(href, NR_STACK_POINTER_REG, -localsize, 8, []);
reference_reset_base(href, NR_STACK_POINTER_REG, -localsize, ctempposinvalid, 8, []);
a_load_store(list, A_STDU, NR_STACK_POINTER_REG, href);
end else begin
reference_reset_base(href, NR_NO, -localsize, 8, []);
reference_reset_base(href, NR_NO, -localsize, ctempposinvalid, 8, []);
{ Use R0 for loading the constant (which is definitely > 32k when entering
this branch).
@ -1327,7 +1327,7 @@ var
end else begin
needsExitCode := true;
{ restore registers, FPU first, GPR next }
reference_reset_base(href, NR_STACK_POINTER_REG, -tcgsize2size[OS_FLOAT], 8, []);
reference_reset_base(href, NR_STACK_POINTER_REG, -tcgsize2size[OS_FLOAT], ctempposinvalid, 8, []);
if (fprcount > 0) then
for regcount := RS_F31 downto firstregfpu do begin
a_loadfpu_ref_reg(list, OS_FLOAT, OS_FLOAT, href, newreg(R_FPUREGISTER, regcount,
@ -1348,7 +1348,7 @@ var
{ restore LR (if needed) }
if (needslinkreg) then begin
reference_reset_base(href, NR_STACK_POINTER_REG, LA_LR_SYSV, 8, []);
reference_reset_base(href, NR_STACK_POINTER_REG, LA_LR_SYSV, ctempposinvalid, 8, []);
list.concat(taicpu.op_reg_ref(A_LD, NR_R0, href));
list.concat(taicpu.op_reg(A_MTLR, NR_R0));
end;
@ -1385,7 +1385,7 @@ begin
if (localsize <= high(smallint)) then begin
list.concat(taicpu.op_reg_reg_const(A_ADDI, NR_STACK_POINTER_REG, NR_STACK_POINTER_REG, localsize));
end else begin
reference_reset_base(href, NR_NO, localsize, 8, []);
reference_reset_base(href, NR_NO, localsize, ctempposinvalid, 8, []);
{ use R0 for loading the constant (which is definitely > 32k when entering
this branch)

10
compiler/ppcgen/cgppc.pas
View File

@ -495,21 +495,21 @@ unit cgppc;
if target_info.system in systems_aix then
begin
{ load function address in R0, and swap "reg" for R0 }
reference_reset_base(tmpref,reg,0,sizeof(pint),[]);
reference_reset_base(tmpref,reg,0,ctempposinvalid,sizeof(pint),[]);
a_load_ref_reg(list,OS_ADDR,OS_ADDR,tmpref,NR_R0);
tmpreg:=reg;
{ no need to allocate/free R0, is already allocated by call node
because it's a volatile register }
reg:=NR_R0;
{ save current TOC }
reference_reset_base(tmpref,NR_STACK_POINTER_REG,LA_RTOC_AIX,sizeof(pint),[]);
reference_reset_base(tmpref,NR_STACK_POINTER_REG,LA_RTOC_AIX,ctempposinvalid,sizeof(pint),[]);
a_load_reg_ref(list,OS_ADDR,OS_ADDR,NR_RTOC,tmpref);
end;
list.concat(taicpu.op_reg(A_MTCTR,reg));
if target_info.system in systems_aix then
begin
{ load target TOC and possible link register }
reference_reset_base(tmpref,tmpreg,sizeof(pint),sizeof(pint),[]);
reference_reset_base(tmpref,tmpreg,sizeof(pint),ctempposinvalid,sizeof(pint),[]);
a_load_ref_reg(list,OS_ADDR,OS_ADDR,tmpref,NR_RTOC);
tmpref.offset:=2*sizeof(pint);
a_load_ref_reg(list,OS_ADDR,OS_ADDR,tmpref,NR_R11);
@ -517,7 +517,7 @@ unit cgppc;
else if target_info.abi=abi_powerpc_elfv2 then
begin
{ save current TOC }
reference_reset_base(tmpref,NR_STACK_POINTER_REG,LA_RTOC_ELFV2,sizeof(pint),[]);
reference_reset_base(tmpref,NR_STACK_POINTER_REG,LA_RTOC_ELFV2,ctempposinvalid,sizeof(pint),[]);
a_load_reg_ref(list,OS_ADDR,OS_ADDR,NR_RTOC,tmpref);
{ functions must be called via R12 for this ABI }
if reg<>NR_R12 then
@ -538,7 +538,7 @@ unit cgppc;
toc_offset:=LA_RTOC_AIX
else
toc_offset:=LA_RTOC_ELFV2;
reference_reset_base(tmpref,NR_STACK_POINTER_REG,toc_offset,sizeof(pint),[]);
reference_reset_base(tmpref,NR_STACK_POINTER_REG,toc_offset,ctempposinvalid,sizeof(pint),[]);
a_load_ref_reg(list,OS_ADDR,OS_ADDR,tmpref,NR_RTOC);
end;
include(current_procinfo.flags,pi_do_call);

16
compiler/ppcgen/hlcgppc.pas
View File

@ -103,7 +103,7 @@ implementation
var
href : treference;
begin
reference_reset_base(href,voidpointertype,NR_R3,0,sizeof(pint),[]);
reference_reset_base(href,voidpointertype,NR_R3,0,ctempposinvalid,sizeof(pint),[]);
cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_R11);
end;
@ -115,7 +115,7 @@ implementation
if (procdef.extnumber=$ffff) then
Internalerror(200006139);
{ call/jmp vmtoffs(%eax) ; method offs }
reference_reset_base(href,voidpointertype,NR_R11,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),sizeof(pint),[]);
reference_reset_base(href,voidpointertype,NR_R11,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),ctempposinvalid,sizeof(pint),[]);
if tcgppcgen(cg).hasLargeOffset(href) then
begin
{$ifdef cpu64}
@ -134,7 +134,7 @@ implementation
((target_info.system = system_powerpc64_linux) and
(target_info.abi=abi_powerpc_sysv)) then
begin
reference_reset_base(href, voidpointertype, NR_R12, 0, sizeof(pint),[]);
reference_reset_base(href, voidpointertype, NR_R12, 0, ctempposinvalid, sizeof(pint),[]);
cg.a_load_ref_reg(list, OS_ADDR, OS_ADDR, href, NR_R12);
end;
list.concat(taicpu.op_reg(A_MTCTR,NR_R12));
@ -221,11 +221,11 @@ implementation
}
list.concat(taicpu.op_reg(A_MFLR, NR_R0));
if target_info.abi=abi_powerpc_sysv then
reference_reset_base(href, voidstackpointertype, NR_STACK_POINTER_REG, LA_LR_SYSV, 8, [])
reference_reset_base(href, voidstackpointertype, NR_STACK_POINTER_REG, LA_LR_SYSV, ctempposinvalid, 8, [])
else
reference_reset_base(href, voidstackpointertype, NR_STACK_POINTER_REG, LA_LR_AIX, 8, []);
reference_reset_base(href, voidstackpointertype, NR_STACK_POINTER_REG, LA_LR_AIX, ctempposinvalid, 8, []);
cg.a_load_reg_ref(list,OS_ADDR,OS_ADDR,NR_R0,href);
reference_reset_base(href, voidstackpointertype, NR_STACK_POINTER_REG, -MINIMUM_STACKFRAME_SIZE, 8, []);
reference_reset_base(href, voidstackpointertype, NR_STACK_POINTER_REG, -MINIMUM_STACKFRAME_SIZE, ctempposinvalid, 8, []);
list.concat(taicpu.op_reg_ref({$ifdef cpu64bitaddr}A_STDU{$else}A_STWU{$endif}, NR_STACK_POINTER_REG, href));
cg.a_call_name(list,externalname,false);
@ -234,9 +234,9 @@ implementation
if target_info.abi=abi_powerpc_sysv then
reference_reset_base(href, voidstackpointertype, NR_STACK_POINTER_REG, LA_LR_SYSV, 8, [])
reference_reset_base(href, voidstackpointertype, NR_STACK_POINTER_REG, LA_LR_SYSV, ctempposinvalid, 8, [])
else
reference_reset_base(href, voidstackpointertype, NR_STACK_POINTER_REG, LA_LR_AIX, 8, []);
reference_reset_base(href, voidstackpointertype, NR_STACK_POINTER_REG, LA_LR_AIX, ctempposinvalid, 8, []);
cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_R0);
list.concat(taicpu.op_reg(A_MTLR, NR_R0));
list.concat(taicpu.op_none(A_BLR));

2
compiler/ppcgen/ngppcset.pas
View File

@ -121,7 +121,7 @@ implementation
hregister:=cg.getaddressregister(current_asmdata.CurrAsmList);
cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,href,hregister);
reference_reset_base(href,hregister,0,4,[]);
reference_reset_base(href,hregister,0,href.temppos,4,[]);
href.index:=indexreg;
indexreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
{ load table entry }

2
compiler/sparc64/cgcpu.pas
View File

@ -143,7 +143,7 @@ interface
begin
hreg1:=getintregister(list,OS_ADDR);
a_loadaddr_ref_reg(list,href,hreg1);
reference_reset_base(href,hreg1,0,href.alignment,href.volatility);
reference_reset_base(href,hreg1,0,href.temppos,href.alignment,href.volatility);
end;
inc(href.offset,4);
a_load_reg_ref(list,OS_32,OS_32,register,href);

5
compiler/sparc64/tgcpu.pas
View File

@ -33,8 +33,7 @@ unit tgcpu;
type
ttgsparc64 = class(ttgobj)
protected
procedure alloctemp(list: TAsmList; size: asizeint; alignment: shortint; temptype: ttemptype; def: tdef; fini: boolean; out ref: treference);override;
procedure temp_to_ref(p: ptemprecord; out ref: treference); override;
end;
implementation
@ -42,7 +41,7 @@ implementation
uses
cpubase;
procedure ttgsparc64.alloctemp(list: TAsmList; size: asizeint; alignment: shortint; temptype: ttemptype; def: tdef; fini: boolean; out ref: treference);
procedure ttgsparc64.temp_to_ref(p: ptemprecord; out ref: treference);
begin
inherited;
inc(ref.offset,STACK_BIAS);

11
compiler/sparcgen/cgsparc.pas
View File

@ -212,7 +212,7 @@ implementation
list.concat(taicpu.op_ref_reg(A_SETHI,href,hreg));
href.refaddr:=addr_low;
list.concat(taicpu.op_reg_ref_reg(A_OR,hreg,href,hreg));
reference_reset_base(href,hreg,0,sizeof(pint),[]);
reference_reset_base(href,hreg,0,href.temppos,sizeof(pint),[]);
href.index:=current_procinfo.got;
end
else
@ -338,8 +338,7 @@ implementation
a_load_ref_reg(list,hloc^.size,hloc^.size,href,hloc^.register);
LOC_REFERENCE :
begin
reference_reset_base(href2,hloc^.reference.index,hloc^.reference.offset,paraloc.alignment,[]);
reference_reset_base(href2,hloc^.reference.index,hloc^.reference.offset,paraloc.alignment,[]);
reference_reset_base(href2,hloc^.reference.index,hloc^.reference.offset,hloc^.reference.temppos,paraloc.alignment,[]);
{ concatcopy should choose the best way to copy the data }
g_concatcopy(list,href,href2,tcgsize2size[hloc^.size]);
@ -539,7 +538,7 @@ implementation
list.concat(taicpu.op_ref_reg(A_SETHI,href,r));
href.refaddr:=addr_low;
list.concat(taicpu.op_reg_ref_reg(A_OR,r,href,r));
reference_reset_base(href,r,0,sizeof(pint),[]);
reference_reset_base(href,r,0,ctempposinvalid,sizeof(pint),[]);
href.index:=current_procinfo.got;
end
else
@ -1157,14 +1156,14 @@ implementation
src:=source
else
begin
reference_reset_base(src,getintregister(list,OS_ADDR),0,sizeof(aint),source.volatility);
reference_reset_base(src,getintregister(list,OS_ADDR),0,source.temppos,sizeof(aint),source.volatility);
a_loadaddr_ref_reg(list,source,src.base);
end;
if (count<=4) and reference_is_reusable(dest) then
dst:=dest
else
begin
reference_reset_base(dst,getintregister(list,OS_ADDR),0,sizeof(aint),dest.volatility);
reference_reset_base(dst,getintregister(list,OS_ADDR),0,dest.temppos,sizeof(aint),dest.volatility);
a_loadaddr_ref_reg(list,dest,dst.base);
end;
{ generate a loop }

16
compiler/sparcgen/hlcgcpu.pas
View File

@ -40,9 +40,6 @@ interface
thlcgcpu = class(thlcg2ll)
procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
procedure a_jmp_external_name(list: TAsmList; const externalname: TSymStr);override;
{$ifdef SPARC64}
procedure temp_to_ref(p: ptemprecord; out ref: treference);override;
{$endif SPARC64}
end;
procedure create_hlcodegen;
@ -114,10 +111,10 @@ implementation
if (procdef.extnumber=$ffff) then
Internalerror(200006139);
{ load vmt }
reference_reset_base(href,voidpointertype,paraloc^.register,0,sizeof(pint),[]);
reference_reset_base(href,voidpointertype,paraloc^.register,0,ctempposinvalid,sizeof(pint),[]);
cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_G1);
{ jmp to method }
reference_reset_base(href,voidpointertype,NR_G1,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),sizeof(pint),[]);
reference_reset_base(href,voidpointertype,NR_G1,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),ctempposinvalid,sizeof(pint),[]);
cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_G1);
list.concat(taicpu.op_reg(A_JMP,NR_G1));
{ Delay slot }
@ -138,15 +135,6 @@ implementation
end;
{$ifdef SPARC64}
procedure thlcgcpu.temp_to_ref(p : ptemprecord; out ref : treference);
begin
inherited;
inc(ref.offset,STACK_BIAS);
end;
{$endif SPARC64}
procedure create_hlcodegen;
begin
hlcg:=thlcgcpu.create;

2
compiler/sparcgen/ncpuset.pas
View File

@ -142,7 +142,7 @@ unit ncpuset;
cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,basereg,indexreg,basereg);
jmpreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
reference_reset_base(href,NR_O7,0,sizeof(pint),[]);
reference_reset_base(href,NR_O7,0,ctempposinvalid,sizeof(pint),[]);
href.index:=basereg;
cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,href,jmpreg);
href.index:=jmpreg;

4
compiler/sparcgen/rgcpu.pas
View File

@ -123,7 +123,7 @@ implementation
Internalerror(2017090901);
{$endif SPARC}
reference_reset_base(tmpref,hreg,0,sizeof(aint),[]);
reference_reset_base(tmpref,hreg,0,spilltemp.temppos,sizeof(aint),[]);
tmpref.index:=spilltemp.base;
helpins:=spilling_create_load(tmpref,tempreg);
@ -170,7 +170,7 @@ implementation
Internalerror(2017090901);
{$endif SPARC}
reference_reset_base(tmpref,hreg,0,sizeof(aint),[]);
reference_reset_base(tmpref,hreg,0,spilltemp.temppos,sizeof(aint),[]);
tmpref.index:=spilltemp.base;
helplist.concat(spilling_create_store(tempreg,tmpref));

2
compiler/systems/t_win.pas
View File

@ -527,7 +527,7 @@ implementation
{$ifdef ARM}
reference_reset_symbol(href,l5,0,sizeof(pint),[]);
current_asmdata.asmlists[al_imports].concat(Taicpu.op_reg_ref(A_LDR,NR_R12,href));
reference_reset_base(href,NR_R12,0,sizeof(pint),[]);
reference_reset_base(href,NR_R12,0,ctempposinvalid,sizeof(pint),[]);
current_asmdata.asmlists[al_imports].concat(Taicpu.op_reg_ref(A_LDR,NR_R15,href));
current_asmdata.asmlists[al_imports].concat(Tai_label.Create(l5));
reference_reset_symbol(href,l4,0,sizeof(pint),[]);

64
compiler/tgobj.pas
View File

@ -62,7 +62,7 @@ unit tgobj;
{ contains all free temps using nextfree links }
tempfreelist : ptemprecord;
procedure alloctemp(list: TAsmList; size: asizeint; alignment: shortint; temptype: ttemptype; def: tdef; fini: boolean; out ref: treference); virtual;
procedure freetemp(list: TAsmList; pos: asizeint; temptypes: ttemptypeset);virtual;
procedure freetemp(list: TAsmList; pos: treftemppos; temptypes: ttemptypeset);virtual;
procedure gettempinternal(list: TAsmList; size: asizeint; alignment: shortint; temptype: ttemptype; def: tdef; fini: boolean; out ref : treference);
public
{ contains all temps }
@ -103,6 +103,9 @@ unit tgobj;
function sizeoftemp(list: TAsmList; const ref: treference): asizeint;
function changetemptype(list: TAsmList; const ref:treference;temptype:ttemptype):boolean;
function gettypeoftemp(const ref:treference): ttemptype;
{# Returns a reference corresponding to a temp }
procedure temp_to_ref(p: ptemprecord; out ref: treference); virtual;
{# Returns TRUE if the reference ref is allocated in temporary volatile memory space,
otherwise returns FALSE.
@ -443,11 +446,11 @@ implementation
{$else}
list.concat(tai_tempalloc.alloc(tl^.pos,tl^.size));
{$endif}
reference_reset_base(ref,current_procinfo.framepointer,tl^.pos,alignment,[]);
temp_to_ref(tl,ref);
end;
procedure ttgobj.FreeTemp(list: TAsmList; pos: asizeint; temptypes: ttemptypeset);
procedure ttgobj.FreeTemp(list: TAsmList; pos: treftemppos; temptypes: ttemptypeset);
var
hp,hnext,hprev,hprevfree : ptemprecord;
begin
@ -456,13 +459,13 @@ implementation
hprevfree:=nil;
while assigned(hp) do
begin
if (hp^.pos=pos) then
if (hp^.pos=pos.val) then
begin
{ check if already freed }
if hp^.temptype in FreeTempTypes then
begin
{$ifdef EXTDEBUG}
Comment(V_Warning,'tgobj: (FreeTemp) temp at pos '+tostr(pos)+ ' is already free !');
Comment(V_Warning,'tgobj: (FreeTemp) temp at pos '+tostr(pos.val)+ ' is already free !');
list.concat(tai_tempalloc.allocinfo(hp^.pos,hp^.size,'temp is already freed'));
{$endif}
exit;
@ -471,7 +474,7 @@ implementation
if not(hp^.temptype in temptypes) then
begin
{$ifdef EXTDEBUG}
Comment(V_Debug,'tgobj: (Freetemp) temp at pos '+tostr(pos)+ ' has different type ('+TempTypeStr[hp^.temptype]+'), not releasing');
Comment(V_Debug,'tgobj: (Freetemp) temp at pos '+tostr(pos.val)+ ' has different type ('+TempTypeStr[hp^.temptype]+'), not releasing');
list.concat(tai_tempalloc.allocinfo(hp^.pos,hp^.size,'temp has wrong type ('+TempTypeStr[hp^.temptype]+') not releasing'));
{$endif}
exit;
@ -571,21 +574,7 @@ implementation
function ttgobj.istemp(const ref : treference) : boolean;
begin
{ ref.index = R_NO was missing
led to problems with local arrays
with lower bound > 0 (PM) }
if direction = 1 then
begin
istemp:=(ref.base=current_procinfo.framepointer) and
(ref.index=NR_NO) and
(ref.offset>=firsttemp);
end
else
begin
istemp:=(ref.base=current_procinfo.framepointer) and
(ref.index=NR_NO) and
(ref.offset<firsttemp);
end;
istemp:=ref.temppos.val<>ctempposinvalid.val;
end;
@ -597,7 +586,7 @@ implementation
hp:=templist;
while assigned(hp) do
begin
if (hp^.pos=ref.offset) then
if (hp^.pos=ref.temppos.val) then
begin
sizeoftemp := hp^.size;
exit;
@ -605,8 +594,8 @@ implementation
hp := hp^.next;
end;
{$ifdef EXTDEBUG}
comment(v_debug,'tgobj: (SizeOfTemp) temp at pos '+tostr(ref.offset)+' not found !');
list.concat(tai_tempalloc.allocinfo(ref.offset,0,'temp not found'));
comment(v_debug,'tgobj: (SizeOfTemp) temp at pos '+tostr(ref.temppos.val)+' not found !');
list.concat(tai_tempalloc.allocinfo(ref.temppos.val,0,'temp not found'));
{$endif}
end;
@ -619,14 +608,14 @@ implementation
hp:=templist;
while assigned(hp) do
begin
if (hp^.pos=ref.offset) then
if (hp^.pos=ref.temppos.val) then
begin
if hp^.temptype<>tt_free then
begin
{$ifdef EXTDEBUG}
if hp^.temptype=temptype then
Comment(V_Warning,'tgobj: (ChangeTempType) temp'+
' at pos '+tostr(ref.offset)+ ' is already of the correct type !');
' at pos '+tostr(ref.temppos.val)+ ' is already of the correct type !');
list.concat(tai_tempalloc.allocinfo(hp^.pos,hp^.size,'type changed to '+TempTypeStr[temptype]));
{$endif}
ChangeTempType:=true;
@ -636,7 +625,7 @@ implementation
begin
{$ifdef EXTDEBUG}
Comment(V_Warning,'tgobj: (ChangeTempType) temp'+
' at pos '+tostr(ref.offset)+ ' is already freed !');
' at pos '+tostr(ref.temppos.val)+ ' is already freed !');
list.concat(tai_tempalloc.allocinfo(hp^.pos,hp^.size,'temp is already freed'));
{$endif}
end;
@ -646,8 +635,8 @@ implementation
end;
{$ifdef EXTDEBUG}
Comment(V_Warning,'tgobj: (ChangeTempType) temp'+
' at pos '+tostr(ref.offset)+ ' not found !');
list.concat(tai_tempalloc.allocinfo(ref.offset,0,'temp not found'));
' at pos '+tostr(ref.temppos.val)+ ' not found !');
list.concat(tai_tempalloc.allocinfo(ref.temppos.val,0,'temp not found'));
{$endif}
end;
@ -659,7 +648,7 @@ implementation
hp:=templist;
while assigned(hp) do
begin
if (hp^.pos=ref.offset) then
if (hp^.pos=ref.temppos.val) then
begin
if hp^.temptype<>tt_free then
result:=hp^.temptype
@ -673,16 +662,25 @@ implementation
end;
procedure ttgobj.temp_to_ref(p: ptemprecord; out ref: treference);
var
t: treftemppos;
begin
t.val:=p^.pos;
reference_reset_base(ref,current_procinfo.framepointer,p^.pos,t,p^.alignment,[]);
end;
procedure ttgobj.UnGetTemp(list: TAsmList; const ref : treference);
begin
FreeTemp(list,ref.offset,[tt_normal,tt_noreuse,tt_persistent,tt_regallocator]);
FreeTemp(list,ref.temppos,[tt_normal,tt_noreuse,tt_persistent,tt_regallocator]);
end;
procedure ttgobj.UnGetIfTemp(list: TAsmList; const ref : treference);
begin
if istemp(ref) then
FreeTemp(list,ref.offset,[tt_normal]);
FreeTemp(list,ref.temppos,[tt_normal]);
end;
@ -701,7 +699,7 @@ implementation
procedure ttgobj.UnGetLocal(list: TAsmList; const ref : treference);
begin
FreeTemp(list,ref.offset,[tt_persistent]);
FreeTemp(list,ref.temppos,[tt_persistent]);
end;
end.

38
compiler/x86/cgx86.pas
View File

@ -503,7 +503,7 @@ unit cgx86;
else
begin
{ don't use add, as the flags may contain a value }
reference_reset_base(href,hreg,0,ref.alignment,[]);
reference_reset_base(href,hreg,0,ref.temppos,ref.alignment,[]);
href.index:=ref.index;
href.scalefactor:=ref.scalefactor;
list.concat(taicpu.op_ref_reg(A_LEA,S_Q,href,hreg));
@ -557,7 +557,7 @@ unit cgx86;
else
begin
{ don't use add, as the flags may contain a value }
reference_reset_base(href,ref.base,0,ref.alignment,[]);
reference_reset_base(href,ref.base,0,ref.temppos,ref.alignment,[]);
href.index:=hreg;
ref.base:=getaddressregister(list);
list.concat(taicpu.op_ref_reg(A_LEA,S_Q,href,ref.base));
@ -592,7 +592,7 @@ unit cgx86;
else
begin
{ don't use add, as the flags may contain a value }
reference_reset_base(href,ref.base,0,ref.alignment,[]);
reference_reset_base(href,ref.base,0,ref.temppos,ref.alignment,[]);
href.index:=hreg;
ref.base:=getaddressregister(list);
list.concat(taicpu.op_ref_reg(A_LEA,S_Q,href,ref.base));
@ -651,7 +651,7 @@ unit cgx86;
else
begin
{ don't use add, as the flags may contain a value }
reference_reset_base(href,ref.base,0,ref.alignment,[]);
reference_reset_base(href,ref.base,0,ref.temppos,ref.alignment,[]);
href.index:=hreg;
list.concat(taicpu.op_ref_reg(A_LEA,S_L,href,hreg));
ref.base:=hreg;
@ -706,7 +706,7 @@ unit cgx86;
if ref.base<>NR_NO then
begin
{ fold symbol register into base register }
reference_reset_base(href,hreg,0,ref.alignment,[]);
reference_reset_base(href,hreg,0,ctempposinvalid,ref.alignment,[]);
href.index:=ref.base;
hreg:=getaddressregister(list);
a_loadaddr_ref_reg(list,href,hreg);
@ -1117,13 +1117,13 @@ unit cgx86;
begin
reference_reset_base(tmpref,
g_indirect_sym_load(list,dirref.symbol.name,asmsym2indsymflags(dirref.symbol)),
offset,sizeof(pint),[]);
offset,ctempposinvalid,sizeof(pint),[]);
a_loadaddr_ref_reg(list,tmpref,r);
end
else
begin
include(current_procinfo.flags,pi_needs_got);
reference_reset_base(tmpref,current_procinfo.got,offset,dirref.alignment,[]);
reference_reset_base(tmpref,current_procinfo.got,offset,dirref.temppos,dirref.alignment,[]);
tmpref.symbol:=symbol;
tmpref.relsymbol:=current_procinfo.CurrGOTLabel;
list.concat(Taicpu.op_ref_reg(A_LEA,tcgsize2opsize[OS_ADDR],tmpref,r));
@ -2023,7 +2023,7 @@ unit cgx86;
not(cs_check_overflow in current_settings.localswitches) and
(a>1) and ispowerof2(int64(a-1),power) and (power in [1..3]) then
begin
reference_reset_base(href,src,0,0,[]);
reference_reset_base(href,src,0,ctempposinvalid,0,[]);
href.index:=src;
href.scalefactor:=a-1;
list.concat(taicpu.op_ref_reg(A_LEA,TCgSize2OpSize[size],href,dst));
@ -2032,7 +2032,7 @@ unit cgx86;
not(cs_check_overflow in current_settings.localswitches) and
(a>1) and ispowerof2(int64(a),power) and (power in [1..3]) then
begin
reference_reset_base(href,NR_NO,0,0,[]);
reference_reset_base(href,NR_NO,0,ctempposinvalid,0,[]);
href.index:=src;
href.scalefactor:=a;
list.concat(taicpu.op_ref_reg(A_LEA,TCgSize2OpSize[size],href,dst));
@ -2059,7 +2059,7 @@ unit cgx86;
{$push} {$R-}{$Q-}
al := longint (a);
{$pop}
reference_reset_base(href,src,al,0,[]);
reference_reset_base(href,src,al,ctempposinvalid,0,[]);
list.concat(taicpu.op_ref_reg(A_LEA,TCgSize2OpSize[size],href,dst));
end
else if (op=OP_SUB) and
@ -2070,7 +2070,7 @@ unit cgx86;
) and
not(cs_check_overflow in current_settings.localswitches) then
begin
reference_reset_base(href,src,-a,0,[]);
reference_reset_base(href,src,-a,ctempposinvalid,0,[]);
list.concat(taicpu.op_ref_reg(A_LEA,TCgSize2OpSize[size],href,dst));
end
else if (op in [OP_ROR,OP_ROL]) and
@ -2099,7 +2099,7 @@ unit cgx86;
if (op=OP_ADD) and (size in [OS_32,OS_S32,OS_64,OS_S64]) and
not(cs_check_overflow in current_settings.localswitches) then
begin
reference_reset_base(href,src1,0,0,[]);
reference_reset_base(href,src1,0,ctempposinvalid,0,[]);
href.index:=src2;
list.concat(taicpu.op_ref_reg(A_LEA,TCgSize2OpSize[size],href,dst));
end
@ -3177,7 +3177,7 @@ unit cgx86;
var
href : treference;
begin
reference_reset_base(href,NR_STACK_POINTER_REG,-a,0,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,-a,ctempposinvalid,0,[]);
{ normally, lea is a better choice than a sub to adjust the stack pointer }
list.concat(Taicpu.op_ref_reg(A_LEA,TCGSize2OpSize[OS_ADDR],href,NR_STACK_POINTER_REG));
end;
@ -3205,7 +3205,7 @@ unit cgx86;
decrease_sp(localsize-4);
for i:=1 to localsize div winstackpagesize do
begin
reference_reset_base(href,NR_ESP,localsize-i*winstackpagesize,4,[]);
reference_reset_base(href,NR_ESP,localsize-i*winstackpagesize,ctempposinvalid,4,[]);
list.concat(Taicpu.op_reg_ref(A_MOV,S_L,NR_EAX,href));
end;
list.concat(Taicpu.op_reg(A_PUSH,S_L,NR_EAX));
@ -3229,7 +3229,7 @@ unit cgx86;
list.concat(Taicpu.op_const_reg(A_SUB,S_L,1,NR_EDI));
a_jmp_cond(list,OC_NE,again);
decrease_sp(localsize mod winstackpagesize-4);
reference_reset_base(href,NR_ESP,localsize-4,4,[]);
reference_reset_base(href,NR_ESP,localsize-4,ctempposinvalid,4,[]);
list.concat(Taicpu.op_ref_reg(A_MOV,S_L,href,NR_EDI));
a_reg_dealloc(list,NR_EDI);
end
@ -3249,10 +3249,10 @@ unit cgx86;
decrease_sp(localsize);
for i:=1 to localsize div winstackpagesize do
begin
reference_reset_base(href,NR_RSP,localsize-i*winstackpagesize+4,4,[]);
reference_reset_base(href,NR_RSP,localsize-i*winstackpagesize+4,ctempposinvalid,4,[]);
list.concat(Taicpu.op_reg_ref(A_MOV,S_L,NR_EAX,href));
end;
reference_reset_base(href,NR_RSP,0,4,[]);
reference_reset_base(href,NR_RSP,0,ctempposinvalid,4,[]);
list.concat(Taicpu.op_reg_ref(A_MOV,S_L,NR_EAX,href));
end
else
@ -3262,7 +3262,7 @@ unit cgx86;
list.concat(Taicpu.op_const_reg(A_MOV,S_Q,localsize div winstackpagesize,NR_R10));
a_label(list,again);
decrease_sp(winstackpagesize);
reference_reset_base(href,NR_RSP,0,4,[]);
reference_reset_base(href,NR_RSP,0,ctempposinvalid,4,[]);
list.concat(Taicpu.op_reg_ref(A_MOV,S_L,NR_EAX,href));
if UseIncDec then
list.concat(Taicpu.op_reg(A_DEC,S_Q,NR_R10))
@ -3543,7 +3543,7 @@ unit cgx86;
push_regs;
reference_reset_base(current_procinfo.save_regs_ref,
current_procinfo.framepointer,
-(localsize+regsize),sizeof(aint),[]);
-(localsize+regsize),ctempposinvalid,sizeof(aint),[]);
end;
{$endif i386}
end;

2
compiler/x86/nx86add.pas
View File

@ -177,7 +177,7 @@ unit nx86add;
(power in [1..3]) and
not(cs_check_overflow in current_settings.localswitches) then
begin
reference_reset_base(href,left.location.register,0,0,[]);
reference_reset_base(href,left.location.register,0,ctempposinvalid,0,[]);
href.index:=left.location.register;
href.scalefactor:=int64(right.location.value)-1;
left.location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);

2
compiler/x86/nx86inl.pas
View File

@ -670,7 +670,7 @@ implementation
begin
r:=cg.getintregister(current_asmdata.CurrAsmList,OS_ADDR);
cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,r);
reference_reset_base(ref,r,0,left.location.reference.alignment,left.location.reference.volatility);
reference_reset_base(ref,r,0,left.location.reference.temppos,left.location.reference.alignment,left.location.reference.volatility);
current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_PREFETCHNTA,S_NO,ref));
end;
else

2
compiler/x86/nx86mem.pas
View File

@ -120,7 +120,7 @@ implementation
cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
{ reference_reset_base kills the segment, so make sure we preserve it }
saveseg:=location.reference.segment;
reference_reset_base(location.reference,hreg,0,location.reference.alignment,location.reference.volatility);
reference_reset_base(location.reference,hreg,0,location.reference.temppos,location.reference.alignment,location.reference.volatility);
location.reference.segment:=saveseg;
end;
{ insert the new index register and scalefactor or

6
compiler/x86_64/cgcpu.pas
View File

@ -234,7 +234,7 @@ unit cgcpu;
begin
localsize:=align(localsize,target_info.stackalign)+xmmsize;
reference_reset_base(current_procinfo.save_regs_ref,NR_STACK_POINTER_REG,
localsize-xmmsize,tcgsize2size[OS_VECTOR],[]);
localsize-xmmsize,ctempposinvalid,tcgsize2size[OS_VECTOR],[]);
end;
{ allocate stackframe space }
@ -333,7 +333,7 @@ unit cgcpu;
var
href : treference;
begin
reference_reset_base(href,NR_STACK_POINTER_REG,a,0,[]);
reference_reset_base(href,NR_STACK_POINTER_REG,a,ctempposinvalid,0,[]);
{ normally, lea is a better choice than an add }
list.concat(Taicpu.op_ref_reg(A_LEA,TCGSize2OpSize[OS_ADDR],href,NR_STACK_POINTER_REG));
end;
@ -381,7 +381,7 @@ unit cgcpu;
'add $constant,%rsp' and 'lea offset(FPREG),%rsp' as belonging to
the function epilog.
Neither 'leave' nor even 'mov %FPREG,%rsp' are allowed. }
reference_reset_base(href,current_procinfo.framepointer,0,sizeof(pint),[]);
reference_reset_base(href,current_procinfo.framepointer,0,ctempposinvalid,sizeof(pint),[]);
list.concat(Taicpu.op_ref_reg(A_LEA,tcgsize2opsize[OS_ADDR],href,NR_STACK_POINTER_REG));
list.concat(Taicpu.op_reg(A_POP,tcgsize2opsize[OS_ADDR],current_procinfo.framepointer));
end

6
compiler/x86_64/hlcgcpu.pas
View File

@ -87,12 +87,12 @@ implementation
{ load vmt from first paramter }
{ win64 uses a different abi }
if x86_64_use_ms_abi(procdef.proccalloption) then
reference_reset_base(href,voidpointertype,NR_RCX,0,sizeof(pint),[])
reference_reset_base(href,voidpointertype,NR_RCX,0,ctempposinvalid,sizeof(pint),[])
else
reference_reset_base(href,voidpointertype,NR_RDI,0,sizeof(pint),[]);
reference_reset_base(href,voidpointertype,NR_RDI,0,ctempposinvalid,sizeof(pint),[]);
cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_RAX);
{ jmp *vmtoffs(%eax) ; method offs }
reference_reset_base(href,voidpointertype,NR_RAX,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),sizeof(pint),[]);
reference_reset_base(href,voidpointertype,NR_RAX,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),ctempposinvalid,sizeof(pint),[]);
list.concat(taicpu.op_ref(A_JMP,S_Q,href));
end
else

4
compiler/x86_64/nx64set.pas
View File

@ -123,13 +123,13 @@ implementation
basereg:=cg.getaddressregister(current_asmdata.CurrAsmList);
cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,href,basereg);
{ load table slot, 32-bit sign extended }
reference_reset_base(href,basereg,-aint(min_)*4,4,[]);
reference_reset_base(href,basereg,-aint(min_)*4,ctempposinvalid,4,[]);
href.index:=indexreg;
href.scalefactor:=4;
jumpreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_S32,OS_ADDR,href,jumpreg);
{ add table address }
reference_reset_base(href,basereg,0,sizeof(pint),[]);
reference_reset_base(href,basereg,0,ctempposinvalid,sizeof(pint),[]);
href.index:=jumpreg;
href.scalefactor:=1;
cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,href,jumpreg);