paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-04-07 17:47:56 +02:00
Code Issues Packages Projects Releases Wiki Activity

+ fpu_capabilities for arm

Browse Source 
* some code converted to use fpu_capabilities

git-svn-id: trunk@42536 -
This commit is contained in:
florian 2019-07-30 21:04:28 +00:00
parent 2b6ee838f9
commit 46bac33a2d
7 changed files with 33 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
compiler/arm/cgcpu.pas
View File

@ -1729,6 +1729,7 @@ unit cgcpu;
l: TAsmLabel;
begin
if ((cs_check_fpu_exceptions in current_settings.localswitches) and
not(FPUARM_HAS_EXCEPTION_TRAPPING in fpu_capabilities[current_settings.fputype]) and
(force or current_procinfo.FPUExceptionCheckNeeded)) then
begin
r:=getintregister(list,OS_INT);

25
compiler/arm/cpuinfo.pas
View File

@ -71,9 +71,13 @@ Type
fpu_vfpv3_d16,
fpu_fpv4_s16,
fpu_vfpv4
{ when new elements added afterwards, update also fpu_vfp_last below }
);
Const
fpu_vfp_first = fpu_vfpv2;
fpu_vfp_last = fpu_vfpv4;
fputypestrllvm : array[tfputype] of string[13] = ('',
'',
'',
@ -1049,6 +1053,13 @@ Const
CPUARM_HAS_UMULL
);
tfpuflags =
(
FPUARM_HAS_VFP_EXTENSION, { fpu is a vfp extension }
FPUARM_HAS_VMOV_CONST, { vmov supports (some) real constants }
FPUARM_HAS_EXCEPTION_TRAPPING { vfp does exceptions trapping }
);
const
cpu_capabilities : array[tcputype] of set of tcpuflags =
( { cpu_none } [],
@ -1072,6 +1083,20 @@ Const
{ cpu_armv7em } [CPUARM_HAS_ALL_MEM,CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_RBIT,CPUARM_HAS_LDREX,CPUARM_HAS_THUMB_IDIV,CPUARM_HAS_DMB,CPUARM_HAS_THUMB2,CPUARM_HAS_UMULL]
);
fpu_capabilities : array[tfputype] of set of tfpuflags =
( { fpu_none } [],
{ fpu_soft } [],
{ fpu_libgcc } [],
{ fpu_fpa } [],
{ fpu_fpa10 } [],
{ fpu_fpa11 } [],
{ fpu_vfpv2 } [FPUARM_HAS_VFP_EXTENSION],
{ fpu_vfpv3 } [FPUARM_HAS_VFP_EXTENSION,FPUARM_HAS_VMOV_CONST],
{ fpu_vfpv3_d16 } [FPUARM_HAS_VFP_EXTENSION,FPUARM_HAS_VMOV_CONST],
{ fpu_fpv4_s16 } [FPUARM_HAS_VFP_EXTENSION,FPUARM_HAS_VMOV_CONST],
{ fpu_vfpv4 } [FPUARM_HAS_VFP_EXTENSION,FPUARM_HAS_VMOV_CONST]
);
{ contains all CPU supporting any kind of thumb instruction set }
cpu_has_thumb = [cpu_armv4t,cpu_armv5t,cpu_armv5te,cpu_armv5tej,cpu_armv6t2,cpu_armv6z,cpu_armv6m,cpu_armv7a,cpu_armv7r,cpu_armv7m,cpu_armv7em];

4
compiler/arm/cpupara.pas
View File

@ -149,7 +149,7 @@ unit cpupara;
getparaloc:=LOC_MMREGISTER
else if (calloption in cdecl_pocalls) or
(cs_fp_emulation in current_settings.moduleswitches) or
(current_settings.fputype in [fpu_vfpv2,fpu_vfpv3,fpu_vfpv4,fpu_vfpv3_d16,fpu_fpv4_s16]) then
(current_settings.fputype in [fpu_vfp_first..fpu_vfp_last]) then
{ the ARM eabi also allows passing VFP values via VFP registers,
but Mac OS X doesn't seem to do that and linux only does it if
built with the "-mfloat-abi=hard" option }
@ -757,7 +757,7 @@ unit cpupara;
end
else if (p.proccalloption in [pocall_softfloat]) or
(cs_fp_emulation in current_settings.moduleswitches) or
(current_settings.fputype in [fpu_vfpv2,fpu_vfpv3,fpu_vfpv4,fpu_vfpv3_d16,fpu_fpv4_s16]) then
(current_settings.fputype in [fpu_vfp_first..fpu_vfp_last]) then
begin
case retcgsize of
OS_64,

2
compiler/arm/narmcal.pas
View File

@ -83,7 +83,7 @@ implementation
(target_info.abi<>abi_eabihf) and
(procdefinition.proccalloption<>pocall_hardfloat) and
((cs_fp_emulation in current_settings.moduleswitches) or
(current_settings.fputype in [fpu_vfpv2,fpu_vfpv3,fpu_vfpv4,fpu_vfpv3_d16,fpu_fpv4_s16])) then
(current_settings.fputype in [fpu_vfp_first..fpu_vfp_last])) then
begin
{ keep the fpu values in integer registers for now, the code
generator will move them to memory or an mmregister when necessary

6
compiler/arm/narmcnv.pas
View File

@ -117,11 +117,7 @@ implementation
fpu_fpa10,
fpu_fpa11:
expectloc:=LOC_FPUREGISTER;
fpu_vfpv2,
fpu_vfpv3,
fpu_vfpv4,
fpu_vfpv3_d16,
fpu_fpv4_s16:
fpu_vfp_first..fpu_vfp_last:
expectloc:=LOC_MMREGISTER;
else
internalerror(2009112702);

4
compiler/arm/narmcon.pas
View File

@ -54,7 +54,7 @@ interface
function tarmrealconstnode.pass_1 : tnode;
begin
result:=nil;
if (current_settings.fputype in [fpu_vfpv3,fpu_vfpv4,fpu_vfpv3_d16,fpu_fpv4_s16]) and
if (FPUARM_HAS_VMOV_CONST in fpu_capabilities[current_settings.fputype]) and
IsVFPFloatImmediate(tfloatdef(resultdef).floattype,value_real) then
expectloc:=LOC_MMREGISTER
else
@ -75,7 +75,7 @@ interface
pf : TOpPostfix;
begin
if (current_settings.fputype in [fpu_vfpv3,fpu_vfpv4,fpu_vfpv3_d16,fpu_fpv4_s16]) and
if (FPUARM_HAS_VMOV_CONST in fpu_capabilities[current_settings.fputype]) and
IsVFPFloatImmediate(tfloatdef(resultdef).floattype,value_real) then
begin
location_reset(location,LOC_MMREGISTER,def_cgsize(resultdef));

6
compiler/arm/narminl.pas
View File

@ -86,11 +86,7 @@ implementation
location.loc := LOC_FPUREGISTER;
end;
end;
fpu_vfpv2,
fpu_vfpv3,
fpu_vfpv4,
fpu_vfpv3_d16,
fpu_fpv4_s16:
fpu_vfp_first..fpu_vfp_last:
begin
hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,left.resultdef,true);
location_copy(location,left.location);