From 477b9ad5568da3430987d95eb6ffec03b7e6ae50 Mon Sep 17 00:00:00 2001 From: florian Date: Fri, 4 Oct 2024 22:56:52 +0200 Subject: [PATCH] + RiscV: FOp.sFsgnj.s02FOp.s optimization --- compiler/riscv/aoptcpurv.pas | 38 ++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/compiler/riscv/aoptcpurv.pas b/compiler/riscv/aoptcpurv.pas index 2c5342886b..42430a9557 100644 --- a/compiler/riscv/aoptcpurv.pas +++ b/compiler/riscv/aoptcpurv.pas @@ -48,6 +48,7 @@ type function PeepHoleOptPass1Cpu(var p: tai): boolean; override; function OptPass1OP(var p: tai): boolean; + function OptPass1FOP_S(var p: tai): boolean; function OptPass1Add(var p: tai): boolean; procedure RemoveInstr(var orig: tai; moveback: boolean=true); @@ -212,6 +213,38 @@ implementation end; + function TRVCpuAsmOptimizer.OptPass1FOP_S(var p : tai) : boolean; + var + hp1 : tai; + begin + result:=false; + { replace + %reg3,%reg2,%reg1 + fsgnj.s %reg4,%reg3,%reg3 + dealloc %reg3 + + by + %reg4,%reg2,%reg1 + ? + } + if GetNextInstruction(p,hp1) and + MatchInstruction(hp1,A_FSGNJ_S) and + MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^) and + MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[2]^) then + begin + TransferUsedRegs(TmpUsedRegs); + UpdateUsedRegs(TmpUsedRegs, tai(p.next)); + if not(RegUsedAfterInstruction(taicpu(hp1).oper[1]^.reg,hp1,TmpUsedRegs)) then + begin + taicpu(p).loadoper(0,taicpu(hp1).oper[0]^); + DebugMsg('Peephole FOp.sFsgnj.s02FOp.s done',p); + RemoveInstruction(hp1); + result:=true; + end; + end; + end; + + procedure TRVCpuAsmOptimizer.RemoveInstr(var orig: tai; moveback: boolean = true); var n: tai; @@ -676,6 +709,11 @@ implementation result:=true; end; end; + A_FADD_S, + A_FSUB_S, + A_FMUL_S, + A_FDIV_S: + result:=OptPass1FOP_S(p); else ; end;