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* improved support for merging two consecutive rlwinm's (now also works

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if both perform a rotation)

git-svn-id: trunk@3759 -
This commit is contained in:
Jonas Maebe 2006-05-31 20:25:39 +00:00
parent 3a3651a050
commit 488d8ae766
1 changed files with 4 additions and 3 deletions
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7
compiler/powerpc/aoptcpu.pas
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@ -286,15 +286,15 @@ const
(taicpu(next1).opcode = A_RLWINM) and (taicpu(next1).opcode = A_RLWINM) and
(taicpu(next1).oper[0]^.reg = taicpu(p).oper[0]^.reg) and (taicpu(next1).oper[0]^.reg = taicpu(p).oper[0]^.reg) and
// both source and target of next1 must equal target of p // both source and target of next1 must equal target of p
(taicpu(next1).oper[1]^.reg = taicpu(p).oper[0]^.reg) and (taicpu(next1).oper[1]^.reg = taicpu(p).oper[0]^.reg) then
(taicpu(next1).oper[2]^.val = 0) then
begin begin
l1 := rlwinm2mask(taicpu(p).oper[3]^.val,taicpu(p).oper[4]^.val); l1 := rlwinm2mask((taicpu(p).oper[3]^.val-taicpu(next1).oper[2]^.val) and 31,(taicpu(p).oper[4]^.val-taicpu(next1).oper[2]^.val) and 31);
l2 := rlwinm2mask(taicpu(next1).oper[3]^.val,taicpu(next1).oper[4]^.val); l2 := rlwinm2mask(taicpu(next1).oper[3]^.val,taicpu(next1).oper[4]^.val);
l1 := l1 and l2; l1 := l1 and l2;
case l1 of case l1 of
-1: -1:
begin begin
taicpu(p).oper[2]^.val := (taicpu(p).oper[2]^.val + taicpu(next1).oper[2]^.val) and 31;
asml.remove(next1); asml.remove(next1);
next1.free; next1.free;
if (taicpu(p).oper[2]^.val = 0) then if (taicpu(p).oper[2]^.val = 0) then
@ -322,6 +322,7 @@ const
end end
else if tcgppc(cg).get_rlwi_const(l1,l1,l2) then else if tcgppc(cg).get_rlwi_const(l1,l1,l2) then
begin begin
taicpu(p).oper[2]^.val := (taicpu(p).oper[2]^.val + taicpu(next1).oper[2]^.val) and 31;
taicpu(p).oper[3]^.val := l1; taicpu(p).oper[3]^.val := l1;
taicpu(p).oper[4]^.val := l2; taicpu(p).oper[4]^.val := l2;
asml.remove(next1); asml.remove(next1);