mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-04-07 05:08:06 +02:00
* Replaced all user defined warnings by TODO comments to reduce compiler noise.
git-svn-id: trunk@11443 -
This commit is contained in:
parent
fd0ed50331
commit
491f0fa1d8
@ -249,7 +249,7 @@ implementation
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{ not relocated properly on e.g. linux/ppc64. g++ generates there for a }
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{ vtable for a class called Window: }
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{ .section .data.rel.ro._ZTV6Window,"awG",@progbits,_ZTV6Window,comdat }
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{$warning TODO .data.ro not yet working}
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{ TODO: .data.ro not yet working}
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{$if defined(arm) or defined(powerpc)}
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'.rodata',
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{$else arm}
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@ -1040,7 +1040,7 @@ Unit AoptObj;
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if GetNextInstruction(p, hp1) then
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begin
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if FindLabel(tasmlabel(taicpu(p).oper[0]^.ref^.symbol), hp1) and
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{$warning FIXME removing the first instruction fails}
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{ TODO: FIXME removing the first instruction fails}
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(p<>blockstart) then
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begin
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hp2:=tai(hp1.next);
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@ -89,7 +89,7 @@ unit cpubase;
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first_mm_supreg = RS_S0;
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first_mm_imreg = $20;
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{$warning TODO Calculate bsstart}
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{ TODO: Calculate bsstart}
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regnumber_count_bsstart = 64;
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regnumber_table : array[tregisterindex] of tregister = (
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@ -102,7 +102,7 @@ unit cpubase;
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first_mm_supreg = RS_INVALID;
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first_mm_imreg = RS_INVALID;
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{$warning TODO Calculate bsstart}
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{ TODO: Calculate bsstart}
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regnumber_count_bsstart = 64;
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regnumber_table : array[tregisterindex] of tregister = (
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@ -395,7 +395,7 @@ implementation
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procedure TDwarfAsmCFI.cfa_offset(list:TAsmList;reg:tregister;ofs:longint);
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begin
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cfa_advance_loc(list);
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{$warning TODO check if ref is a temp}
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{ TODO: check if ref is a temp}
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{ offset must be positive }
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DwarfList.concat(tdwarfitem.create_reg_const(DW_CFA_offset_extended,doe_uleb,reg,doe_uleb,ofs div data_alignment_factor));
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end;
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@ -1758,7 +1758,7 @@ implementation
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begin
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if (vo_is_thread_var in sym.varoptions) then
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begin
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{$warning !!! FIXME: dwarf for thread vars !!!}
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{ TODO: !!! FIXME: dwarf for thread vars !!!}
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blocksize:=0;
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end
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else
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@ -963,7 +963,7 @@ implementation
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begin
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if tabstractnormalvarsym(def.funcretsym).localloc.loc=LOC_REFERENCE then
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begin
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{$warning Need to add gdb support for ret in param register calling}
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{ TODO: Need to add gdb support for ret in param register calling}
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if paramanager.ret_in_param(def.returndef,def.proccalloption) then
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hs:='X*'
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else
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@ -982,7 +982,7 @@ uses
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ibloadunit :
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readloadunit;
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ibasmsymbols :
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{$warning TODO Remove ibasmsymbols}
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{ TODO: Remove ibasmsymbols}
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;
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ibendimplementation :
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break;
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@ -2226,7 +2226,7 @@ implementation
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tve_shortint,tve_smallint,tve_longint,tve_chari64,
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tve_boolformal,tve_boolformal,tve_boolformal,tve_boolformal,tve_boolformal,
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tve_chari64,tve_chari64,tve_dblcurrency);
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{$warning fixme for 128 bit floats }
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{ TODO: fixme for 128 bit floats }
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variantfloatdef_cl: array[tfloattype] of tvariantequaltype =
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(tve_single,tve_dblcurrency,tve_extended,
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tve_dblcurrency,tve_dblcurrency,tve_extended);
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@ -627,7 +627,7 @@ begin
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if GetNextInstruction(p, hp1) then
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begin
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if FindLabel(tasmlabel(taicpu(p).oper[0]^.ref^.symbol), hp1) and
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{$warning FIXME removing the first instruction fails}
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{ TODO: FIXME removing the first instruction fails}
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(p<>blockstart) then
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begin
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hp2:=tai(hp1.next);
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@ -866,7 +866,7 @@ Implementation
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var
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objreader : TObjectReader;
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begin
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{$warning TODO Cleanup ignoring of FPC generated libimp*.a files}
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{ TODO: Cleanup ignoring of FPC generated libimp*.a files}
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{ Don't load import libraries }
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if copy(ExtractFileName(para),1,6)='libimp' then
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exit;
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@ -1027,7 +1027,7 @@ Implementation
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Message1(exec_i_linking,outputname);
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FlushOutput;
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{$warning TODO Load custom linker script}
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{ TODO: Load custom linker script}
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DefaultLinkScript;
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exeoutput:=CExeOutput.Create;
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@ -1084,7 +1084,7 @@ Implementation
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exeoutput.WriteExeFile(outputname);
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end;
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{$warning TODO fixed section names}
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{ TODO: fixed section names}
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status.codesize:=exeoutput.findexesection('.text').size;
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status.datasize:=exeoutput.findexesection('.data').size;
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bsssec:=exeoutput.findexesection('.bss');
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@ -107,7 +107,7 @@ type
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globtype;
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{$WARNING FIX ME!! useful for debug, remove it, same table as in ag68kgas }
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{ TODO: FIX ME!! useful for debug, remove it, same table as in ag68kgas }
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const
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gas_op2str:op2strtable=
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{ warning: CPU32 opcodes are not fully compatible with the MC68020. }
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@ -526,7 +526,7 @@ type
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A_NEG, A_EXT, A_EXTB, A_NOT:
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result:=operand_readwrite;
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else begin
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{$WARNING FIX ME!!! remove ugly debug code ... }
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{ TODO: FIX ME!!! remove ugly debug code ... }
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writeln('M68K: unknown opcode when spilling: ',gas_op2str[opcode]);
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internalerror(200404091);
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end;
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@ -243,7 +243,7 @@ unit cgcpu;
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// writeln('a_param_reg');
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{$endif DEBUG_CHARLIE}
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{ it's probably necessary to port this from x86 later, or provide an m68k solution (KB) }
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{$WARNING FIX ME! check_register_size()}
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{ TODO: FIX ME! check_register_size()}
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// check_register_size(size,r);
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if use_push(cgpara) then
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begin
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@ -298,7 +298,7 @@ unit cgcpu;
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begin
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if not assigned(paraloc) then
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exit;
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{$WARNING FIX ME!!! this also triggers location bug }
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{ TODO: FIX ME!!! this also triggers location bug }
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{if (paraloc^.loc<>LOC_REFERENCE) or
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(paraloc^.reference.index<>NR_STACK_POINTER_REG) or
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(tcgsize2size[paraloc^.size]>sizeof(aint)) then
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@ -569,7 +569,7 @@ unit cgcpu;
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href : treference;
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// p: pointer;
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begin
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{$WARNING FIX ME!!! take a look on this mess again...}
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{ TODO: FIX ME!!! take a look on this mess again...}
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// if getregtype(r)=R_ADDRESSREGISTER then
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// begin
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// writeln('address reg?!?');
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@ -1369,7 +1369,7 @@ unit cgcpu;
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begin
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{ only 68020+ supports RTD, so this needs another code path
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for 68000 and Coldfire (KB) }
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{$WARNING 68020+ only code generation, without fallback}
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{ TODO: 68020+ only code generation, without fallback}
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list.concat(taicpu.op_const(A_RTD,S_NO,parasize));
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end
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else
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@ -129,7 +129,7 @@ unit cpubase;
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maxfpuregs = 8;
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{$WARNING TODO FIX BSSTART}
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{ TODO: FIX BSSTART}
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regnumber_count_bsstart = 16;
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regnumber_table : array[tregisterindex] of tregister = (
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@ -141,7 +141,7 @@ unit cpubase;
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);
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regdwarf_table : array[tregisterindex] of shortint = (
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{$warning TODO reused stabs values!}
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{ TODO: reused stabs values!}
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{$i r68ksta.inc}
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);
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@ -253,7 +253,7 @@ unit cpubase;
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NR_STACK_POINTER_REG = NR_SP;
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RS_STACK_POINTER_REG = RS_SP;
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{# Frame pointer register }
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{$warning FIX ME!!! frame pointer is A5 on Amiga, but A6 on unixes?}
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{ TODO: FIX ME!!! frame pointer is A5 on Amiga, but A6 on unixes?}
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NR_FRAME_POINTER_REG = NR_A5;
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RS_FRAME_POINTER_REG = RS_A5;
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@ -261,10 +261,10 @@ unit cpubase;
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such as in PIC code. The exact meaning is ABI specific. For
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further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
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}
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{$warning FIX ME!!! pic offset reg conflicts with frame pointer?}
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{ TODO: FIX ME!!! pic offset reg conflicts with frame pointer?}
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NR_PIC_OFFSET_REG = NR_A5;
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{ Return address for DWARF }
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{$warning TODO just a guess!}
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{ TODO: just a guess!}
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NR_RETURN_ADDRESS_REG = NR_A0;
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{ Results are returned in this register (32-bit values) }
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NR_FUNCTION_RETURN_REG = NR_D0;
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@ -412,7 +412,7 @@ implementation
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begin
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case s of
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OS_NO: begin
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{$WARNING FIX ME!!! results in bad code generation}
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{ TODO: FIX ME!!! results in bad code generation}
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cgsize2subreg:=R_SUBWHOLE;
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end;
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@ -495,7 +495,7 @@ implementation
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function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
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const
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inverse:array[TAsmCond] of TAsmCond=(C_None,
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{$warning TODO, this is just a copy!}
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{ TODO: TODO, this is just a copy!}
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C_CC,C_LS,C_CS,C_LT,C_EQ,C_MI,C_F,C_NE,
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C_GE,C_PL,C_GT,C_T,C_HI,C_VC,C_LE,C_VS
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);
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@ -144,7 +144,7 @@ unit cpupara;
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end;
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{$warning copied from ppc cg, needs work}
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{ TODO: copied from ppc cg, needs work}
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function tm68kparamanager.push_addr_param(varspez:tvarspez;def : tdef;calloption : tproccalloption) : boolean;
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begin
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result:=false;
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begin
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secondpass(left);
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{$warning needs LOC_JUMP support, because called for bool_to_bool from ncgcnv }
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{ TODO: needs LOC_JUMP support, because called for bool_to_bool from ncgcnv }
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{ Explicit typecasts from any ordinal type to a boolean type }
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{ must not change the ordinal value }
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@ -260,7 +260,7 @@ implementation
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end;
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{$WARNING FIX ME!!! shlshrnode needs review}
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{ TODO: FIX ME!!! shlshrnode needs review}
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procedure tm68kshlshrnode.pass_generate_code;
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var
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hregister,resultreg,hregister1,
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@ -105,7 +105,7 @@ unit cpubase;
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first_mm_supreg = RS_NO;
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first_mm_imreg = RS_NO;
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{$warning TODO Calculate bsstart}
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{ TODO: Calculate bsstart}
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regnumber_count_bsstart = 64;
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regnumber_table : array[tregisterindex] of tregister = (
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@ -1439,7 +1439,7 @@ implementation
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strtype:= st_longstring
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else
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begin
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{$warning todo: add a warning/hint here if one converting a too large array}
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{ TODO: todo: add a warning/hint here if one converting a too large array}
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{ nodes is PChar, array [with size > 255] or OpenArrayOfChar.
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Note: Delphi halts with error if "array [0..xx] of char"
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is assigned to ShortString and string length is less
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@ -616,7 +616,7 @@ implementation
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hp : tai;
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begin
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inherited ppuwrite(ppufile);
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{$warning FIXME Add saving of register sets}
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{ TODO: FIXME Add saving of register sets}
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if not(nf_get_asm_position in flags) then
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begin
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hp:=tai(p_asm.first);
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@ -975,7 +975,7 @@ implementation
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funcretnode:=ppuloadnode(ppufile);
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inherited ppuload(t,ppufile);
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ppufile.getderef(symtableprocentryderef);
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{$warning FIXME: No withsymtable support}
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{ TODO: FIXME: No withsymtable support}
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symtableproc:=nil;
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ppufile.getderef(procdefinitionderef);
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ppufile.getsmallset(callnodeflags);
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@ -711,7 +711,7 @@ implementation
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end
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else
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begin
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{$warning HACK: unaligned test, maybe remove all unaligned locations (array of char) from the compiler}
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{ TODO: HACK: unaligned test, maybe remove all unaligned locations (array of char) from the compiler}
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{ Use unaligned copy when the offset is not aligned }
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len:=left.resultdef.size;
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if (right.location.reference.offset mod sizeof(aint)<>0) or
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@ -2600,7 +2600,7 @@ implementation
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{ equal sets for the code generator? }
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else if (left.resultdef.size=resultdef.size) and
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(tsetdef(left.resultdef).setbase=tsetdef(resultdef).setbase) then
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{$warning This causes wrong (but Delphi-compatible) results for disjoint subsets}
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{ TODO: This causes wrong (but Delphi-compatible) results for disjoint subsets}
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{ e.g., this prints true because of this:
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var
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sa: set of 1..2;
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@ -851,9 +851,9 @@ implementation
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secoptions : array[TAsmSectiontype] of TObjSectionOptions = ([],
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{code} [oso_Data,oso_load,oso_readonly,oso_executable,oso_keep],
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{Data} [oso_Data,oso_load,oso_write,oso_keep],
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{$warning TODO Fix sec_rodata be read-only-with-relocs}
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{ TODO: Fix sec_rodata be read-only-with-relocs}
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{roData} [oso_Data,oso_load,oso_write,oso_keep],
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{$warning TODO Fix sec_rodata_norel be read-only/constant}
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{ TODO: Fix sec_rodata_norel be read-only/constant}
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{roData_norel} [oso_Data,oso_load,oso_write,oso_keep],
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{bss} [oso_load,oso_write,oso_keep],
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{threadvar} [oso_load,oso_write],
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@ -2483,7 +2483,7 @@ implementation
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begin
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objsec:=TObjSection(ObjData.ObjSectionList[j]);
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objsec.Used:=false;
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{$warning TODO remove debug section always keep}
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{ TODO: remove debug section always keep}
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if oso_debug in objsec.secoptions then
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objsec.Used:=true;
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if (oso_keep in objsec.secoptions) then
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@ -1836,7 +1836,7 @@ const pemagic : array[0..3] of byte = (
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include(secoptions,oso_keep);
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if (Copy(secname,1,6)='.idata') then
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begin
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{$warning TODO idata keep can maybe replaced with grouping of text and idata}
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{ TODO: idata keep can maybe replaced with grouping of text and idata}
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include(secoptions,oso_keep);
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secname:=secname + '.' + ExtractFileName(InputFileName);
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end;
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@ -1797,7 +1797,7 @@ begin
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inc(pc);
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{ create argument }
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arglen:=pc-argstart;
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{$warning FIXME: silent truncation of environment parameters }
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{ TODO: FIXME: silent truncation of environment parameters }
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if (arglen > 255) then
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arglen := 255;
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setlength(hs,arglen);
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|
@ -168,7 +168,7 @@ const
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RS_F10,RS_F11,RS_F12,RS_F13,RS_F31,RS_F30,RS_F29,RS_F28,RS_F27,
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RS_F26,RS_F25,RS_F24,RS_F23,RS_F22,RS_F21,RS_F20,RS_F19,RS_F18,
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RS_F17,RS_F16,RS_F15,RS_F14],first_fpu_imreg,[]);
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{$warning FIX ME}
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{ TODO: FIX ME}
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rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBNONE,
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[RS_M0,RS_M1,RS_M2],first_mm_imreg,[]);
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end;
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@ -973,7 +973,7 @@ const
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{ with RS_R30 it's also already smaller, but too big a speed trade-off to make }
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(firstregint <= RS_R29)) then
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begin
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{$warning TODO: 64 bit support }
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{ TODO: TODO: 64 bit support }
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dec(href.offset,(RS_R31-firstregint)*sizeof(pint));
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list.concat(taicpu.op_reg_ref(A_STMW,newreg(R_INTREGISTER,firstregint,R_SUBNONE),href));
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end
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@ -1089,7 +1089,7 @@ const
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{ with RS_R30 it's also already smaller, but too big a speed trade-off to make }
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(firstregint <= RS_R29)) then
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begin
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{$warning TODO: 64 bit support }
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{ TODO: TODO: 64 bit support }
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dec(href.offset,(RS_R31-firstregint)*sizeof(pint));
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list.concat(taicpu.op_reg_ref(A_LMW,newreg(R_INTREGISTER,firstregint,R_SUBNONE),href));
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end
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|
@ -127,7 +127,7 @@ uses
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{ MM Super register first and last }
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first_mm_imreg = $20;
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{$warning TODO Calculate bsstart}
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{ TODO: Calculate bsstart}
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regnumber_count_bsstart = 64;
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regnumber_table : array[tregisterindex] of tregister = (
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@ -305,7 +305,7 @@ uses
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Taken from GCC rs6000.h
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}
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{$warning As indicated in rs6000.h, but can't find it anywhere else!}
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{ TODO: As indicated in rs6000.h, but can't find it anywhere else!}
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NR_PIC_OFFSET_REG = NR_R30;
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{ Return address of a function }
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NR_RETURN_ADDRESS_REG = NR_R0;
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|
@ -379,7 +379,7 @@ begin
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RS_F10, RS_F11, RS_F12, RS_F13, RS_F31, RS_F30, RS_F29, RS_F28, RS_F27,
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RS_F26, RS_F25, RS_F24, RS_F23, RS_F22, RS_F21, RS_F20, RS_F19, RS_F18,
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RS_F17, RS_F16, RS_F15, RS_F14], first_fpu_imreg, []);
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{$WARNING FIX ME}
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{ TODO: FIX ME}
|
||||
rg[R_MMREGISTER] := trgcpu.create(R_MMREGISTER, R_SUBNONE,
|
||||
[RS_M0, RS_M1, RS_M2], first_mm_imreg, []);
|
||||
end;
|
||||
|
@ -146,7 +146,7 @@ const
|
||||
{ MM Super register first and last }
|
||||
first_mm_imreg = $20;
|
||||
|
||||
{$WARNING TODO Calculate bsstart}
|
||||
{ TODO: Calculate bsstart}
|
||||
regnumber_count_bsstart = 64;
|
||||
|
||||
regnumber_table: array[tregisterindex] of tregister = (
|
||||
@ -317,7 +317,7 @@ const
|
||||
|
||||
Taken from GCC rs6000.h
|
||||
}
|
||||
{$WARNING As indicated in rs6000.h, but can't find it anywhere else!}
|
||||
{ TODO: As indicated in rs6000.h, but can't find it anywhere else!}
|
||||
NR_PIC_OFFSET_REG = NR_R30;
|
||||
{ Return address of a function }
|
||||
NR_RETURN_ADDRESS_REG = NR_R0;
|
||||
|
@ -560,7 +560,7 @@ implementation
|
||||
aiclass[ait_ent]:=tai_ent;
|
||||
{$endif alpha}
|
||||
{$ifdef m68k}
|
||||
{$warning FIXME: tai_labeled_instruction doesn't exists}
|
||||
{ TODO: FIXME: tai_labeled_instruction doesn't exists}
|
||||
// aiclass[ait_labeled_instruction]:=tai_labeled_instruction;
|
||||
{$endif m68k}
|
||||
{$ifdef ia64}
|
||||
|
@ -298,7 +298,7 @@ implementation
|
||||
if assigned(regvarinfo^.regvars[i]) and
|
||||
(getsupreg(tvarsym(regvarinfo^.regvars[i]).localloc.register)=supreg) then
|
||||
begin
|
||||
{$warning fixme regvar_loaded_int}
|
||||
{ TODO: fixme regvar_loaded_int}
|
||||
(* if supreg in rg.regvar_loaded_int then
|
||||
begin
|
||||
vsym := tvarsym(regvarinfo^.regvars[i]);
|
||||
@ -306,7 +306,7 @@ implementation
|
||||
{ possible that it's been modified (JM) }
|
||||
if not(vsym.varspez in [vs_const,vs_var,vs_out]) then
|
||||
begin
|
||||
{$warning FIXME Check vsym.localloc for regvars}
|
||||
{ TODO: FIXME Check vsym.localloc for regvars}
|
||||
// reference_reset_base(hr,current_procinfo.framepointer,vsym.adjusted_address);
|
||||
cgsize:=def_cgsize(vsym.vardef);
|
||||
cg.a_load_reg_ref(asml,cgsize,cgsize,vsym.localloc.register,hr);
|
||||
@ -323,7 +323,7 @@ implementation
|
||||
for i := 1 to maxvarregs do
|
||||
if assigned(regvarinfo^.regvars[i]) then
|
||||
begin
|
||||
{$warning fixme regvars}
|
||||
{ TODO: fixme regvars}
|
||||
(*
|
||||
r:=rg.makeregsize(regvarinfo^.regvars[i].localloc.register,OS_INT);
|
||||
if (r = reg) then
|
||||
@ -336,7 +336,7 @@ implementation
|
||||
{ possible that it's been modified (JM) }
|
||||
if not(vsym.varspez in [vs_const,vs_var,vs_out]) then
|
||||
begin
|
||||
{$warning FIXME Check vsym.localloc for regvars}
|
||||
{ TODO: FIXME Check vsym.localloc for regvars}
|
||||
// reference_reset_base(hr,current_procinfo.framepointer,vsym.adjusted_address);
|
||||
cgsize:=def_cgsize(vsym.vardef);
|
||||
cg.a_load_reg_ref(asml,cgsize,cgsize,vsym.localloc.register,hr);
|
||||
@ -364,7 +364,7 @@ implementation
|
||||
exit;
|
||||
{$endif i386}
|
||||
reg:=vsym.localloc.register;
|
||||
{$warning fixme regvars}
|
||||
{ TODO: fixme regvars}
|
||||
(*
|
||||
if getregtype(reg)=R_INTREGISTER then
|
||||
begin
|
||||
@ -372,7 +372,7 @@ implementation
|
||||
if not(getsupreg(reg) in rg.regvar_loaded_int) then
|
||||
begin
|
||||
asml.concat(tai_regalloc.alloc(reg));
|
||||
{$warning FIXME Check vsym.localloc for regvars}
|
||||
{ TODO: FIXME Check vsym.localloc for regvars}
|
||||
// reference_reset_base(hr,current_procinfo.framepointer,vsym.adjusted_address);
|
||||
if paramanager.push_addr_param(vsym.varspez,vsym.vardef,current_procinfo.procdef.proccalloption) then
|
||||
opsize := OS_ADDR
|
||||
@ -389,7 +389,7 @@ implementation
|
||||
if not rg.regvar_loaded_other[regidx] then
|
||||
begin
|
||||
asml.concat(tai_regalloc.alloc(reg));
|
||||
{$warning FIXME Check vsym.localloc for regvars}
|
||||
{ TODO: FIXME Check vsym.localloc for regvars}
|
||||
// reference_reset_base(hr,current_procinfo.framepointer,vsym.adjusted_address);
|
||||
if paramanager.push_addr_param(vsym.varspez,vsym.vardef,current_procinfo.procdef.proccalloption) then
|
||||
opsize := OS_ADDR
|
||||
@ -469,7 +469,7 @@ implementation
|
||||
begin
|
||||
{$ifdef i386}
|
||||
{ reserve place on the FPU stack }
|
||||
{$warning fixme fpustack}
|
||||
{ TODO: fixme fpustack}
|
||||
(*
|
||||
regvarinfo^.fpuregvars[i].localloc.register:=trgcpu(rg).correct_fpuregister(NR_ST0,i-1);
|
||||
*)
|
||||
@ -578,7 +578,7 @@ implementation
|
||||
begin
|
||||
reg:=cg.makeregsize(reg,OS_INT);
|
||||
regidx:=findreg_by_number(reg);
|
||||
{$warning fixme regvar dealloc}
|
||||
{ TODO: fixme regvar dealloc}
|
||||
{
|
||||
if (rg.regvar_loaded_other[regidx]) then
|
||||
asml.concat(tai_regalloc.dealloc(reg));
|
||||
|
@ -34,7 +34,7 @@ uses
|
||||
*****************************************************************************}
|
||||
|
||||
type
|
||||
{$WARNING CPU32 opcodes do not fully include the Ultra SPRAC instruction set.}
|
||||
{ TODO: CPU32 opcodes do not fully include the Ultra SPRAC instruction set.}
|
||||
{ don't change the order of these opcodes! }
|
||||
TAsmOp=({$i opcode.inc});
|
||||
|
||||
@ -75,7 +75,7 @@ uses
|
||||
first_mm_supreg = 0;
|
||||
first_mm_imreg = 1;
|
||||
|
||||
{$warning TODO Calculate bsstart}
|
||||
{ TODO: Calculate bsstart}
|
||||
regnumber_count_bsstart = 128;
|
||||
|
||||
regnumber_table : array[tregisterindex] of tregister = (
|
||||
@ -198,7 +198,7 @@ uses
|
||||
usableregsaddr = [];
|
||||
c_countusableregsaddr = 0;
|
||||
|
||||
{$warning firstsaveintreg shall be RS_NO}
|
||||
{ TODO: firstsaveintreg shall be RS_NO}
|
||||
firstsaveintreg = RS_L0; { Temporary, having RS_NO is broken }
|
||||
lastsaveintreg = RS_L0; { L0..L7 are already saved, I0..O7 are parameter }
|
||||
firstsavefpureg = RS_F2; { F0..F1 is used for return value }
|
||||
@ -259,7 +259,7 @@ uses
|
||||
|
||||
Taken from GCC rs6000.h
|
||||
}
|
||||
{$warning As indicated in rs6000.h, but can't find it anywhere else!}
|
||||
{ TODO: As indicated in rs6000.h, but can't find it anywhere else!}
|
||||
{PIC_OFFSET_REG = R_30;}
|
||||
{ Return address for DWARF }
|
||||
NR_RETURN_ADDRESS_REG = NR_I7;
|
||||
|
@ -2705,7 +2705,7 @@ implementation
|
||||
minparacount:=0;
|
||||
maxparacount:=0;
|
||||
ppufile.getderef(returndefderef);
|
||||
{$warning TODO remove fpu_used loading}
|
||||
{ TODO: remove fpu_used loading}
|
||||
ppufile.getbyte;
|
||||
proctypeoption:=tproctypeoption(ppufile.getbyte);
|
||||
proccalloption:=tproccalloption(ppufile.getbyte);
|
||||
@ -3924,7 +3924,7 @@ implementation
|
||||
|
||||
function tobjectdef.getparentdef:tdef;
|
||||
begin
|
||||
{$warning TODO Remove getparentdef hack}
|
||||
{ TODO: Remove getparentdef hack}
|
||||
{ With 2 forward declared classes with the child class before the
|
||||
parent class the child class is written earlier to the ppu. Leaving it
|
||||
possible to have a reference to the parent class for property overriding,
|
||||
|
@ -635,7 +635,7 @@ implementation
|
||||
|
||||
if assigned(s) then
|
||||
begin
|
||||
{$warning TODO ugly hack}
|
||||
{ TODO: ugly hack}
|
||||
if s is tsym then
|
||||
st:=FindUnitSymtable(tsym(s).owner)
|
||||
else
|
||||
|
@ -271,7 +271,7 @@ end;
|
||||
|
||||
initialization
|
||||
{$ifdef m68k}
|
||||
{$warning No executable creation support for m68k yet!}
|
||||
{ TODO: No executable creation support for m68k yet!}
|
||||
RegisterExternalLinker(system_m68k_Amiga_info,TLinkerAmiga);
|
||||
RegisterTarget(system_m68k_Amiga_info);
|
||||
{$endif m68k}
|
||||
|
@ -163,7 +163,7 @@ uses
|
||||
{$endif x86_64}
|
||||
|
||||
const
|
||||
{$warning TODO Calculate bsstart}
|
||||
{ TODO: Calculate bsstart}
|
||||
regnumber_count_bsstart = 64;
|
||||
|
||||
regnumber_table : array[tregisterindex] of tregister = (
|
||||
|
@ -302,7 +302,7 @@ implementation
|
||||
begin
|
||||
used_in_proc:=used_in_proc+s;
|
||||
|
||||
{$warning TODO firstsavefpureg}
|
||||
{ TODO: firstsavefpureg}
|
||||
(*
|
||||
{ don't try to save the fpu registers if not desired (e.g. for }
|
||||
{ the 80x86) }
|
||||
@ -338,7 +338,7 @@ implementation
|
||||
hr : treference;
|
||||
}
|
||||
begin
|
||||
{$warning TODO firstsavefpureg}
|
||||
{ TODO: firstsavefpureg}
|
||||
(*
|
||||
if firstsavefpureg <> R_NO then
|
||||
for r.enum:=lastsavefpureg downto firstsavefpureg do
|
||||
|
@ -69,7 +69,7 @@ unit cpupara;
|
||||
function structure_in_registers(varspez:tvarspez;size:longint):boolean;
|
||||
begin
|
||||
if (target_info.system=system_x86_64_win64) then
|
||||
{$warning Temporary hack: vs_const parameters are always passed by reference for win64}
|
||||
{ TODO: Temporary hack: vs_const parameters are always passed by reference for win64}
|
||||
result:=(varspez=vs_value) and (size in [1,2,4,8])
|
||||
else
|
||||
result:=(size<=16);
|
||||
@ -84,7 +84,7 @@ unit cpupara;
|
||||
orddef:
|
||||
begin
|
||||
loc1:=LOC_REGISTER;
|
||||
{$warning TODO 128bit also needs lochigh}
|
||||
{ TODO: 128bit also needs lochigh}
|
||||
end;
|
||||
floatdef:
|
||||
begin
|
||||
@ -101,7 +101,7 @@ unit cpupara;
|
||||
begin
|
||||
loc1:=LOC_MMREGISTER;
|
||||
loc2:=LOC_MMREGISTER;
|
||||
{$warning TODO float 128bit needs SSEUP lochigh}
|
||||
{ TODO: float 128bit needs SSEUP lochigh}
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
|
Loading…
Reference in New Issue
Block a user