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* fixed register size of uxtb in case of a 64 bit scan operation

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(mantis #27954)

git-svn-id: trunk@30724 -
This commit is contained in:
Jonas Maebe 2015-04-25 16:36:45 +00:00
parent 864f9b24cc
commit 49aef02ef2
1 changed files with 1 additions and 1 deletions
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compiler/aarch64/cgcpu.pas
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@ -1110,7 +1110,7 @@ implementation
list.Concat(taicpu.op_reg_reg_reg_cond(A_CSINV,dst,dst,makeregsize(NR_XZR,dstsize),C_NE)); list.Concat(taicpu.op_reg_reg_reg_cond(A_CSINV,dst,dst,makeregsize(NR_XZR,dstsize),C_NE));
{ mask the -1 to 255 if src was 0 (anyone find a two-instruction { mask the -1 to 255 if src was 0 (anyone find a two-instruction
branch-free version? All of mine are 3...) } branch-free version? All of mine are 3...) }
list.Concat(setoppostfix(taicpu.op_reg_reg(A_UXT,dst,dst),PF_B)); list.Concat(setoppostfix(taicpu.op_reg_reg(A_UXT,makeregsize(dst,OS_32),makeregsize(dst,OS_32)),PF_B));
end; end;