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* Adding register allocation order
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@ -64,6 +64,9 @@ unit cgobj;
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{ basic routines }
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constructor create;
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procedure init_register_allocators;virtual;abstract;
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procedure done_register_allocators;virtual;abstract;
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{ returns the tcgsize corresponding with the size of reg }
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class function reg_cgsize(const reg: tregister) : tcgsize; virtual;
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@ -1536,7 +1539,10 @@ finalization
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end.
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{
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$Log$
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Revision 1.119 2003-09-07 22:09:34 peter
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Revision 1.120 2003-09-09 20:59:27 daniel
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* Adding register allocation order
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Revision 1.119 2003/09/07 22:09:34 peter
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* preparations for different default calling conventions
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* various RA fixes
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@ -38,8 +38,6 @@ unit rgcpu;
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trgcpu = class(trgobj)
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fpuvaroffset : byte;
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constructor create;override;
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{ to keep the same allocation order as with the old routines }
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procedure add_constraints(reg:Tregister);override;
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@ -87,13 +85,6 @@ unit rgcpu;
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{ trgcpu }
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{************************************************************************}
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constructor Trgcpu.create;
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begin
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inherited create;
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cpu_registers:=6;
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end;
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procedure Trgcpu.add_constraints(reg:Tregister);
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var
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supreg : tsuperregister;
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@ -250,12 +241,14 @@ unit rgcpu;
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initialization
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crgobj:=trgcpu;
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end.
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{
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$Log$
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Revision 1.33 2003-09-07 22:09:35 peter
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Revision 1.34 2003-09-09 20:59:27 daniel
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* Adding register allocation order
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Revision 1.33 2003/09/07 22:09:35 peter
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* preparations for different default calling conventions
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* various RA fixes
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@ -40,7 +40,7 @@ implementation
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globals,verbose,fmodule,finput,fppu,
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symconst,symbase,symtype,symdef,symsym,symtable,
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aasmbase,aasmtai,aasmcpu,
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cgbase,cpuinfo,rgobj,
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cgbase,cpuinfo,cgobj,
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ncgutil,
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link,assemble,import,export,gendef,ppu,comprsrc,
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cresstr,cpubase,
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@ -727,7 +727,7 @@ implementation
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current_module.procinfo:=current_procinfo;
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current_procinfo.procdef:=pd;
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{ start register allocator }
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rg:=crgobj.create;
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cg.init_register_allocators;
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{ return procdef }
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create_main_proc:=pd;
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end;
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@ -741,7 +741,7 @@ implementation
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not(current_procinfo.procdef=pd) then
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internalerror(200304276);
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{ remove register allocator }
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rg.free;
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cg.done_register_allocators;
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{ remove procinfo }
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current_module.procinfo:=nil;
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current_procinfo.free;
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@ -1471,7 +1471,10 @@ implementation
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end.
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{
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$Log$
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Revision 1.123 2003-09-09 15:55:44 peter
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Revision 1.124 2003-09-09 20:59:27 daniel
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* Adding register allocation order
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Revision 1.123 2003/09/09 15:55:44 peter
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* use register with least interferences in spillregister
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Revision 1.122 2003/09/07 22:09:35 peter
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@ -89,7 +89,7 @@ implementation
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scanner,
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pbase,pstatmnt,pdecl,pdecsub,pexports,
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{ codegen }
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tgobj,rgobj,
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tgobj,rgobj,cgobj,
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ncgutil,regvars
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{$ifndef NOOPT}
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{$ifdef i386}
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@ -610,7 +610,7 @@ implementation
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tg.setfirsttemp(firsttemp_offset);
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{ Create register allocator }
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rg:=crgobj.create;
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cg.init_register_allocators;
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{$warning FIXME!!}
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{ FIXME!! If a procedure contains assembler blocks (or is pure assembler), }
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@ -757,7 +757,7 @@ implementation
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remove_from_symtablestack;
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{ restore }
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rg.free;
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cg.done_register_allocators;
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templist.free;
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rg:=oldrg;
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aktmaxfpuregisters:=oldaktmaxfpuregisters;
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@ -1315,7 +1315,10 @@ begin
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end.
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{
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$Log$
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Revision 1.143 2003-09-09 15:55:44 peter
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Revision 1.144 2003-09-09 20:59:27 daniel
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* Adding register allocation order
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Revision 1.143 2003/09/09 15:55:44 peter
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* use register with least interferences in spillregister
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Revision 1.142 2003/09/07 22:09:35 peter
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@ -162,6 +162,7 @@ unit rgobj;
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{ contain all registers of type "xxx" that aren't currently }
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{ allocated }
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lastintreg,maxintreg:Tsuperregister;
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usable_registers:string[32];
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unusedregsint,usableregsint:Tsuperregisterset;
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unusedregsaddr,usableregsaddr:Tsuperregisterset;
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unusedregsfpu,usableregsfpu : Tsuperregisterset;
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@ -193,7 +194,7 @@ unit rgobj;
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{ tries to hold the amount of times which the current tree is processed }
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t_times: longint;
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constructor create;virtual;
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constructor create(Acpu_registers:byte;const Ausable:string);
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destructor destroy;virtual;
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{# Allocate a general purpose register
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@ -396,8 +397,6 @@ unit rgobj;
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reg_not_saved = $7fffffff;
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var
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{# This is the class instance used to access the register allocator class }
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crgobj : trgobjclass;
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rg : trgobj;
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{ trerefence handling }
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@ -461,7 +460,8 @@ unit rgobj;
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globals,verbose,
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cgobj,tgobj,regvars;
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constructor Trgobj.create;
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constructor Trgobj.create(Acpu_registers:byte;const Ausable:string);
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begin
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used_in_proc_int := [];
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used_in_proc_other:=[];
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@ -469,7 +469,7 @@ unit rgobj;
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resetusableregisters;
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lastintreg:=0;
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maxintreg:=first_int_imreg;
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cpu_registers:=0;
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cpu_registers:=Acpu_registers;
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unusedregsint:=[0..254]; { 255 (RS_INVALID) can't be used }
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unusedregsfpu:=usableregsfpu;
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unusedregsmm:=usableregsmm;
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@ -486,6 +486,7 @@ unit rgobj;
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by 255.}
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fillchar(movelist,sizeof(movelist),0);
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worklist_moves:=Tlinkedlist.create;
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usable_registers:=Ausable;
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abtlist:='';
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fillchar(colour,sizeof(colour),RS_INVALID);
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end;
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@ -1668,7 +1669,7 @@ unit rgobj;
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var adj:Pstring;
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i,j,k:byte;
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n,a:Tsuperregister;
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n,a,c:Tsuperregister;
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adj_colours,colourednodes:set of Tsuperregister;
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w:char;
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@ -1698,16 +1699,19 @@ unit rgobj;
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{Assume a spill by default...}
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spillednodes:=spillednodes+char(n);
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{Search for a colour not in this list.}
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for k:=first_int_supreg to last_int_supreg do
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if not(k in adj_colours) then
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begin
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colour[n]:=k;
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dec(spillednodes[0]); {Colour found: no spill.}
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include(colourednodes,n);
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if n in used_in_proc_int then
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include(used_in_proc_int,k);
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break;
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end;
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for k:=1 to length(usable_registers) do
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begin
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c:=Tsuperregister(usable_registers[k]);
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if not(c in adj_colours) then
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begin
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colour[n]:=c;
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dec(spillednodes[0]); {Colour found: no spill.}
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include(colourednodes,n);
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if n in used_in_proc_int then
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include(used_in_proc_int,c);
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break;
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end;
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end;
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end;
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{Finally colour the nodes that were coalesced.}
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for i:=1 to length(coalescednodes) do
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@ -2213,16 +2217,14 @@ unit rgobj;
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end;
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initialization
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{ This check is required because rgcpu is initialized before rgobj
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when compiling with FPC 1.0.x (PFV) }
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if not assigned(crgobj) then
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crgobj:=trgobj;
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end.
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{
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$Log$
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Revision 1.72 2003-09-09 15:55:44 peter
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Revision 1.73 2003-09-09 20:59:27 daniel
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* Adding register allocation order
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Revision 1.72 2003/09/09 15:55:44 peter
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* use register with least interferences in spillregister
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Revision 1.71 2003/09/07 22:09:35 peter
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@ -37,6 +37,9 @@ unit cgx86;
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type
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tcgx86 = class(tcg)
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procedure init_register_allocators;override;
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procedure done_register_allocators;override;
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{ passing parameters, per default the parameter is pushed }
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{ nr gives the number of the parameter (enumerated from }
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{ left to right), this allows to move the parameter to }
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@ -163,6 +166,18 @@ unit cgx86;
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This is private property, keep out! :)
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****************************************************************************}
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procedure Tcgx86.init_register_allocators;
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begin
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rg:=Trgcpu.create(6,#0#1#2#3#4#5);
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end;
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procedure Tcgx86.done_register_allocators;
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begin
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rg.free;
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end;
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procedure tcgx86.sizes2load(s1,s2 : tcgsize; var op: tasmop; var s3: topsize);
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begin
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@ -1557,7 +1572,10 @@ unit cgx86;
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end.
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{
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$Log$
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Revision 1.61 2003-09-07 22:09:35 peter
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Revision 1.62 2003-09-09 20:59:27 daniel
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* Adding register allocation order
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Revision 1.61 2003/09/07 22:09:35 peter
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* preparations for different default calling conventions
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* various RA fixes
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