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https://gitlab.com/freepascal.org/fpc/source.git
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+ added size of destination in code gen methods
+ making g_overflowcheck declaration same as ancestor's method declaration
This commit is contained in:
mazen
parent
d8725a18bf
commit
4af28e59cc
@ -30,7 +30,7 @@ interface
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cginfo,cgbase,cgobj,cg64f32,
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aasmbase,aasmtai,aasmcpu,
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cpubase,cpuinfo,
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node,symconst;
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node,symconst,SymType;
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type
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TCgSparc=class(tcg)
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@ -54,9 +54,9 @@ interface
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{ move instructions }
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procedure a_load_const_reg(list:TAasmOutput;size:tcgsize;a:aword;reg:tregister);override;
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procedure a_load_const_ref(list:TAasmOutput;size:tcgsize;a:aword;const ref:TReference);override;
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procedure a_load_reg_ref(list:TAasmOutput;size:tcgsize;reg:tregister;const ref:TReference);override;
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procedure a_load_ref_reg(list:TAasmOutput;size:tcgsize;const ref:TReference;reg:tregister);override;
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procedure a_load_reg_reg(list:TAasmOutput;fromsize,tosize:tcgsize;reg1,reg2:tregister);override;
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procedure a_load_reg_ref(list:TAasmOutput;FromSize,ToSize:TCgSize;reg:TRegister;const ref:TReference);override;
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procedure a_load_ref_reg(list:TAasmOutput;FromSize,ToSize:TCgSize;const ref:TReference;reg:tregister);override;
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procedure a_load_reg_reg(list:TAasmOutput;FromSize,ToSize:TCgSize;reg1,reg2:tregister);override;
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procedure a_loadaddr_ref_reg(list:TAasmOutput;const ref:TReference;r:tregister);override;
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{ fpu move instructions }
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procedure a_loadfpu_reg_reg(list:TAasmOutput;reg1, reg2:tregister);override;
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@ -69,7 +69,7 @@ interface
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procedure a_jmp_cond(list:TAasmOutput;cond:TOpCmp;l:tasmlabel);{ override;}
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procedure a_jmp_flags(list:TAasmOutput;const f:TResFlags;l:tasmlabel);override;
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procedure g_flags2reg(list:TAasmOutput;Size:TCgSize;const f:tresflags;reg:TRegister);override;
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procedure g_overflowCheck(List:TAasmOutput;const p:TNode);override;
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procedure g_overflowCheck(List:TAasmOutput;const Loc:TLocation;def:TDef);override;
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procedure g_stackframe_entry(list:TAasmOutput;localsize:LongInt);override;
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procedure g_restore_all_registers(list:TAasmOutput;accused,acchiused:boolean);override;
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procedure g_restore_frame_pointer(list:TAasmOutput);override;
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@ -250,7 +250,7 @@ implementation
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with LocPara do
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case loc of
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LOC_REGISTER,LOC_CREGISTER:
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a_load_ref_reg(list,sz,r,Register);
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a_load_ref_reg(list,sz,sz,r,Register);
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LOC_REFERENCE:
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begin
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{ Code conventions need the parameters being allocated in %o6+92. See
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@ -261,8 +261,8 @@ implementation
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ref.base:=locpara.reference.index;
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ref.offset:=locpara.reference.offset;
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tmpreg := get_scratch_reg_int(list,sz);
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a_load_ref_reg(list,sz,r,tmpreg);
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a_load_reg_ref(list,sz,tmpreg,ref);
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a_load_ref_reg(list,sz,sz,r,tmpreg);
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a_load_reg_ref(list,sz,sz,tmpreg,ref);
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free_scratch_reg(list,tmpreg);
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end;
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LOC_FPUREGISTER,LOC_CFPUREGISTER:
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@ -297,7 +297,7 @@ implementation
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ref.offset := locpara.reference.offset;
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tmpreg := get_scratch_reg_address(list);
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a_loadaddr_ref_reg(list,r,tmpreg);
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a_load_reg_ref(list,OS_ADDR,tmpreg,ref);
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a_load_reg_ref(list,OS_ADDR,OS_ADDR,tmpreg,ref);
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free_scratch_reg(list,tmpreg);
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end;
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else
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@ -350,18 +350,18 @@ implementation
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begin
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zeroreg.enum:=R_INTREGISTER;
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zeroreg.number:=NR_G0;
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a_load_reg_ref(list,size,zeroreg,ref);
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a_load_reg_ref(list,size,size,zeroreg,ref);
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end
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else
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inherited a_load_const_ref(list,size,a,ref);
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end;
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procedure TCgSparc.a_load_reg_ref(list:TAasmOutput;size:TCGSize;reg:tregister;const Ref:TReference);
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procedure TCgSparc.a_load_reg_ref(list:TAasmOutput;FromSize,ToSize:TCGSize;reg:tregister;const Ref:TReference);
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var
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op:tasmop;
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begin
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case size of
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case ToSize of
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{ signed integer registers }
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OS_8,
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OS_S8:
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@ -379,11 +379,11 @@ implementation
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end;
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procedure TCgSparc.a_load_ref_reg(list:TAasmOutput;size:TCgSize;const ref:TReference;reg:tregister);
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procedure TCgSparc.a_load_ref_reg(list:TAasmOutput;FromSize,ToSize:TCgSize;const ref:TReference;reg:tregister);
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var
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op:tasmop;
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begin
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case size of
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case Fromsize of
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{ signed integer registers }
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OS_S8:
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Op:=A_LDSB;{Load Signed Byte}
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@ -613,32 +613,28 @@ implementation
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end;
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procedure TCgSparc.a_jmp_always(List:TAasmOutput;l:TAsmLabel);
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begin
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List.Concat(TAiCpu.op_sym(A_BA,objectlibrary.newasmsymbol(l.name)));
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end;
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procedure TCgSparc.a_jmp_cond(list:TAasmOutput;cond:TOpCmp;l:TAsmLabel);
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var
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ai:TAiCpu;
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begin
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ai:=TAiCpu.Op_sym(A_BA,l);
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ai.SetCondition(TOpCmp2AsmCond[cond]);
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list.Concat(ai);
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list.Concat(TAiCpu.Op_none(A_NOP));
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end;
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procedure TCgSparc.a_jmp_flags(list:TAasmOutput;const f:TResFlags;l:tasmlabel);
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var
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ai:taicpu;
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begin
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ai := Taicpu.op_sym(A_BA,l);
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ai.SetCondition(flags_to_cond(f));
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list.Concat(ai);
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list.Concat(TAiCpu.Op_none(A_NOP));
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end;
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procedure TCgSparc.a_jmp_always(List:TAasmOutput;l:TAsmLabel);
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begin
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List.Concat(TAiCpu.op_sym(A_BA,objectlibrary.newasmsymbol(l.name)));
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end;
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procedure TCgSparc.a_jmp_cond(list:TAasmOutput;cond:TOpCmp;l:TAsmLabel);
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var
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ai:TAiCpu;
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begin
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ai:=TAiCpu.Op_sym(A_BA,l);
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ai.SetCondition(TOpCmp2AsmCond[cond]);
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list.Concat(ai);
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list.Concat(TAiCpu.Op_none(A_NOP));
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end;
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procedure TCgSparc.a_jmp_flags(list:TAasmOutput;const f:TResFlags;l:tasmlabel);
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var
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ai:taicpu;
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begin
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ai := Taicpu.op_sym(A_BA,l);
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ai.SetCondition(flags_to_cond(f));
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list.Concat(ai);
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list.Concat(TAiCpu.Op_none(A_NOP));
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end;
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procedure TCgSparc.g_flags2reg(list:TAasmOutput;Size:TCgSize;const f:tresflags;reg:TRegister);
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@ -652,29 +648,30 @@ implementation
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list.Concat(ai);
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list.Concat(TAiCpu.Op_none(A_NOP));
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end;
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procedure TCgSparc.g_overflowCheck(List:TAasmOutput;const p:TNode);
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var
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hl:TAsmLabel;
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procedure TCgSparc.g_overflowCheck(List:TAasmOutput;const Loc:TLocation;def:TDef);
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var
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hl : tasmlabel;
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r:Tregister;
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begin
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if not(cs_check_overflow in aktlocalswitches)
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then
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exit;
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objectlibrary.getlabel(hl);
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if not((def.deftype=pointerdef)or
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((def.deftype=orddef)and
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(torddef(def).typ in [u64bit,u16bit,u32bit,u8bit,uchar,bool8bit,bool16bit,bool32bit])))
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then
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begin
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if not(cs_check_overflow in aktlocalswitches) then
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exit;
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objectlibrary.getlabel(hl);
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if not((p.resulttype.def.deftype=pointerdef) or
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((p.resulttype.def.deftype=orddef) and
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(torddef(p.resulttype.def).typ in [u64bit,u16bit,u32bit,u8bit,uchar,
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bool8bit,bool16bit,bool32bit]))) then
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begin
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{$warning TODO Overflow check}
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a_jmp_always(list,hl)
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end
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else
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a_jmp_cond(list,OC_NONE,hl);
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a_call_name(list,'FPC_OVERFLOW');
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a_label(list,hl);
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end;
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//r.enum:=R_CR7;
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//list.concat(taicpu.op_reg(A_MCRXR,r));
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//a_jmp_cond(list,A_BA,C_OV,hl)
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a_jmp_always(list,hl)
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end
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else
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a_jmp_cond(list,OC_AE,hl);
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a_call_name(list,'FPC_OVERFLOW');
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a_label(list,hl);
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end;
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{ *********** entry/exit code and address loading ************ }
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@ -767,7 +764,7 @@ implementation
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begin
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if len < 8 then
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begin
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a_load_ref_ref(list,int_cgsize(len),source,dest);
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a_load_ref_ref(list,int_cgsize(len),int_cgsize(len),source,dest);
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if delsource then
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reference_release(list,source);
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end
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@ -790,7 +787,7 @@ implementation
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if loadref then
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begin
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src.base := get_scratch_reg_address(list);
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a_load_ref_reg(list,OS_32,source,src.base);
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a_load_ref_reg(list,OS_32,OS_32,source,src.base);
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orgsrc := false;
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end
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else
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@ -876,8 +873,8 @@ implementation
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r.enum:=R_INTREGISTER;
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r.number:=NR_O0;
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a_reg_alloc(list,r);
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a_load_ref_reg(list,OS_32,src,r);
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a_load_reg_ref(list,OS_32,r,dst);
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a_load_ref_reg(list,OS_32,OS_32,src,r);
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a_load_reg_ref(list,OS_32,OS_32,r,dst);
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inc(src.offset,4);
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inc(dst.offset,4);
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a_reg_dealloc(list,r);
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@ -888,8 +885,8 @@ implementation
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r.enum:=R_INTREGISTER;
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r.number:=NR_O0;
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a_reg_alloc(list,r);
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a_load_ref_reg(list,OS_16,src,r);
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a_load_reg_ref(list,OS_16,r,dst);
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a_load_ref_reg(list,OS_16,OS_16,src,r);
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a_load_reg_ref(list,OS_16,OS_16,r,dst);
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inc(src.offset,2);
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inc(dst.offset,2);
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a_reg_dealloc(list,r);
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@ -899,8 +896,8 @@ implementation
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r.enum:=R_INTREGISTER;
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r.number:=NR_O0;
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a_reg_alloc(list,r);
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a_load_ref_reg(list,OS_8,src,r);
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a_load_reg_ref(list,OS_8,r,dst);
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a_load_ref_reg(list,OS_8,OS_8,src,r);
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a_load_reg_ref(list,OS_8,OS_8,r,dst);
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a_reg_dealloc(list,r);
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end;
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if orgsrc then
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@ -999,7 +996,12 @@ begin
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end.
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{
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$Log$
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Revision 1.56 2003-06-01 21:38:06 peter
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Revision 1.57 2003-06-04 20:59:37 mazen
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+ added size of destination in code gen methods
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+ making g_overflowcheck declaration same as
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ancestor's method declaration
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Revision 1.56 2003/06/01 21:38:06 peter
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* getregisterfpu size parameter added
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* op_const_reg size parameter added
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* sparc updates
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@ -160,7 +160,7 @@ procedure TSparctypeconvnode.second_int_to_bool;
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begin
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reference_release(exprasmlist,left.location.reference);
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hreg2:=rg.getregisterint(exprasmlist,opsize);
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cg.a_load_ref_reg(exprasmlist,opsize,left.location.reference,hreg2);
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cg.a_load_ref_reg(exprasmlist,OpSize,OpSize,left.location.reference,hreg2);
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end
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else
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hreg2 := left.location.register;
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@ -258,7 +258,12 @@ begin
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end.
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{
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$Log$
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Revision 1.16 2003-06-01 21:38:06 peter
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Revision 1.17 2003-06-04 20:59:37 mazen
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+ added size of destination in code gen methods
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+ making g_overflowcheck declaration same as
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ancestor's method declaration
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Revision 1.16 2003/06/01 21:38:06 peter
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* getregisterfpu size parameter added
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* op_const_reg size parameter added
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* sparc updates
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@ -147,7 +147,7 @@ implementation
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{ set result location }
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location.loc:=LOC_REGISTER;
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location.register:=resultreg;
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cg.g_overflowcheck(exprasmlist,self);
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cg.g_overflowcheck(exprasmlist,Location,ResultType.Def);
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end;
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@ -352,7 +352,12 @@ begin
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end.
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{
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$Log$
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Revision 1.9 2003-06-01 21:38:07 peter
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Revision 1.10 2003-06-04 20:59:37 mazen
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+ added size of destination in code gen methods
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+ making g_overflowcheck declaration same as
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ancestor's method declaration
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Revision 1.9 2003/06/01 21:38:07 peter
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* getregisterfpu size parameter added
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* op_const_reg size parameter added
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* sparc updates
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