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+ added size of destination in code gen methods

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+ making g_overflowcheck declaration same as
  ancestor's method declaration
This commit is contained in:
mazen 2003-06-04 20:59:37 +00:00
parent d8725a18bf
commit 4af28e59cc
3 changed files with 87 additions and 75 deletions
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144
compiler/sparc/cgcpu.pas
View File

@ -30,7 +30,7 @@ interface
cginfo,cgbase,cgobj,cg64f32, cginfo,cgbase,cgobj,cg64f32,
aasmbase,aasmtai,aasmcpu, aasmbase,aasmtai,aasmcpu,
cpubase,cpuinfo, cpubase,cpuinfo,
node,symconst; node,symconst,SymType;
type type
TCgSparc=class(tcg) TCgSparc=class(tcg)
@ -54,9 +54,9 @@ interface
{ move instructions } { move instructions }
procedure a_load_const_reg(list:TAasmOutput;size:tcgsize;a:aword;reg:tregister);override; procedure a_load_const_reg(list:TAasmOutput;size:tcgsize;a:aword;reg:tregister);override;
procedure a_load_const_ref(list:TAasmOutput;size:tcgsize;a:aword;const ref:TReference);override; procedure a_load_const_ref(list:TAasmOutput;size:tcgsize;a:aword;const ref:TReference);override;
procedure a_load_reg_ref(list:TAasmOutput;size:tcgsize;reg:tregister;const ref:TReference);override; procedure a_load_reg_ref(list:TAasmOutput;FromSize,ToSize:TCgSize;reg:TRegister;const ref:TReference);override;
procedure a_load_ref_reg(list:TAasmOutput;size:tcgsize;const ref:TReference;reg:tregister);override; procedure a_load_ref_reg(list:TAasmOutput;FromSize,ToSize:TCgSize;const ref:TReference;reg:tregister);override;
procedure a_load_reg_reg(list:TAasmOutput;fromsize,tosize:tcgsize;reg1,reg2:tregister);override; procedure a_load_reg_reg(list:TAasmOutput;FromSize,ToSize:TCgSize;reg1,reg2:tregister);override;
procedure a_loadaddr_ref_reg(list:TAasmOutput;const ref:TReference;r:tregister);override; procedure a_loadaddr_ref_reg(list:TAasmOutput;const ref:TReference;r:tregister);override;
{ fpu move instructions } { fpu move instructions }
procedure a_loadfpu_reg_reg(list:TAasmOutput;reg1, reg2:tregister);override; procedure a_loadfpu_reg_reg(list:TAasmOutput;reg1, reg2:tregister);override;
@ -69,7 +69,7 @@ interface
procedure a_jmp_cond(list:TAasmOutput;cond:TOpCmp;l:tasmlabel);{ override;} procedure a_jmp_cond(list:TAasmOutput;cond:TOpCmp;l:tasmlabel);{ override;}
procedure a_jmp_flags(list:TAasmOutput;const f:TResFlags;l:tasmlabel);override; procedure a_jmp_flags(list:TAasmOutput;const f:TResFlags;l:tasmlabel);override;
procedure g_flags2reg(list:TAasmOutput;Size:TCgSize;const f:tresflags;reg:TRegister);override; procedure g_flags2reg(list:TAasmOutput;Size:TCgSize;const f:tresflags;reg:TRegister);override;
procedure g_overflowCheck(List:TAasmOutput;const p:TNode);override; procedure g_overflowCheck(List:TAasmOutput;const Loc:TLocation;def:TDef);override;
procedure g_stackframe_entry(list:TAasmOutput;localsize:LongInt);override; procedure g_stackframe_entry(list:TAasmOutput;localsize:LongInt);override;
procedure g_restore_all_registers(list:TAasmOutput;accused,acchiused:boolean);override; procedure g_restore_all_registers(list:TAasmOutput;accused,acchiused:boolean);override;
procedure g_restore_frame_pointer(list:TAasmOutput);override; procedure g_restore_frame_pointer(list:TAasmOutput);override;
@ -250,7 +250,7 @@ implementation
with LocPara do with LocPara do
case loc of case loc of
LOC_REGISTER,LOC_CREGISTER: LOC_REGISTER,LOC_CREGISTER:
a_load_ref_reg(list,sz,r,Register); a_load_ref_reg(list,sz,sz,r,Register);
LOC_REFERENCE: LOC_REFERENCE:
begin begin
{ Code conventions need the parameters being allocated in %o6+92. See { Code conventions need the parameters being allocated in %o6+92. See
@ -261,8 +261,8 @@ implementation
ref.base:=locpara.reference.index; ref.base:=locpara.reference.index;
ref.offset:=locpara.reference.offset; ref.offset:=locpara.reference.offset;
tmpreg := get_scratch_reg_int(list,sz); tmpreg := get_scratch_reg_int(list,sz);
a_load_ref_reg(list,sz,r,tmpreg); a_load_ref_reg(list,sz,sz,r,tmpreg);
a_load_reg_ref(list,sz,tmpreg,ref); a_load_reg_ref(list,sz,sz,tmpreg,ref);
free_scratch_reg(list,tmpreg); free_scratch_reg(list,tmpreg);
end; end;
LOC_FPUREGISTER,LOC_CFPUREGISTER: LOC_FPUREGISTER,LOC_CFPUREGISTER:
@ -297,7 +297,7 @@ implementation
ref.offset := locpara.reference.offset; ref.offset := locpara.reference.offset;
tmpreg := get_scratch_reg_address(list); tmpreg := get_scratch_reg_address(list);
a_loadaddr_ref_reg(list,r,tmpreg); a_loadaddr_ref_reg(list,r,tmpreg);
a_load_reg_ref(list,OS_ADDR,tmpreg,ref); a_load_reg_ref(list,OS_ADDR,OS_ADDR,tmpreg,ref);
free_scratch_reg(list,tmpreg); free_scratch_reg(list,tmpreg);
end; end;
else else
@ -350,18 +350,18 @@ implementation
begin begin
zeroreg.enum:=R_INTREGISTER; zeroreg.enum:=R_INTREGISTER;
zeroreg.number:=NR_G0; zeroreg.number:=NR_G0;
a_load_reg_ref(list,size,zeroreg,ref); a_load_reg_ref(list,size,size,zeroreg,ref);
end end
else else
inherited a_load_const_ref(list,size,a,ref); inherited a_load_const_ref(list,size,a,ref);
end; end;
procedure TCgSparc.a_load_reg_ref(list:TAasmOutput;size:TCGSize;reg:tregister;const Ref:TReference); procedure TCgSparc.a_load_reg_ref(list:TAasmOutput;FromSize,ToSize:TCGSize;reg:tregister;const Ref:TReference);
var var
op:tasmop; op:tasmop;
begin begin
case size of case ToSize of
{ signed integer registers } { signed integer registers }
OS_8, OS_8,
OS_S8: OS_S8:
@ -379,11 +379,11 @@ implementation
end; end;
procedure TCgSparc.a_load_ref_reg(list:TAasmOutput;size:TCgSize;const ref:TReference;reg:tregister); procedure TCgSparc.a_load_ref_reg(list:TAasmOutput;FromSize,ToSize:TCgSize;const ref:TReference;reg:tregister);
var var
op:tasmop; op:tasmop;
begin begin
case size of case Fromsize of
{ signed integer registers } { signed integer registers }
OS_S8: OS_S8:
Op:=A_LDSB;{Load Signed Byte} Op:=A_LDSB;{Load Signed Byte}
@ -613,32 +613,28 @@ implementation
end; end;
procedure TCgSparc.a_jmp_always(List:TAasmOutput;l:TAsmLabel); procedure TCgSparc.a_jmp_always(List:TAasmOutput;l:TAsmLabel);
begin begin
List.Concat(TAiCpu.op_sym(A_BA,objectlibrary.newasmsymbol(l.name))); List.Concat(TAiCpu.op_sym(A_BA,objectlibrary.newasmsymbol(l.name)));
end; end;
procedure TCgSparc.a_jmp_cond(list:TAasmOutput;cond:TOpCmp;l:TAsmLabel);
var
procedure TCgSparc.a_jmp_cond(list:TAasmOutput;cond:TOpCmp;l:TAsmLabel); ai:TAiCpu;
var begin
ai:TAiCpu; ai:=TAiCpu.Op_sym(A_BA,l);
begin ai.SetCondition(TOpCmp2AsmCond[cond]);
ai:=TAiCpu.Op_sym(A_BA,l); list.Concat(ai);
ai.SetCondition(TOpCmp2AsmCond[cond]); list.Concat(TAiCpu.Op_none(A_NOP));
list.Concat(ai); end;
list.Concat(TAiCpu.Op_none(A_NOP)); procedure TCgSparc.a_jmp_flags(list:TAasmOutput;const f:TResFlags;l:tasmlabel);
end; var
ai:taicpu;
begin
procedure TCgSparc.a_jmp_flags(list:TAasmOutput;const f:TResFlags;l:tasmlabel); ai := Taicpu.op_sym(A_BA,l);
var ai.SetCondition(flags_to_cond(f));
ai:taicpu; list.Concat(ai);
begin list.Concat(TAiCpu.Op_none(A_NOP));
ai := Taicpu.op_sym(A_BA,l); end;
ai.SetCondition(flags_to_cond(f));
list.Concat(ai);
list.Concat(TAiCpu.Op_none(A_NOP));
end;
procedure TCgSparc.g_flags2reg(list:TAasmOutput;Size:TCgSize;const f:tresflags;reg:TRegister); procedure TCgSparc.g_flags2reg(list:TAasmOutput;Size:TCgSize;const f:tresflags;reg:TRegister);
@ -652,29 +648,30 @@ implementation
list.Concat(ai); list.Concat(ai);
list.Concat(TAiCpu.Op_none(A_NOP)); list.Concat(TAiCpu.Op_none(A_NOP));
end; end;
procedure TCgSparc.g_overflowCheck(List:TAasmOutput;const Loc:TLocation;def:TDef);
var
procedure TCgSparc.g_overflowCheck(List:TAasmOutput;const p:TNode); hl : tasmlabel;
var r:Tregister;
hl:TAsmLabel; begin
if not(cs_check_overflow in aktlocalswitches)
then
exit;
objectlibrary.getlabel(hl);
if not((def.deftype=pointerdef)or
((def.deftype=orddef)and
(torddef(def).typ in [u64bit,u16bit,u32bit,u8bit,uchar,bool8bit,bool16bit,bool32bit])))
then
begin begin
if not(cs_check_overflow in aktlocalswitches) then //r.enum:=R_CR7;
exit; //list.concat(taicpu.op_reg(A_MCRXR,r));
objectlibrary.getlabel(hl); //a_jmp_cond(list,A_BA,C_OV,hl)
if not((p.resulttype.def.deftype=pointerdef) or a_jmp_always(list,hl)
((p.resulttype.def.deftype=orddef) and end
(torddef(p.resulttype.def).typ in [u64bit,u16bit,u32bit,u8bit,uchar, else
bool8bit,bool16bit,bool32bit]))) then a_jmp_cond(list,OC_AE,hl);
begin a_call_name(list,'FPC_OVERFLOW');
{$warning TODO Overflow check} a_label(list,hl);
a_jmp_always(list,hl) end;
end
else
a_jmp_cond(list,OC_NONE,hl);
a_call_name(list,'FPC_OVERFLOW');
a_label(list,hl);
end;
{ *********** entry/exit code and address loading ************ } { *********** entry/exit code and address loading ************ }
@ -767,7 +764,7 @@ implementation
begin begin
if len < 8 then if len < 8 then
begin begin
a_load_ref_ref(list,int_cgsize(len),source,dest); a_load_ref_ref(list,int_cgsize(len),int_cgsize(len),source,dest);
if delsource then if delsource then
reference_release(list,source); reference_release(list,source);
end end
@ -790,7 +787,7 @@ implementation
if loadref then if loadref then
begin begin
src.base := get_scratch_reg_address(list); src.base := get_scratch_reg_address(list);
a_load_ref_reg(list,OS_32,source,src.base); a_load_ref_reg(list,OS_32,OS_32,source,src.base);
orgsrc := false; orgsrc := false;
end end
else else
@ -876,8 +873,8 @@ implementation
r.enum:=R_INTREGISTER; r.enum:=R_INTREGISTER;
r.number:=NR_O0; r.number:=NR_O0;
a_reg_alloc(list,r); a_reg_alloc(list,r);
a_load_ref_reg(list,OS_32,src,r); a_load_ref_reg(list,OS_32,OS_32,src,r);
a_load_reg_ref(list,OS_32,r,dst); a_load_reg_ref(list,OS_32,OS_32,r,dst);
inc(src.offset,4); inc(src.offset,4);
inc(dst.offset,4); inc(dst.offset,4);
a_reg_dealloc(list,r); a_reg_dealloc(list,r);
@ -888,8 +885,8 @@ implementation
r.enum:=R_INTREGISTER; r.enum:=R_INTREGISTER;
r.number:=NR_O0; r.number:=NR_O0;
a_reg_alloc(list,r); a_reg_alloc(list,r);
a_load_ref_reg(list,OS_16,src,r); a_load_ref_reg(list,OS_16,OS_16,src,r);
a_load_reg_ref(list,OS_16,r,dst); a_load_reg_ref(list,OS_16,OS_16,r,dst);
inc(src.offset,2); inc(src.offset,2);
inc(dst.offset,2); inc(dst.offset,2);
a_reg_dealloc(list,r); a_reg_dealloc(list,r);
@ -899,8 +896,8 @@ implementation
r.enum:=R_INTREGISTER; r.enum:=R_INTREGISTER;
r.number:=NR_O0; r.number:=NR_O0;
a_reg_alloc(list,r); a_reg_alloc(list,r);
a_load_ref_reg(list,OS_8,src,r); a_load_ref_reg(list,OS_8,OS_8,src,r);
a_load_reg_ref(list,OS_8,r,dst); a_load_reg_ref(list,OS_8,OS_8,r,dst);
a_reg_dealloc(list,r); a_reg_dealloc(list,r);
end; end;
if orgsrc then if orgsrc then
@ -999,7 +996,12 @@ begin
end. end.
{ {
$Log$ $Log$
Revision 1.56 2003-06-01 21:38:06 peter Revision 1.57 2003-06-04 20:59:37 mazen
+ added size of destination in code gen methods
+ making g_overflowcheck declaration same as
ancestor's method declaration
Revision 1.56 2003/06/01 21:38:06 peter
* getregisterfpu size parameter added * getregisterfpu size parameter added
* op_const_reg size parameter added * op_const_reg size parameter added
* sparc updates * sparc updates

9
compiler/sparc/ncpucnv.pas
View File

@ -160,7 +160,7 @@ procedure TSparctypeconvnode.second_int_to_bool;
begin begin
reference_release(exprasmlist,left.location.reference); reference_release(exprasmlist,left.location.reference);
hreg2:=rg.getregisterint(exprasmlist,opsize); hreg2:=rg.getregisterint(exprasmlist,opsize);
cg.a_load_ref_reg(exprasmlist,opsize,left.location.reference,hreg2); cg.a_load_ref_reg(exprasmlist,OpSize,OpSize,left.location.reference,hreg2);
end end
else else
hreg2 := left.location.register; hreg2 := left.location.register;
@ -258,7 +258,12 @@ begin
end. end.
{ {
$Log$ $Log$
Revision 1.16 2003-06-01 21:38:06 peter Revision 1.17 2003-06-04 20:59:37 mazen
+ added size of destination in code gen methods
+ making g_overflowcheck declaration same as
ancestor's method declaration
Revision 1.16 2003/06/01 21:38:06 peter
* getregisterfpu size parameter added * getregisterfpu size parameter added
* op_const_reg size parameter added * op_const_reg size parameter added
* sparc updates * sparc updates

9
compiler/sparc/ncpumat.pas
View File

@ -147,7 +147,7 @@ implementation
{ set result location } { set result location }
location.loc:=LOC_REGISTER; location.loc:=LOC_REGISTER;
location.register:=resultreg; location.register:=resultreg;
cg.g_overflowcheck(exprasmlist,self); cg.g_overflowcheck(exprasmlist,Location,ResultType.Def);
end; end;
@ -352,7 +352,12 @@ begin
end. end.
{ {
$Log$ $Log$
Revision 1.9 2003-06-01 21:38:07 peter Revision 1.10 2003-06-04 20:59:37 mazen
+ added size of destination in code gen methods
+ making g_overflowcheck declaration same as
ancestor's method declaration
Revision 1.9 2003/06/01 21:38:07 peter
* getregisterfpu size parameter added * getregisterfpu size parameter added
* op_const_reg size parameter added * op_const_reg size parameter added
* sparc updates * sparc updates