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+ TSparcmoddivnode.pass_generate_code for SPARC64
git-svn-id: trunk@36637 -
This commit is contained in:
florian
parent
5bc9890727
commit
4b30e5ee11
@ -66,6 +66,170 @@ implementation
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TSparcMODDIVNODE
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*****************************************************************************}
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{$ifdef sparc64}
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procedure tSparcmoddivnode.pass_generate_code;
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const
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{ 64 bit signed overflow }
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divops: array[boolean, boolean, boolean] of tasmop =
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(((A_UDIV,A_UDIVcc),(A_SDIV,A_SDIVcc)),
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((A_UDIVX,A_NOP),(A_SDIVX,A_NOP))
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);
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var
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power : longint;
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op : tasmop;
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tmpreg,
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numerator,
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divider,
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resultreg : tregister;
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overflowlabel : tasmlabel;
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ai : taicpu;
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begin
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secondpass(left);
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secondpass(right);
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location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
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location.register:=cg.GetIntRegister(current_asmdata.CurrAsmList,OS_INT);
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{ put numerator in register }
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
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numerator := left.location.register;
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resultreg := location.register;
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if is_64bitint(resultdef) then
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begin
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if (nodetype = divn) and
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(right.nodetype = ordconstn) and
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ispowerof2(tordconstnode(right).value.svalue,power) and
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(not (cs_check_overflow in current_settings.localswitches)) then
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begin
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if is_signed(left.resultdef) Then
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begin
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tmpreg:=cg.GetIntRegister(current_asmdata.CurrAsmList,OS_INT);
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cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SAR,OS_INT,63,numerator,tmpreg);
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{ if signed, tmpreg=right value-1, otherwise 0 }
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cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,tordconstnode(right).value.svalue-1,tmpreg);
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{ add to the left value }
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_INT,numerator,tmpreg);
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cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SAR,OS_INT,aword(power),tmpreg,resultreg);
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end
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else
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cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_INT,aword(power),numerator,resultreg);
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end
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else
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begin
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{ load divider in a register if necessary }
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divider:=NR_NO;
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if (right.location.loc<>LOC_CONSTANT) or
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(right.location.value<simm13lo) or
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(right.location.value>simm13hi) then
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begin
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hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,
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right.resultdef,right.resultdef,true);
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divider:=right.location.register;
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end;
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op := divops[true, is_signed(right.resultdef),
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cs_check_overflow in current_settings.localswitches];
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if (divider<>NR_NO) then
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,numerator,divider,resultreg))
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else
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_const_reg(op,numerator,right.location.value,resultreg));
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if (nodetype = modn) then
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begin
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current_asmdata.getjumplabel(overflowlabel);
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ai:=taicpu.op_cond_sym(A_Bxx,C_VS,overflowlabel);
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ai.delayslot_annulled:=true;
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current_asmdata.CurrAsmList.concat(ai);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_NOT,resultreg));
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cg.a_label(current_asmdata.CurrAsmList,overflowlabel);
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if (divider<>NR_NO) then
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_MULX,resultreg,divider,resultreg))
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else
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_const_reg(A_MULX,resultreg,right.location.value,resultreg));
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SUB,numerator,resultreg,resultreg));
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end;
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end;
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end
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else
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begin
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if (nodetype = divn) and
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(right.nodetype = ordconstn) and
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ispowerof2(tordconstnode(right).value.svalue,power) and
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(not (cs_check_overflow in current_settings.localswitches)) then
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begin
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if is_signed(left.resultdef) Then
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begin
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tmpreg:=cg.GetIntRegister(current_asmdata.CurrAsmList,OS_INT);
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cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SAR,OS_INT,31,numerator,tmpreg);
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{ if signed, tmpreg=right value-1, otherwise 0 }
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cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,tordconstnode(right).value.svalue-1,tmpreg);
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{ add to the left value }
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_INT,numerator,tmpreg);
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cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SAR,OS_INT,aword(power),tmpreg,resultreg);
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end
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else
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cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_INT,aword(power),numerator,resultreg);
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end
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else
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begin
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{ load divider in a register if necessary }
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divider:=NR_NO;
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if (right.location.loc<>LOC_CONSTANT) or
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(right.location.value<simm13lo) or
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(right.location.value>simm13hi) then
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begin
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hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,
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right.resultdef,right.resultdef,true);
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divider:=right.location.register;
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end;
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{ needs overflow checking, (-maxlongint-1) div (-1) overflows! }
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{ And on Sparc, the only way to catch a div-by-0 is by checking }
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{ the overflow flag (JM) }
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{ Fill %y with the -1 or 0 depending on the highest bit }
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if is_signed(left.resultdef) then
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begin
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tmpreg:=cg.GetIntRegister(current_asmdata.CurrAsmList,OS_INT);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_const_reg(A_SRA,numerator,31,tmpreg));
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_MOV,tmpreg,NR_Y));
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end
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else
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_MOV,NR_G0,NR_Y));
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{ wait 3 instructions slots before we can read %y }
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current_asmdata.CurrAsmList.concat(taicpu.op_none(A_NOP));
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current_asmdata.CurrAsmList.concat(taicpu.op_none(A_NOP));
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current_asmdata.CurrAsmList.concat(taicpu.op_none(A_NOP));
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op := divops[false, is_signed(right.resultdef),
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cs_check_overflow in current_settings.localswitches];
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if (divider<>NR_NO) then
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,numerator,divider,resultreg))
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else
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_const_reg(op,numerator,right.location.value,resultreg));
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if (nodetype = modn) then
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begin
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current_asmdata.getjumplabel(overflowlabel);
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ai:=taicpu.op_cond_sym(A_Bxx,C_VS,overflowlabel);
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ai.delayslot_annulled:=true;
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current_asmdata.CurrAsmList.concat(ai);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_NOT,resultreg));
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cg.a_label(current_asmdata.CurrAsmList,overflowlabel);
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if (divider<>NR_NO) then
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SMUL,resultreg,divider,resultreg))
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else
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_const_reg(A_SMUL,resultreg,right.location.value,resultreg));
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SUB,numerator,resultreg,resultreg));
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end;
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end;
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end;
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{ set result location }
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location.loc:=LOC_REGISTER;
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location.register:=resultreg;
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cg.g_overflowcheck(current_asmdata.CurrAsmList,Location,resultdef);
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end;
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{$else sparc64}
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procedure tSparcmoddivnode.pass_generate_code;
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const
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{ signed overflow }
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@ -167,7 +331,7 @@ implementation
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location.register:=resultreg;
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cg.g_overflowcheck(current_asmdata.CurrAsmList,Location,resultdef);
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end;
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{$endif sparc64}
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{*****************************************************************************
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TSparcSHLRSHRNODE
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@ -283,7 +447,7 @@ implementation
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{$endif SPARC64}
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_const_reg(A_SUBcc,left.location.register,0,NR_G0));
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location_reset(location,LOC_FLAGS,OS_NO);
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location.resflags:=F_E;
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location.resflags.Init(NR_ICC,F_E);
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end;
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else
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internalerror(2003042401);
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