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* factored out PostPeepholeOptTest
+ use PostPeepholeOptTest on x86-64 git-svn-id: trunk@37551 -
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@ -1250,7 +1250,6 @@ end;
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procedure TCPUAsmOptimizer.PostPeepHoleOpts;
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var
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p,hp1,hp2: tai;
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IsTestConstX: boolean;
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begin
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p := BlockStart;
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ClearUsedRegs;
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@ -1362,93 +1361,8 @@ begin
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end;
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end;
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A_TEST, A_OR:
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{removes the line marked with (x) from the sequence
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and/or/xor/add/sub/... $x, %y
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test/or %y, %y | test $-1, %y (x)
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j(n)z _Label
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as the first instruction already adjusts the ZF
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%y operand may also be a reference }
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begin
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IsTestConstX:=(taicpu(p).opcode=A_TEST) and
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MatchOperand(taicpu(p).oper[0]^,-1);
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if (OpsEqual(taicpu(p).oper[0]^,taicpu(p).oper[1]^) or IsTestConstX) and
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GetLastInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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GetNextInstruction(p,hp2) and
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MatchInstruction(hp2,A_SETcc,A_Jcc,A_CMOVcc,[]) then
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case taicpu(hp1).opcode Of
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A_ADD, A_SUB, A_OR, A_XOR, A_AND:
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begin
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if OpsEqual(taicpu(hp1).oper[1]^,taicpu(p).oper[1]^) and
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{ does not work in case of overflow for G(E)/L(E)/C_O/C_NO }
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{ and in case of carry for A(E)/B(E)/C/NC }
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((taicpu(hp2).condition in [C_Z,C_NZ,C_E,C_NE]) or
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((taicpu(hp1).opcode <> A_ADD) and
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(taicpu(hp1).opcode <> A_SUB))) then
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begin
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hp1 := tai(p.next);
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asml.remove(p);
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p.free;
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p := tai(hp1);
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continue
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end;
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end;
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A_SHL, A_SAL, A_SHR, A_SAR:
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begin
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if OpsEqual(taicpu(hp1).oper[1]^,taicpu(p).oper[1]^) and
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{ SHL/SAL/SHR/SAR with a value of 0 do not change the flags }
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{ therefore, it's only safe to do this optimization for }
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{ shifts by a (nonzero) constant }
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(taicpu(hp1).oper[0]^.typ = top_const) and
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(taicpu(hp1).oper[0]^.val <> 0) and
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{ does not work in case of overflow for G(E)/L(E)/C_O/C_NO }
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{ and in case of carry for A(E)/B(E)/C/NC }
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(taicpu(hp2).condition in [C_Z,C_NZ,C_E,C_NE]) then
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begin
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hp1 := tai(p.next);
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asml.remove(p);
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p.free;
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p := tai(hp1);
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continue
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end;
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end;
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A_DEC, A_INC, A_NEG:
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begin
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if OpsEqual(taicpu(hp1).oper[0]^,taicpu(p).oper[1]^) and
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{ does not work in case of overflow for G(E)/L(E)/C_O/C_NO }
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{ and in case of carry for A(E)/B(E)/C/NC }
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(taicpu(hp2).condition in [C_Z,C_NZ,C_E,C_NE]) then
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begin
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case taicpu(hp1).opcode Of
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A_DEC, A_INC:
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{replace inc/dec with add/sub 1, because inc/dec doesn't set the carry flag}
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begin
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case taicpu(hp1).opcode Of
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A_DEC: taicpu(hp1).opcode := A_SUB;
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A_INC: taicpu(hp1).opcode := A_ADD;
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end;
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taicpu(hp1).loadoper(1,taicpu(hp1).oper[0]^);
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taicpu(hp1).loadConst(0,1);
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taicpu(hp1).ops:=2;
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end
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end;
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hp1 := tai(p.next);
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asml.remove(p);
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p.free;
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p := tai(hp1);
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continue
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end;
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end
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else
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{ change "test $-1,%reg" into "test %reg,%reg" }
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if IsTestConstX and (taicpu(p).oper[1]^.typ=top_reg) then
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taicpu(p).loadoper(0,taicpu(p).oper[1]^);
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end { case }
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else
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{ change "test $-1,%reg" into "test %reg,%reg" }
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if IsTestConstX and (taicpu(p).oper[1]^.typ=top_reg) then
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taicpu(p).loadoper(0,taicpu(p).oper[1]^);
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end;
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if PostPeepholeOptTest(p) then
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Continue;
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end;
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end;
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end;
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@ -74,6 +74,7 @@ unit aoptx86;
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function PostPeepholeOptMov(const p : tai) : Boolean;
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function PostPeepholeOptCmp(var p : tai) : Boolean;
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function PostPeepholeOptTestOr(var p : tai) : Boolean;
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procedure OptReferences;
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end;
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@ -2683,6 +2684,99 @@ unit aoptx86;
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end;
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function TX86AsmOptimizer.PostPeepholeOptTestOr(var p : tai) : Boolean;
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var
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IsTestConstX : Boolean;
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hp1,hp2 : tai;
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begin
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Result:=false;
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{ removes the line marked with (x) from the sequence
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and/or/xor/add/sub/... $x, %y
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test/or %y, %y | test $-1, %y (x)
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j(n)z _Label
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as the first instruction already adjusts the ZF
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%y operand may also be a reference }
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IsTestConstX:=(taicpu(p).opcode=A_TEST) and
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MatchOperand(taicpu(p).oper[0]^,-1);
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if (OpsEqual(taicpu(p).oper[0]^,taicpu(p).oper[1]^) or IsTestConstX) and
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GetLastInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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GetNextInstruction(p,hp2) and
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MatchInstruction(hp2,A_SETcc,A_Jcc,A_CMOVcc,[]) then
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case taicpu(hp1).opcode Of
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A_ADD, A_SUB, A_OR, A_XOR, A_AND:
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begin
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if OpsEqual(taicpu(hp1).oper[1]^,taicpu(p).oper[1]^) and
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{ does not work in case of overflow for G(E)/L(E)/C_O/C_NO }
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{ and in case of carry for A(E)/B(E)/C/NC }
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((taicpu(hp2).condition in [C_Z,C_NZ,C_E,C_NE]) or
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((taicpu(hp1).opcode <> A_ADD) and
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(taicpu(hp1).opcode <> A_SUB))) then
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begin
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hp1 := tai(p.next);
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asml.remove(p);
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p.free;
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p := tai(hp1);
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Result:=true;
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end;
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end;
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A_SHL, A_SAL, A_SHR, A_SAR:
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begin
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if OpsEqual(taicpu(hp1).oper[1]^,taicpu(p).oper[1]^) and
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{ SHL/SAL/SHR/SAR with a value of 0 do not change the flags }
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{ therefore, it's only safe to do this optimization for }
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{ shifts by a (nonzero) constant }
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(taicpu(hp1).oper[0]^.typ = top_const) and
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(taicpu(hp1).oper[0]^.val <> 0) and
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{ does not work in case of overflow for G(E)/L(E)/C_O/C_NO }
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{ and in case of carry for A(E)/B(E)/C/NC }
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(taicpu(hp2).condition in [C_Z,C_NZ,C_E,C_NE]) then
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begin
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hp1 := tai(p.next);
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asml.remove(p);
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p.free;
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p := tai(hp1);
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Result:=true;
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end;
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end;
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A_DEC, A_INC, A_NEG:
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begin
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if OpsEqual(taicpu(hp1).oper[0]^,taicpu(p).oper[1]^) and
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{ does not work in case of overflow for G(E)/L(E)/C_O/C_NO }
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{ and in case of carry for A(E)/B(E)/C/NC }
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(taicpu(hp2).condition in [C_Z,C_NZ,C_E,C_NE]) then
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begin
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case taicpu(hp1).opcode Of
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A_DEC, A_INC:
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{ replace inc/dec with add/sub 1, because inc/dec doesn't set the carry flag }
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begin
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case taicpu(hp1).opcode Of
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A_DEC: taicpu(hp1).opcode := A_SUB;
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A_INC: taicpu(hp1).opcode := A_ADD;
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end;
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taicpu(hp1).loadoper(1,taicpu(hp1).oper[0]^);
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taicpu(hp1).loadConst(0,1);
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taicpu(hp1).ops:=2;
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end
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end;
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hp1 := tai(p.next);
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asml.remove(p);
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p.free;
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p := tai(hp1);
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Result:=true;
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end;
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end
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else
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{ change "test $-1,%reg" into "test %reg,%reg" }
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if IsTestConstX and (taicpu(p).oper[1]^.typ=top_reg) then
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taicpu(p).loadoper(0,taicpu(p).oper[1]^);
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end { case }
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{ change "test $-1,%reg" into "test %reg,%reg" }
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else if IsTestConstX and (taicpu(p).oper[1]^.typ=top_reg) then
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taicpu(p).loadoper(0,taicpu(p).oper[1]^);
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end;
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procedure TX86AsmOptimizer.OptReferences;
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var
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p: tai;
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@ -144,6 +144,9 @@ uses
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Result:=PostPeepholeOptMov(p);
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A_CMP:
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Result:=PostPeepholeOptCmp(p);
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A_OR,
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A_TEST:
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Result:=PostPeepholeOptTestOr(p);
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end;
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end;
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end;
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