mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2026-02-04 05:14:51 +01:00
* basic ppc64 PIC code support
git-svn-id: trunk@2223 -
This commit is contained in:
tom_at_work
parent
c887507adf
commit
4e35206d33
@ -115,6 +115,7 @@ begin
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if (target_info.system <> system_powerpc_darwin) then
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s := s + refaddr2str[refaddr];
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end;
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if (refaddr = addr_pic) then s := s + ')';
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if (index = NR_NO) and (base <> NR_NO) then
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begin
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@ -174,6 +174,14 @@ uses
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symconst, symsym, fmodule,
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rgobj, tgobj, cpupi, procinfo, paramgr;
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function ref2string(const ref : treference) : string;
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begin
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result := 'base : ' + inttostr(ord(ref.base)) + ' index : ' + inttostr(ord(ref.index)) + ' refaddr : ' + inttostr(ord(ref.refaddr)) + ' offset : ' + inttostr(ref.offset) + ' symbol : ';
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if (assigned(ref.symbol)) then
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result := result + ref.symbol.name;
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end;
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{ helper function which calculate "magic" values for replacement of unsigned
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division by constant operation by multiplication. See the PowerPC compiler
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developer manual for more information }
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@ -375,7 +383,7 @@ begin
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location^.register)
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else
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{$IFDEF extdebug}
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list.concat(tai_comment.create(strpnew('a_param_ref with OS_NO, sizeleft ' + inttostr(sizeleft))));
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list.concat(tai_comment.create(strpnew('a_param_ref with OS_NO, sizeleft ' + inttostr(sizeleft))));
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{$ENDIF extdebug}
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{ load non-integral sized memory location into register. This
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@ -694,6 +702,10 @@ var
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ref2: treference;
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begin
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{$IFDEF EXTDEBUG}
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list.concat(tai_comment.create(strpnew('a_load_ref_reg ' + ref2string(ref))));
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{$ENDIF EXTDEBUG}
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if not (fromsize in [OS_8, OS_S8, OS_16, OS_S16, OS_32, OS_S32, OS_64, OS_S64]) then
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internalerror(2002090902);
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ref2 := ref;
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@ -874,7 +886,7 @@ var
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internalerror(2005061701);
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end else if (a = 1) then begin
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cg.a_load_reg_reg(exprasmlist, OS_INT, OS_INT, src, dst);
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end else if (a = -1) then begin
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end else if (a = -1) and (signed) then begin
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{ note: only in the signed case possible..., may overflow }
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exprasmlist.concat(taicpu.op_reg_reg(negops[cs_check_overflow in aktlocalswitches], dst, src));
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end else if (ispowerof2(a, power, isNegPower)) then begin
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@ -1498,31 +1510,35 @@ begin
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ref2 := ref;
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fixref(list, ref2, OS_64);
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{ load a symbol }
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if assigned(ref2.symbol) or (hasLargeOffset(ref2)) then begin
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{ add the symbol's value to the base of the reference, and if the }
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{ reference doesn't have a base, create one }
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reference_reset(tmpref);
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tmpref.offset := ref2.offset;
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tmpref.symbol := ref2.symbol;
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tmpref.relsymbol := ref2.relsymbol;
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{ load 64 bit reference into r. If the reference already has a base register,
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first load the 64 bit value into a temp register, then add it to the result
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register rD }
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if (ref2.base <> NR_NO) then begin
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{ already have a base register, so allocate a new one }
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tempreg := rg[R_INTREGISTER].getregister(list, R_SUBWHOLE);
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end else begin
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tempreg := r;
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end;
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if (assigned(ref2.symbol) or (hasLargeOffset(ref2))) then begin
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{ add the symbol's value to the base of the reference, and if the }
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{ reference doesn't have a base, create one }
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reference_reset(tmpref);
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tmpref.offset := ref2.offset;
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tmpref.symbol := ref2.symbol;
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tmpref.relsymbol := ref2.relsymbol;
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{ load 64 bit reference into r. If the reference already has a base register,
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first load the 64 bit value into a temp register, then add it to the result
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register rD }
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if (ref2.base <> NR_NO) then begin
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{ already have a base register, so allocate a new one }
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tempreg := rg[R_INTREGISTER].getregister(list, R_SUBWHOLE);
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end else begin
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tempreg := r;
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end;
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{ code for loading a reference from a symbol into a register rD }
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(*
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lis rX,SYM@highest
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ori rX,SYM@higher
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sldi rX,rX,32
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oris rX,rX,SYM@h
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ori rX,rX,SYM@l
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*)
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{ code for loading a reference from a symbol into a register rD }
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(*
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lis rX,SYM@highest
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ori rX,SYM@higher
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sldi rX,rX,32
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oris rX,rX,SYM@h
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ori rX,rX,SYM@l
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*)
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{$IFDEF EXTDEBUG}
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list.concat(tai_comment.create(strpnew('loadaddr_ref_reg ')));
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{$ENDIF EXTDEBUG}
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if (assigned(tmpref.symbol)) then begin
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tmpref.refaddr := addr_highest;
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list.concat(taicpu.op_reg_ref(A_LIS, tempreg, tmpref));
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tmpref.refaddr := addr_higher;
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@ -1532,27 +1548,30 @@ begin
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list.concat(taicpu.op_reg_reg_ref(A_ORIS, tempreg, tempreg, tmpref));
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tmpref.refaddr := addr_low;
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list.concat(taicpu.op_reg_reg_ref(A_ORI, tempreg, tempreg, tmpref));
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end else
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a_load_const_reg(list, OS_ADDR, tmpref.offset, tempreg);
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{ if there's already a base register, add the temp register contents to
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the base register }
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if (ref2.base <> NR_NO) then begin
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list.concat(taicpu.op_reg_reg_reg(A_ADD, r, tempreg, ref2.base));
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end;
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end else if ref2.offset <> 0 then begin
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{ if there's already a base register, add the temp register contents to
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the base register }
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if (ref2.base <> NR_NO) then begin
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list.concat(taicpu.op_reg_reg_reg(A_ADD, r, tempreg, ref2.base));
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end;
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end else if (ref2.offset <> 0) then begin
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{ no symbol, but offset <> 0 }
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if ref2.base <> NR_NO then begin
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if (ref2.base <> NR_NO) then begin
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a_op_const_reg_reg(list, OP_ADD, OS_64, ref2.offset, ref2.base, r)
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{ FixRef makes sure that "(ref.index <> R_NO) and (ref.offset <> 0)" never
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occurs, so now only ref.offset has to be loaded }
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end else begin
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a_load_const_reg(list, OS_64, ref2.offset, r)
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a_load_const_reg(list, OS_64, ref2.offset, r);
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end;
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end else if ref.index <> NR_NO then
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end else if (ref2.index <> NR_NO) then begin
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list.concat(taicpu.op_reg_reg_reg(A_ADD, r, ref2.base, ref2.index))
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else if (ref2.base <> NR_NO) and
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(r <> ref2.base) then
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end else if (ref2.base <> NR_NO) and
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(r <> ref2.base) then begin
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a_load_reg_reg(list, OS_ADDR, OS_ADDR, ref2.base, r)
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else begin
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//list.concat(taicpu.op_reg_reg(A_MR, ref2.base, r));
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end else begin
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list.concat(taicpu.op_reg_const(A_LI, r, 0));
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end;
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end;
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@ -1577,7 +1596,7 @@ begin
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{$IFDEF extdebug}
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if len > high(aint) then
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internalerror(2002072704);
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list.concat(tai_comment.create(strpnew('g_concatcopy')));
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list.concat(tai_comment.create(strpnew('g_concatcopy1 ' + inttostr(len) + ' bytes left ')));
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{$ENDIF extdebug}
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{ make sure short loads are handled as optimally as possible;
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note that the data here never overlaps, so we can do a forward
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@ -1587,6 +1606,7 @@ begin
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if (len <= maxmoveunit) then begin
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src := source; dst := dest;
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list.concat(tai_comment.create(strpnew('g_concatcopy3 ' + inttostr(src.offset) + ' ' + inttostr(dst.offset))));
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while (len <> 0) do begin
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if (len = 8) then begin
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a_load_ref_ref(list, OS_64, OS_64, src, dst);
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@ -1607,6 +1627,10 @@ begin
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end;
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exit;
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end;
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{$IFDEF extdebug}
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list.concat(tai_comment.create(strpnew('g_concatcopy2 ' + inttostr(len) + ' bytes left ')));
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{$ENDIF extdebug}
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count := len div maxmoveunit;
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@ -1830,36 +1854,54 @@ var
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begin
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l:=objectlibrary.getasmsymbol(symbol+'$got');
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if not(assigned(l)) then begin
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l:=objectlibrary.newasmsymbol(symbol+'$got',AB_COMMON,AT_DATA);
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l:=objectlibrary.newasmsymbol(symbol+'$got',AB_LOCAL, AT_LABEL);
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asmlist[al_picdata].concat(tai_section.create(sec_toc, '.toc', 8));
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asmlist[al_picdata].concat(tai_symbol.create(l,0));
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asmlist[al_picdata].concat(tai_const.create_indirect_sym(objectlibrary.newasmsymbol(symbol,AB_EXTERNAL,AT_DATA)));
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asmlist[al_picdata].concat(tai_const.create_32bit(0));
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asmlist[al_picdata].concat(tai_directive.create(asd_toc_entry, symbol + '[TC], ' + symbol));
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end;
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reference_reset_symbol(ref,l,0);
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ref.base := NR_R2;
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result := cg.rg[R_INTREGISTER].getregister(list, R_SUBWHOLE);
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cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
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ref.refaddr := addr_pic;
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result := rg[R_INTREGISTER].getregister(list, R_SUBWHOLE);
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{$IFDEF EXTDEBUG}
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list.concat(tai_comment.create(strpnew('loading got reference for ' + symbol)));
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{$ENDIF EXTDEBUG}
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// cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
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list.concat(taicpu.op_reg_ref(A_LD, result, ref));
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end;
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function tcgppc.fixref(list: taasmoutput; var ref: treference; const size : TCgsize): boolean;
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var
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tmpreg: tregister;
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name : string;
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begin
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result := false;
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if (cs_create_pic in aktmoduleswitches) and (assigned(ref.symbol)) and (ref.symbol.defbind = AB_EXTERNAL) then begin
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if (length(name) > 100) then internalerror(123456);
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{ Avoids recursion. }
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if (ref.refaddr = addr_pic) then exit;
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{$IFDEF EXTDEBUG}
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list.concat(tai_comment.create(strpnew('fixref0 ' + ref2string(ref))));
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{$ENDIF EXTDEBUG}
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{ if we have to create PIC, add the symbol to the TOC/GOT }
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if (cs_create_pic in aktmoduleswitches) and (assigned(ref.symbol)) then begin
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tmpreg := load_got_symbol(list, ref.symbol.name);
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if (ref.base = NR_NO) then
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ref.base := tmpreg
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else if (ref.index = NR_NO) then
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ref.index := tmpreg
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else
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list.concat(taicpu.op_reg_reg_reg(A_ADD,ref.base,ref.base,tmpreg));
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else begin
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a_op_reg_reg_reg(list, OP_ADD, OS_ADDR, ref.base, tmpreg, tmpreg);
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ref.base := tmpreg;
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end;
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ref.symbol := nil;
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{$IFDEF EXTDEBUG}
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list.concat(tai_comment.create(strpnew('fixref-pic ' + ref2string(ref))));
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{$ENDIF EXTDEBUG}
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end;
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if (ref.base = NR_NO) then begin
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if (ref.base = NR_NO) then begin
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ref.base := ref.index;
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ref.index := NR_NO;
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end;
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@ -1868,9 +1910,14 @@ begin
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result := true;
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tmpreg := rg[R_INTREGISTER].getregister(list, R_SUBWHOLE);
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a_op_reg_reg_reg(list, OP_ADD, size, ref.base, ref.index, tmpreg);
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ref.index := NR_NO;
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ref.base := tmpreg;
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ref.index := NR_NO;
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end;
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if (ref.index <> NR_NO) and (assigned(ref.symbol) or (ref.offset <> 0)) then
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internalerror(2006010506);
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{$IFDEF EXTDEBUG}
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list.concat(tai_comment.create(strpnew('fixref1 ' + ref2string(ref))));
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{$ENDIF EXTDEBUG}
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end;
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procedure tcgppc.a_load_store(list: taasmoutput; op: tasmop; reg: tregister;
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@ -1884,6 +1931,18 @@ begin
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which is not possible to directly map to instructions of the PowerPC architecture }
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if (ref.index <> NR_NO) and ((ref.offset <> 0) or (assigned(ref.symbol))) then
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internalerror(200310131);
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{ if this is a PIC'ed address, handle it and exit }
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if (ref.refaddr = addr_pic) then begin
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if (ref.offset <> 0) then
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internalerror(2006010501);
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if (ref.index <> NR_NO) then
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internalerror(2006010502);
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if (not assigned(ref.symbol)) then
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internalerror(200601050);
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list.concat(taicpu.op_reg_ref(op, reg, ref));
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exit;
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end;
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{ for some instructions we need to check that the offset is divisible by at
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least four. If not, add the bytes which are "off" to the base register and
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@ -1903,10 +1962,12 @@ begin
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ref.offset := (ref.offset div 4) * 4;
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end;
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end;
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{$IFDEF EXTDEBUG}
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list.concat(tai_comment.create(strpnew('a_load_store1 ' + BoolToStr(ref.refaddr = addr_pic))));
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{$ENDIF EXTDEBUG}
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{ if we have to load/store from a symbol or large addresses, use a temporary register
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containing the address }
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if assigned(ref.symbol) or (hasLargeOffset(ref)) then begin
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if (assigned(ref.symbol) or (hasLargeOffset(ref))) then begin
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tmpreg := rg[R_INTREGISTER].getregister(list, R_SUBWHOLE);
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if (hasLargeOffset(ref) and (ref.base = NR_NO)) then begin
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@ -1936,17 +1997,20 @@ begin
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}
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tmpreg2 := rg[R_INTREGISTER].getregister(list, R_SUBWHOLE);
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tmpref.refaddr := addr_highest;
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list.concat(taicpu.op_reg_ref(A_LIS, tmpreg, tmpref));
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tmpref.refaddr := addr_higher;
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list.concat(taicpu.op_reg_reg_ref(A_ORI, tmpreg, tmpreg, tmpref));
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if (assigned(tmpref.symbol)) then begin
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tmpref.refaddr := addr_highest;
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list.concat(taicpu.op_reg_ref(A_LIS, tmpreg, tmpref));
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tmpref.refaddr := addr_higher;
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list.concat(taicpu.op_reg_reg_ref(A_ORI, tmpreg, tmpreg, tmpref));
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tmpref.refaddr := addr_high;
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list.concat(taicpu.op_reg_ref(A_LIS, tmpreg2, tmpref));
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tmpref.refaddr := addr_low;
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list.concat(taicpu.op_reg_reg_ref(A_ORI, tmpreg2, tmpreg2, tmpref));
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tmpref.refaddr := addr_high;
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list.concat(taicpu.op_reg_ref(A_LIS, tmpreg2, tmpref));
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tmpref.refaddr := addr_low;
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list.concat(taicpu.op_reg_reg_ref(A_ORI, tmpreg2, tmpreg2, tmpref));
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list.concat(taicpu.op_reg_reg_const_const(A_RLDIMI, tmpreg2, tmpreg, 32, 0));
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list.concat(taicpu.op_reg_reg_const_const(A_RLDIMI, tmpreg2, tmpreg, 32, 0));
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end else
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a_load_const_reg(list, OS_ADDR, tmpref.offset, tmpreg2);
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reference_reset(tmpref);
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tmpref.base := ref.base;
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