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* always enable portl (32-bit port access) in the i8086 ports unit

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git-svn-id: trunk@37560 -
This commit is contained in:
nickysn 2017-11-06 16:32:36 +00:00
parent 0695381709
commit 4f498c9e3c
1 changed files with 2 additions and 15 deletions
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17
rtl/msdos/ports.pp
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@ -16,15 +16,6 @@
unit ports; unit ports;
{$if defined(CPU80386)
or defined(CPUPENTIUM)
or defined(CPUPENTIUM2)
or defined(CPUPENTIUM3)
or defined(CPUPENTIUM4)
or defined(CPUPENTIUMM)}
{$define CPU_IS_386_OR_LATER}
{$endif}
interface interface
type type
@ -40,22 +31,19 @@ type
property pp[w : word] : word read readport write writeport;default; property pp[w : word] : word read readport write writeport;default;
end; end;
{$ifdef CPU_IS_386_OR_LATER}
tportl = object tportl = object
procedure writeport(p : word;data : longint); procedure writeport(p : word;data : longint);
function readport(p : word) : longint; function readport(p : word) : longint;
property pp[w : word] : longint read readport write writeport;default; property pp[w : word] : longint read readport write writeport;default;
end; end;
{$endif CPU_IS_386_OR_LATER}
var var
{ we don't need to initialize port, because neither member { we don't need to initialize port, because neither member
variables nor virtual methods are accessed } variables nor virtual methods are accessed }
port, port,
portb : tport; portb : tport;
portw : tportw; portw : tportw;
{$ifdef CPU_IS_386_OR_LATER}
portl : tportl; portl : tportl;
{$endif CPU_IS_386_OR_LATER}
implementation implementation
@ -91,7 +79,7 @@ asm
end; end;
{$ifdef CPU_IS_386_OR_LATER} {$asmcpu 80386}
procedure tportl.writeport(p : word;data : longint);assembler; procedure tportl.writeport(p : word;data : longint);assembler;
asm asm
mov dx, p mov dx, p
@ -107,6 +95,5 @@ asm
mov edx, eax mov edx, eax
shr edx, 16 shr edx, 16
end; end;
{$endif CPU_IS_386_OR_LATER}
end. end.