paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-04-07 07:28:26 +02:00
Code Issues Packages Projects Releases Wiki Activity

Assembly version of fpc_ansistr_incr_ref for ARM

Browse Source 
Optimized to minimize load latency and icache usage. Together with the
previous fpc_ansistr_decr_ref optimization this little test programm
runs about 40% faster.

  program stringspeed;

  procedure test(s:string);
  begin
  end;

  var
    s:string;
    i: cardinal;
  begin
    s:='abcd';
    for i:=0 to $FFFFFF do
      test(s);
  end.

Even with s:='' it's about 30% faster.

git-svn-id: trunk@22035 -
This commit is contained in:
masta 2012-08-08 15:29:26 +00:00
parent b9770519f8
commit 51af7bd440
1 changed files with 22 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
rtl/arm/arm.inc
View File

@ -608,6 +608,28 @@ asm
{$endif}
end;
{$define FPC_SYSTEM_HAS_ANSISTR_INCR_REF}
Procedure fpc_ansistr_incr_ref (S : Pointer); [Public,Alias:'FPC_ANSISTR_INCR_REF'];assembler;nostackframe; compilerproc;
asm
// Null string?
cmp r0, #0
// Load reference counter
ldrne r1, [r0, #-8]
// pointer to counter, calculate here for delay slot utilization
subne r0, r0, #8
{$if defined(cpuarmv3) or defined(cpuarmv4)}
moveq pc,lr
{$else}
bxeq lr
{$endif}
// Check for a constant string
cmp r1, #0
// Tailcall
// Hopefully the linker will place InterLockedIncrement as layed out here
bge InterLockedIncrement
// Freepascal will generate a proper return here, save some cachespace
end;
function InterLockedIncrement (var Target: longint) : longint; assembler; nostackframe;
asm