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* SPARC: OP_NOT can always be done in 32 bits, because for 8 and 16-bit operations the high bits of result are adjusted immediately afterwards.

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* "carry clear" flag can be converted into register using a single instruction.

git-svn-id: trunk@27984 -
This commit is contained in:
sergei 2014-06-16 19:15:01 +00:00
parent d6c6c84f76
commit 51f6092672
1 changed files with 2 additions and 17 deletions
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19
compiler/sparc/cgcpu.pas
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@ -721,24 +721,12 @@ implementation
procedure TCgSparc.a_op_reg_reg(list:TAsmList;Op:TOpCG;size:TCGSize;src, dst:TRegister); procedure TCgSparc.a_op_reg_reg(list:TAsmList;Op:TOpCG;size:TCGSize;src, dst:TRegister);
var
a : aint;
begin begin
Case Op of Case Op of
OP_NEG : OP_NEG :
list.concat(taicpu.op_reg_reg(TOpCG2AsmOp[op],src,dst)); list.concat(taicpu.op_reg_reg(TOpCG2AsmOp[op],src,dst));
OP_NOT : OP_NOT :
begin list.concat(taicpu.op_reg_reg_reg(A_XNOR,src,NR_G0,dst));
case size of
OS_8 :
a:=aint($ffffff00);
OS_16 :
a:=aint($ffff0000);
else
a:=0;
end;
handle_reg_const_reg(list,A_XNOR,src,a,dst);
end;
else else
list.concat(taicpu.op_reg_reg_reg(TOpCG2AsmOp[op],dst,src,dst)); list.concat(taicpu.op_reg_reg_reg(TOpCG2AsmOp[op],dst,src,dst));
end; end;
@ -938,10 +926,7 @@ implementation
if (f in [F_B]) then if (f in [F_B]) then
list.concat(taicpu.op_reg_reg_reg(A_ADDX,NR_G0,NR_G0,reg)) list.concat(taicpu.op_reg_reg_reg(A_ADDX,NR_G0,NR_G0,reg))
else if (f in [F_AE]) then else if (f in [F_AE]) then
begin list.concat(taicpu.op_reg_const_reg(A_SUBX,NR_G0,-1,reg))
a_load_const_reg(list,size,1,reg);
list.concat(taicpu.op_reg_reg_reg(A_SUBX,reg,NR_G0,reg));
end
else else
begin begin
current_asmdata.getjumplabel(hl); current_asmdata.getjumplabel(hl);