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+ added test for i8086 inline asm far and near indirect jmps as well
git-svn-id: trunk@32110 -
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@ -11457,6 +11457,7 @@ tests/test/cg/variants/tvarol94.pp svneol=native#text/plain
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tests/test/cg/variants/tvarol96.pp svneol=native#text/plain
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tests/test/cpu16/i8086/tfarcal1.pp svneol=native#text/pascal
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tests/test/cpu16/i8086/tfarcal2.pp svneol=native#text/pascal
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tests/test/cpu16/i8086/tfarjmp2.pp svneol=native#text/pascal
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tests/test/cpu16/i8086/tfarptr1.pp svneol=native#text/pascal
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tests/test/cpu16/i8086/tfarptr2.pp svneol=native#text/pascal
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tests/test/cpu16/i8086/tfarptr3.pp svneol=native#text/pascal
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158
tests/test/cpu16/i8086/tfarjmp2.pp
Normal file
158
tests/test/cpu16/i8086/tfarjmp2.pp
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@ -0,0 +1,158 @@
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{ %target=msdos }
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{ test for i8086 inline assembler indirect near and far jumps }
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{ since testing and detecting near jumps miscompiled as far (and vice versa)
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is hard, we don't actually execute the jumps, but instead, before each jump,
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we issue an int instruction that calls our own interrupt handler that
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manually disassembles the instruction, checks that it is of the correct type
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and then skips the instruction. }
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{ this test is Turbo Pascal 7 compatible }
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program tfarjmp2;
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uses
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dos;
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{$ifndef FPC}
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type
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FarPointer = Pointer;
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{$endif ndef FPC}
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const
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NearInt = $E7;
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FarInt = $E8;
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var
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OldNearIntVec: FarPointer;
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OldFarIntVec: FarPointer;
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procedure Error;
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begin
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Writeln('Error');
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SetIntVec(NearInt, OldNearIntVec);
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SetIntVec(FarInt, OldFarIntVec);
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halt(1);
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end;
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procedure IntNearHandler(Flags, CS, IP, AX, BX, CX, DX, SI, DI, DS, ES, BP: Word); interrupt;
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var
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modrm: Byte;
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begin
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if Mem[CS:IP]<>$FF then
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Error;
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Inc(IP);
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modrm := Mem[CS:IP];
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Inc(IP);
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if ((modrm shr 3) and 7) <> 4 then
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Error;
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{ 'jmp reg'? -> not an indirect jmp }
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if (modrm shr 6)=3 then
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Error;
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case modrm shr 6 of
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0: if (modrm and 7) = 6 then
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Inc(IP, 2); { disp16 }
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1: Inc(IP); { disp8 }
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2: Inc(IP,2); { disp16 }
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end;
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end;
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procedure IntFarHandler(Flags, CS, IP, AX, BX, CX, DX, SI, DI, DS, ES, BP: Word); interrupt;
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var
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modrm: Byte;
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begin
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if Mem[CS:IP]<>$FF then
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Error;
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Inc(IP);
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modrm := Mem[CS:IP];
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Inc(IP);
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if ((modrm shr 3) and 7) <> 5 then
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Error;
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{ 'jmp far reg'??? -> invalid instruction }
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if (modrm shr 6)=3 then
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Error;
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case modrm shr 6 of
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0: if (modrm and 7) = 6 then
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Inc(IP, 2); { disp16 }
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1: Inc(IP); { disp8 }
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2: Inc(IP,2); { disp16 }
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end;
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end;
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procedure testloc(a: longint; b: integer);
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begin
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asm
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int NearInt
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jmp word [a] { near }
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int FarInt
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jmp [a] { far }
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int FarInt
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jmp a { far }
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int FarInt
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jmp dword [b] { far }
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int NearInt
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jmp [b] { near }
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int NearInt
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jmp b { near }
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end;
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end;
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var
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g16: integer;
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g32: longint;
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begin
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GetIntVec(NearInt, OldNearIntVec);
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SetIntVec(NearInt, @IntNearHandler);
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GetIntVec(FarInt, OldFarIntVec);
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SetIntVec(FarInt, @IntFarHandler);
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asm
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int NearInt
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jmp g16 { near }
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int NearInt
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jmp [g16] { near }
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int FarInt
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jmp g32 { far }
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int FarInt
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jmp [g32] { far }
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int FarInt
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jmp dword [bx] { far }
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{$ifdef FPC}
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{ these three are supported by Free Pascal only. They don't work with
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Turbo Pascal 7's inline assembler. }
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{ using the 'far' keyword }
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int FarInt
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jmp far [bx]
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{ using the 'near' keyword }
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int NearInt
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jmp near [bx]
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{ ambiguous (that's why it's not supported by TP7), but FPC supports it by
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extension from the 32-bit mode }
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int NearInt
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jmp [bx]
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{$endif FPC}
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end;
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testloc(5, 10);
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Writeln('Ok');
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SetIntVec(NearInt, OldNearIntVec);
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SetIntVec(FarInt, OldFarIntVec);
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end.
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