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* i386: switch the div/mod node to shared code, leaving in place the specific optimization for division by power of 2.
git-svn-id: trunk@27975 -
This commit is contained in:
sergei
parent
99b4389297
commit
5356f17fa5
@ -29,7 +29,7 @@ interface
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node,nmat,ncgmat,nx86mat;
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type
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ti386moddivnode = class(tmoddivnode)
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ti386moddivnode = class(tx86moddivnode)
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procedure pass_generate_code;override;
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end;
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@ -65,177 +65,43 @@ implementation
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procedure ti386moddivnode.pass_generate_code;
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var
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hreg1,hreg2:Tregister;
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hreg1:Tregister;
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power:longint;
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hl:Tasmlabel;
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op:Tasmop;
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e : longint;
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d,m: dword;
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s: byte;
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sm: aint;
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m_add: boolean;
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begin
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secondpass(left);
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if codegenerror then
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exit;
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secondpass(right);
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if codegenerror then
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exit;
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if is_64bitint(resultdef) then
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{ should be handled in pass_1 (JM) }
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internalerror(200109052);
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{ put numerator in register }
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location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,false);
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hreg1:=left.location.register;
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if (nodetype=divn) and (right.nodetype=ordconstn) then
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if (nodetype=divn) and (right.nodetype=ordconstn) and
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is_signed(left.resultdef) and
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ispowerof2(tordconstnode(right).value.svalue,power) and
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((current_settings.optimizecputype = cpu_386) or
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(cs_opt_size in current_settings.optimizerswitches)) then
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begin
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if ispowerof2(tordconstnode(right).value.svalue,power) then
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begin
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{ for signed numbers, the numerator must be adjusted before the
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shift instruction, but not wih unsigned numbers! Otherwise,
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"Cardinal($ffffffff) div 16" overflows! (JM) }
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if is_signed(left.resultdef) Then
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begin
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if (current_settings.optimizecputype <> cpu_386) and
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not(cs_opt_size in current_settings.optimizerswitches) then
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{ use a sequence without jumps, saw this in
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comp.compilers (JM) }
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begin
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{ no jumps, but more operations }
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hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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emit_reg_reg(A_MOV,S_L,hreg1,hreg2);
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{If the left value is signed, hreg2=$ffffffff, otherwise 0.}
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emit_const_reg(A_SAR,S_L,31,hreg2);
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{If signed, hreg2=right value-1, otherwise 0.}
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emit_const_reg(A_AND,S_L,tordconstnode(right).value.svalue-1,hreg2);
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{ add to the left value }
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emit_reg_reg(A_ADD,S_L,hreg2,hreg1);
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{ do the shift }
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emit_const_reg(A_SAR,S_L,power,hreg1);
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end
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else
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begin
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{ a jump, but less operations }
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emit_reg_reg(A_TEST,S_L,hreg1,hreg1);
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current_asmdata.getjumplabel(hl);
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cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NS,hl);
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if power=1 then
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emit_reg(A_INC,S_L,hreg1)
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else
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emit_const_reg(A_ADD,S_L,tordconstnode(right).value.svalue-1,hreg1);
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cg.a_label(current_asmdata.CurrAsmList,hl);
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emit_const_reg(A_SAR,S_L,power,hreg1);
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end
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end
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else
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emit_const_reg(A_SHR,S_L,power,hreg1);
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location.register:=hreg1;
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end
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{ signed divide-by-power-of-two optimized for size }
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secondpass(left);
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if codegenerror then
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exit;
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secondpass(right);
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if codegenerror then
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exit;
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,false);
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hreg1:=left.location.register;
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emit_reg_reg(A_TEST,S_L,hreg1,hreg1);
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current_asmdata.getjumplabel(hl);
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cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NS,hl);
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if power=1 then
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emit_reg(A_INC,S_L,hreg1)
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else
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begin
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if is_signed(left.resultdef) then
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begin
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e:=tordconstnode(right).value.svalue;
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calc_divconst_magic_signed(32,e,sm,s);
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_EAX);
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emit_const_reg(A_MOV,S_L,sm,NR_EAX);
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_EDX);
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emit_reg(A_IMUL,S_L,hreg1);
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{ only the high half of result is used }
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EAX);
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{ add or subtract dividend }
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if (e>0) and (sm<0) then
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emit_reg_reg(A_ADD,S_L,hreg1,NR_EDX)
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else if (e<0) and (sm>0) then
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emit_reg_reg(A_SUB,S_L,hreg1,NR_EDX);
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{ shift if necessary }
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if (s<>0) then
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emit_const_reg(A_SAR,S_L,s,NR_EDX);
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{ extract and add the sign bit }
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if (e<0) then
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emit_reg_reg(A_MOV,S_L,NR_EDX,hreg1);
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{ if e>=0, hreg1 still contains dividend }
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emit_const_reg(A_SHR,S_L,31,hreg1);
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emit_reg_reg(A_ADD,S_L,hreg1,NR_EDX);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EDX);
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_EDX,location.register)
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end
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else
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begin
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d:=tordconstnode(right).value.svalue;
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if d>=$80000000 then
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begin
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emit_const_reg(A_CMP,S_L,aint(d),hreg1);
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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emit_const_reg(A_MOV,S_L,0,location.register);
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emit_const_reg(A_SBB,S_L,-1,location.register);
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end
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else
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begin
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calc_divconst_magic_unsigned(32,d,m,m_add,s);
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_EAX);
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emit_const_reg(A_MOV,S_L,aint(m),NR_EAX);
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_EDX);
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emit_reg(A_MUL,S_L,hreg1);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EAX);
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if m_add then
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begin
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{ addition can overflow, shift first bit considering carry,
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then shift remaining bits in regular way. }
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emit_reg_reg(A_ADD,S_L,hreg1,NR_EDX);
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emit_const_reg(A_RCR,S_L,1,NR_EDX);
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dec(s);
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end;
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if s<>0 then
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emit_const_reg(A_SHR,S_L,aint(s),NR_EDX);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EDX);
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_EDX,location.register)
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end;
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end
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end
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emit_const_reg(A_ADD,S_L,tordconstnode(right).value.svalue-1,hreg1);
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cg.a_label(current_asmdata.CurrAsmList,hl);
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emit_const_reg(A_SAR,S_L,power,hreg1);
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location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
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location.register:=hreg1;
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end
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else
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begin
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_EAX);
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emit_reg_reg(A_MOV,S_L,hreg1,NR_EAX);
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_EDX);
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{Sign extension depends on the left type.}
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if torddef(left.resultdef).ordtype=u32bit then
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emit_reg_reg(A_XOR,S_L,NR_EDX,NR_EDX)
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else
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emit_none(A_CDQ,S_NO);
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{Division depends on the right type.}
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if Torddef(right.resultdef).ordtype=u32bit then
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op:=A_DIV
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else
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op:=A_IDIV;
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if right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
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emit_ref(op,S_L,right.location.reference)
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else if right.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
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emit_reg(op,S_L,right.location.register)
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else
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begin
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hreg1:=cg.getintregister(current_asmdata.CurrAsmList,right.location.size);
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hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,u32inttype,right.location,hreg1);
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emit_reg(op,S_L,hreg1);
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end;
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{Copy the result into a new register. Release EAX & EDX.}
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EDX);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EAX);
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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if nodetype=divn then
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_EAX,location.register)
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else
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_EDX,location.register);
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end;
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inherited pass_generate_code;
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end;
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