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* implementation of 32x32->64 multiplication for i386 based on patch
by Sergei Gorelkin git-svn-id: trunk@12028 -
This commit is contained in:
Jonas Maebe
parent
84112032c3
commit
53e52ac6a9
@ -30,9 +30,11 @@ interface
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type
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ti386addnode = class(tx86addnode)
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function use_generic_mul32to64: boolean; override;
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procedure second_addordinal; override;
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procedure second_add64bit;override;
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procedure second_cmp64bit;override;
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procedure second_mul;override;
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procedure second_mul(unsigned: boolean);
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end;
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implementation
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@ -46,6 +48,29 @@ interface
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ncon,nset,cgutils,tgobj,
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cga,ncgutil,cgobj,cg64f32,cgx86;
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{*****************************************************************************
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use_generic_mul32to64
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*****************************************************************************}
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function ti386addnode.use_generic_mul32to64: boolean;
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begin
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result := False;
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end;
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{ handles all unsigned multiplications, and 32->64 bit signed ones.
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32bit-only signed mul is handled by generic codegen }
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procedure ti386addnode.second_addordinal;
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var
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unsigned: boolean;
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begin
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unsigned:=not(is_signed(left.resultdef)) or
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not(is_signed(right.resultdef));
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if (nodetype=muln) and (unsigned or is_64bit(resultdef)) then
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second_mul(unsigned)
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else
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inherited second_addordinal;
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end;
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{*****************************************************************************
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Add64bit
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*****************************************************************************}
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@ -343,20 +368,24 @@ interface
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x86 MUL
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*****************************************************************************}
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procedure ti386addnode.second_mul;
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procedure ti386addnode.second_mul(unsigned: boolean);
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var reg:Tregister;
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ref:Treference;
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use_ref:boolean;
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hl4 : tasmlabel;
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const
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asmops: array[boolean] of tasmop = (A_IMUL, A_MUL);
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begin
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pass_left_right;
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{The location.register will be filled in later (JM)}
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location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
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{ Mul supports registers and references, so if not register/reference,
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load the location into a register}
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load the location into a register.
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The variant of IMUL which is capable of doing 32->64 bits has the same restrictions. }
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use_ref:=false;
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if left.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
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reg:=left.location.register
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@ -379,22 +408,36 @@ interface
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{Also allocate EDX, since it is also modified by a mul (JM).}
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_EDX);
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if use_ref then
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emit_ref(A_MUL,S_L,ref)
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emit_ref(asmops[unsigned],S_L,ref)
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else
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emit_reg(A_MUL,S_L,reg);
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if cs_check_overflow in current_settings.localswitches then
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begin
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current_asmdata.getjumplabel(hl4);
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cg.a_jmp_flags(current_asmdata.CurrAsmList,F_AE,hl4);
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cg.a_call_name(current_asmdata.CurrAsmList,'FPC_OVERFLOW',false);
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cg.a_label(current_asmdata.CurrAsmList,hl4);
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end;
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emit_reg(asmops[unsigned],S_L,reg);
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if (cs_check_overflow in current_settings.localswitches) and
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{ 32->64 bit cannot overflow }
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(not is_64bit(resultdef)) then
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begin
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current_asmdata.getjumplabel(hl4);
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cg.a_jmp_flags(current_asmdata.CurrAsmList,F_AE,hl4);
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cg.a_call_name(current_asmdata.CurrAsmList,'FPC_OVERFLOW',false);
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cg.a_label(current_asmdata.CurrAsmList,hl4);
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end;
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{Free EAX,EDX}
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EDX);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EAX);
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{Allocate a new register and store the result in EAX in it.}
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_EAX,location.register);
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if is_64bit(resultdef) then
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begin
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{Allocate a couple of registers and store EDX:EAX into it}
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location.register64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList, OS_INT, OS_INT, NR_EDX, location.register64.reghi);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EAX);
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location.register64.reglo := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList, OS_INT, OS_INT, NR_EAX, location.register64.reglo);
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end
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else
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begin
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{Allocate a new register and store the result in EAX in it.}
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EAX);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_EAX,location.register);
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end;
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location_freetemp(current_asmdata.CurrAsmList,left.location);
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location_freetemp(current_asmdata.CurrAsmList,right.location);
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end;
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@ -41,12 +41,10 @@ unit nx86add;
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procedure second_cmpfloatsse;
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procedure second_addfloatsse;
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procedure second_mul;virtual;abstract;
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public
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procedure second_addfloat;override;
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procedure second_addsmallset;override;
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procedure second_add64bit;override;
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procedure second_addordinal;override;
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procedure second_cmpfloat;override;
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procedure second_cmpsmallset;override;
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procedure second_cmp64bit;override;
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@ -993,21 +991,6 @@ unit nx86add;
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AddOrdinal
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*****************************************************************************}
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procedure tx86addnode.second_addordinal;
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begin
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{ filter unsigned MUL opcode, which requires special handling }
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if (nodetype=muln) and
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(not(is_signed(left.resultdef)) or
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not(is_signed(right.resultdef))) then
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begin
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second_mul;
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exit;
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end;
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inherited second_addordinal;
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end;
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procedure tx86addnode.second_cmpordinal;
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var
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opsize : tcgsize;
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@ -30,7 +30,8 @@ interface
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type
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tx8664addnode = class(tx86addnode)
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procedure second_mul;override;
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procedure second_addordinal; override;
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procedure second_mul;
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end;
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implementation
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@ -42,6 +43,24 @@ interface
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cgbase,cgutils,cga,cgobj,
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tgobj;
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{*****************************************************************************
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Addordinal
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*****************************************************************************}
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procedure tx8664addnode.second_addordinal;
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begin
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{ filter unsigned MUL opcode, which requires special handling }
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if (nodetype=muln) and
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(not(is_signed(left.resultdef)) or
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not(is_signed(right.resultdef))) then
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begin
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second_mul;
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exit;
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end;
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inherited second_addordinal;
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end;
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{*****************************************************************************
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MUL
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*****************************************************************************}
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