+ support for the PREFETCHTW1 instruction based on a patch by Emelyanov Roman, resolves #30933

git-svn-id: trunk@34917 -
2025-04-06 14:47:55 +02:00 · 2016-11-18 20:19:39 +00:00 · 2016-11-18 20:19:39 +00:00 · 56252d59f0
commit 56252d59f0
parent 63b0024e4c
26 changed files with 102 additions and 18 deletions
--- a/.gitattributes
+++ b/.gitattributes
@ -10413,6 +10413,7 @@ tests/tbf/tb0248.pp svneol=native#text/pascal
 tests/tbf/tb0249.pp svneol=native#text/pascal
 tests/tbf/tb0250.pp svneol=native#text/pascal
 tests/tbf/tb0251.pp svneol=native#text/pascal
+tests/tbf/tb0252.pp svneol=native#text/pascal
 tests/tbf/tb0252a.pp svneol=native#text/plain
 tests/tbf/tb0252b.pp svneol=native#text/plain
 tests/tbf/tb0252c.pp svneol=native#text/plain
@ -15258,6 +15259,7 @@ tests/webtbs/tw30832.pp svneol=native#text/pascal
 tests/webtbs/tw30889.pp svneol=native#text/pascal
 tests/webtbs/tw30923.pp svneol=native#text/pascal
 tests/webtbs/tw3093.pp svneol=native#text/plain
+tests/webtbs/tw30933.pp svneol=native#text/pascal
 tests/webtbs/tw30936.pp svneol=native#text/pascal
 tests/webtbs/tw30936a.pp svneol=native#text/pascal
 tests/webtbs/tw30936b.pp svneol=native#text/pascal
--- a/compiler/i386/i386att.inc
+++ b/compiler/i386/i386att.inc
@ -1034,5 +1034,6 @@
 'xtest',
 'rdrand',
 'rdseed',
-'xgetbv'
+'xgetbv',
+'prefetchwt1'
 );
--- a/compiler/i386/i386atts.inc
+++ b/compiler/i386/i386atts.inc
@ -1034,5 +1034,6 @@ attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
-attsufNONE
+attsufNONE,
+attsufINT
 );
--- a/compiler/i386/i386int.inc
+++ b/compiler/i386/i386int.inc
@ -1034,5 +1034,6 @@
 'xtest',
 'rdrand',
 'rdseed',
-'xgetbv'
+'xgetbv',
+'prefetchwt1'
 );
--- a/compiler/i386/i386nop.inc
+++ b/compiler/i386/i386nop.inc
@ -1,2 +1,2 @@
 { don't edit, this file is generated from x86ins.dat }
-1952;
+1953;
--- a/compiler/i386/i386op.inc
+++ b/compiler/i386/i386op.inc
@ -1034,5 +1034,6 @@ A_XEND,
 A_XTEST,
 A_RDRAND,
 A_RDSEED,
-A_XGETBV
+A_XGETBV,
+A_PREFETCHWT1
 );
--- a/compiler/i386/i386prop.inc
+++ b/compiler/i386/i386prop.inc
@ -1034,5 +1034,6 @@
 (Ch: (Ch_WFlags, Ch_None, Ch_None)),
 (Ch: (Ch_Wop1, Ch_WFlags, CH_None)),
 (Ch: (Ch_Wop1, Ch_WFlags, CH_None)),
-(Ch: (Ch_WEAX, Ch_WEDX, Ch_RECX))
+(Ch: (Ch_WEAX, Ch_WEDX, Ch_RECX)),
+(Ch: (Ch_All, Ch_None, Ch_None))
 );
--- a/compiler/i386/i386tab.inc
+++ b/compiler/i386/i386tab.inc
@ -13663,5 +13663,12 @@
    optypes : (ot_none,ot_none,ot_none,ot_none);
    code    : #3#15#1#208;
    flags   : if_xsave
+  ),
+  (
+    opcode  : A_PREFETCHWT1;
+    ops     : 1;
+    optypes : (ot_memory,ot_none,ot_none,ot_none);
+    code    : #2#15#13#130;
+    flags   : if_prefetchwt1
  )
 );
--- a/compiler/i8086/i8086att.inc
+++ b/compiler/i8086/i8086att.inc
@ -1048,5 +1048,6 @@
 'xtest',
 'rdrand',
 'rdseed',
-'xgetbv'
+'xgetbv',
+'prefetchwt1'
 );
--- a/compiler/i8086/i8086atts.inc
+++ b/compiler/i8086/i8086atts.inc
@ -1048,5 +1048,6 @@ attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
-attsufNONE
+attsufNONE,
+attsufINT
 );
--- a/compiler/i8086/i8086int.inc
+++ b/compiler/i8086/i8086int.inc
@ -1048,5 +1048,6 @@
 'xtest',
 'rdrand',
 'rdseed',
-'xgetbv'
+'xgetbv',
+'prefetchwt1'
 );
--- a/compiler/i8086/i8086nop.inc
+++ b/compiler/i8086/i8086nop.inc
@ -1,2 +1,2 @@
 { don't edit, this file is generated from x86ins.dat }
-1984;
+1985;
--- a/compiler/i8086/i8086op.inc
+++ b/compiler/i8086/i8086op.inc
@ -1048,5 +1048,6 @@ A_XEND,
 A_XTEST,
 A_RDRAND,
 A_RDSEED,
-A_XGETBV
+A_XGETBV,
+A_PREFETCHWT1
 );
--- a/compiler/i8086/i8086prop.inc
+++ b/compiler/i8086/i8086prop.inc
@ -1048,5 +1048,6 @@
 (Ch: (Ch_WFlags, Ch_None, Ch_None)),
 (Ch: (Ch_Wop1, Ch_WFlags, CH_None)),
 (Ch: (Ch_Wop1, Ch_WFlags, CH_None)),
-(Ch: (Ch_WEAX, Ch_WEDX, Ch_RECX))
+(Ch: (Ch_WEAX, Ch_WEDX, Ch_RECX)),
+(Ch: (Ch_All, Ch_None, Ch_None))
 );
--- a/compiler/i8086/i8086tab.inc
+++ b/compiler/i8086/i8086tab.inc
@ -13887,5 +13887,12 @@
    optypes : (ot_none,ot_none,ot_none,ot_none);
    code    : #3#15#1#208;
    flags   : if_xsave
+  ),
+  (
+    opcode  : A_PREFETCHWT1;
+    ops     : 1;
+    optypes : (ot_memory,ot_none,ot_none,ot_none);
+    code    : #2#15#13#130;
+    flags   : if_prefetchwt1
  )
 );
--- a/compiler/x86/aasmcpu.pas
+++ b/compiler/x86/aasmcpu.pas
@ -508,6 +508,7 @@ implementation
       IF_TSX    = $00200000;
       IF_RAND   = $00200000;
       IF_XSAVE  = $00200000;
+       IF_PREFETCHWT1 = $00200000;

       IF_PLEVEL = $0F000000;  { mask for processor level }
       IF_8086   = $00000000;  { 8086 instruction  }
--- a/compiler/x86/x86ins.dat
+++ b/compiler/x86/x86ins.dat
@ -5418,3 +5418,10 @@ reg16|32|64                          \320\2\x0F\xC7\207                   RAND
 (Ch_WEAX, Ch_WEDX, Ch_RECX)
 void                  \3\x0F\x01\xD0                                      XSAVE

+;*******************************************************************************
+;********** PREFETCHWT1 ********************************************************
+;*******************************************************************************
+[PREFETCHWT1,prefetchwt1X]
+(Ch_All, Ch_None, Ch_None)
+mem                   \2\x0F\x0D\202                                      PREFETCHWT1
+
--- a/compiler/x86_64/x8664ats.inc
+++ b/compiler/x86_64/x8664ats.inc
@ -1028,5 +1028,6 @@ attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
-attsufNONE
+attsufNONE,
+attsufINT
 );
--- a/compiler/x86_64/x8664att.inc
+++ b/compiler/x86_64/x8664att.inc
@ -1028,5 +1028,6 @@
 'xtest',
 'rdrand',
 'rdseed',
-'xgetbv'
+'xgetbv',
+'prefetchwt1'
 );
--- a/compiler/x86_64/x8664int.inc
+++ b/compiler/x86_64/x8664int.inc
@ -1028,5 +1028,6 @@
 'xtest',
 'rdrand',
 'rdseed',
-'xgetbv'
+'xgetbv',
+'prefetchwt1'
 );
--- a/compiler/x86_64/x8664nop.inc
+++ b/compiler/x86_64/x8664nop.inc
@ -1,2 +1,2 @@
 { don't edit, this file is generated from x86ins.dat }
-1973;
+1974;
--- a/compiler/x86_64/x8664op.inc
+++ b/compiler/x86_64/x8664op.inc
@ -1028,5 +1028,6 @@ A_XEND,
 A_XTEST,
 A_RDRAND,
 A_RDSEED,
-A_XGETBV
+A_XGETBV,
+A_PREFETCHWT1
 );
--- a/compiler/x86_64/x8664pro.inc
+++ b/compiler/x86_64/x8664pro.inc
@ -1028,5 +1028,6 @@
 (Ch: (Ch_WFlags, Ch_None, Ch_None)),
 (Ch: (Ch_Wop1, Ch_WFlags, CH_None)),
 (Ch: (Ch_Wop1, Ch_WFlags, CH_None)),
-(Ch: (Ch_WEAX, Ch_WEDX, Ch_RECX))
+(Ch: (Ch_WEAX, Ch_WEDX, Ch_RECX)),
+(Ch: (Ch_All, Ch_None, Ch_None))
 );
--- a/compiler/x86_64/x8664tab.inc
+++ b/compiler/x86_64/x8664tab.inc
@ -13810,5 +13810,12 @@
    optypes : (ot_none,ot_none,ot_none,ot_none);
    code    : #3#15#1#208;
    flags   : if_xsave
+  ),
+  (
+    opcode  : A_PREFETCHWT1;
+    ops     : 1;
+    optypes : (ot_memory,ot_none,ot_none,ot_none);
+    code    : #2#15#13#130;
+    flags   : if_prefetchwt1
  )
 );
--- a/tests/tbf/tb0252.pp
+++ b/tests/tbf/tb0252.pp
@ -0,0 +1,8 @@
+{ %fail }
+var
+  b : bytebool;
+
+begin
+  for b:=false to true do
+    ;
+end.
--- a/tests/webtbs/tw30933.pp
+++ b/tests/webtbs/tw30933.pp
@ -0,0 +1,30 @@
+{ %cpu=x86_64,i386 }
+
+procedure p1;assembler;nostackframe;
+  asm
+{$ifdef cpux86_64}
+    prefetchwt1 (%rax)
+{$else cpux86_64}
+    prefetchwt1 (%eax)
+{$endif cpux86_64}
+  end;
+
+const
+  test_expected : array[0..2] of byte = (
+    $0f,$0d,$10);
+
+var
+  i : longint;
+
+
+begin
+  for i:=0 to high(test_expected) do
+    if test_expected[i]<>pbyte(@p1)[i] then
+      begin
+        writeln('mismatch at offset $',hexstr(i,4), ', expected=$',
+          hexstr(test_expected[i],2),' actual=$',hexstr(pbyte(@p1)[i],2));
+        halt(1);
+      end;
+  writeln('ok');
+end.
+